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-rw-r--r--Documentation/devicetree/bindings/arm/amlogic.txt2
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt1
-rw-r--r--arch/arm64/boot/dts/amlogic/Makefile8
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gx.dtsi68
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts50
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi11
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts66
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts94
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi128
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts (renamed from arch/arm64/boot/dts/amlogic/meson-gxl-nexbox-a95x.dts)0
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl.dtsi78
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts (renamed from arch/arm64/boot/dts/amlogic/meson-gxm-s912-q200.dts)0
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts (renamed from arch/arm64/boot/dts/amlogic/meson-gxm-s912-q201.dts)0
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxm.dtsi14
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi12
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433-tm2.dts34
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts34
-rw-r--r--arch/arm64/boot/dts/exynos/exynos7-espresso.dts49
-rw-r--r--arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi302
-rw-r--r--arch/arm64/boot/dts/exynos/exynos7.dtsi34
-rw-r--r--drivers/clk/meson/gxbb.c48
-rw-r--r--drivers/clk/meson/gxbb.h15
-rw-r--r--drivers/clk/samsung/clk-exynos5433.c8
-rw-r--r--include/dt-bindings/clock/exynos5433.h5
-rw-r--r--include/dt-bindings/clock/gxbb-clkc.h6
-rw-r--r--include/dt-bindings/pinctrl/samsung.h8
26 files changed, 842 insertions, 233 deletions
diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt
index 9b2b41ab6817..c246cd2730d9 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.txt
+++ b/Documentation/devicetree/bindings/arm/amlogic.txt
@@ -40,6 +40,8 @@ Board compatible values:
40 - "hardkernel,odroid-c2" (Meson gxbb) 40 - "hardkernel,odroid-c2" (Meson gxbb)
41 - "amlogic,p200" (Meson gxbb) 41 - "amlogic,p200" (Meson gxbb)
42 - "amlogic,p201" (Meson gxbb) 42 - "amlogic,p201" (Meson gxbb)
43 - "wetek,hub" (Meson gxbb)
44 - "wetek,play2" (Meson gxbb)
43 - "amlogic,p212" (Meson gxl s905x) 45 - "amlogic,p212" (Meson gxl s905x)
44 - "amlogic,p230" (Meson gxl s905d) 46 - "amlogic,p230" (Meson gxl s905d)
45 - "amlogic,p231" (Meson gxl s905d) 47 - "amlogic,p231" (Meson gxl s905d)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index f6824fd8fb65..71d315f65aba 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -329,6 +329,7 @@ virtio Virtual I/O Device Specification, developed by the OASIS consortium
329vivante Vivante Corporation 329vivante Vivante Corporation
330voipac Voipac Technologies s.r.o. 330voipac Voipac Technologies s.r.o.
331wd Western Digital Corp. 331wd Western Digital Corp.
332wetek WeTek Electronics, limited.
332wexler Wexler 333wexler Wexler
333winbond Winbond Electronics corp. 334winbond Winbond Electronics corp.
334wlf Wolfson Microelectronics 335wlf Wolfson Microelectronics
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 0d7bfbf7d922..3f94bce33b7f 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -5,12 +5,14 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-p201.dtb
5dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-pro.dtb 5dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-pro.dtb
6dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-meta.dtb 6dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-meta.dtb
7dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-telos.dtb 7dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-telos.dtb
8dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-hub.dtb
9dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-play2.dtb
8dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb 10dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb
9dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb 11dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb
10dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb 12dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb
11dtb-$(CONFIG_ARCH_MESON) += meson-gxl-nexbox-a95x.dtb 13dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-nexbox-a95x.dtb
12dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-q200.dtb 14dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb
13dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-q201.dtb 15dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb
14dtb-$(CONFIG_ARCH_MESON) += meson-gxm-nexbox-a1.dtb 16dtb-$(CONFIG_ARCH_MESON) += meson-gxm-nexbox-a1.dtb
15 17
16always := $(dtb-y) 18always := $(dtb-y)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 0cbe24b49710..5d995f7724af 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -83,6 +83,7 @@
83 reg = <0x0 0x0>; 83 reg = <0x0 0x0>;
84 enable-method = "psci"; 84 enable-method = "psci";
85 next-level-cache = <&l2>; 85 next-level-cache = <&l2>;
86 clocks = <&scpi_dvfs 0>;
86 }; 87 };
87 88
88 cpu1: cpu@1 { 89 cpu1: cpu@1 {
@@ -91,6 +92,7 @@
91 reg = <0x0 0x1>; 92 reg = <0x0 0x1>;
92 enable-method = "psci"; 93 enable-method = "psci";
93 next-level-cache = <&l2>; 94 next-level-cache = <&l2>;
95 clocks = <&scpi_dvfs 0>;
94 }; 96 };
95 97
96 cpu2: cpu@2 { 98 cpu2: cpu@2 {
@@ -99,6 +101,7 @@
99 reg = <0x0 0x2>; 101 reg = <0x0 0x2>;
100 enable-method = "psci"; 102 enable-method = "psci";
101 next-level-cache = <&l2>; 103 next-level-cache = <&l2>;
104 clocks = <&scpi_dvfs 0>;
102 }; 105 };
103 106
104 cpu3: cpu@3 { 107 cpu3: cpu@3 {
@@ -107,6 +110,7 @@
107 reg = <0x0 0x3>; 110 reg = <0x0 0x3>;
108 enable-method = "psci"; 111 enable-method = "psci";
109 next-level-cache = <&l2>; 112 next-level-cache = <&l2>;
113 clocks = <&scpi_dvfs 0>;
110 }; 114 };
111 115
112 l2: l2-cache0 { 116 l2: l2-cache0 {
@@ -171,6 +175,28 @@
171 }; 175 };
172 }; 176 };
173 177
178 scpi {
179 compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
180 mboxes = <&mailbox 1 &mailbox 2>;
181 shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
182
183 scpi_clocks: clocks {
184 compatible = "arm,scpi-clocks";
185
186 scpi_dvfs: scpi_clocks@0 {
187 compatible = "arm,scpi-dvfs-clocks";
188 #clock-cells = <1>;
189 clock-indices = <0>;
190 clock-output-names = "vcpu";
191 };
192 };
193
194 scpi_sensors: sensors {
195 compatible = "arm,scpi-sensors";
196 #thermal-sensor-cells = <1>;
197 };
198 };
199
174 soc { 200 soc {
175 compatible = "simple-bus"; 201 compatible = "simple-bus";
176 #address-cells = <2>; 202 #address-cells = <2>;
@@ -229,6 +255,14 @@
229 status = "disabled"; 255 status = "disabled";
230 }; 256 };
231 257
258 saradc: adc@8680 {
259 compatible = "amlogic,meson-saradc";
260 reg = <0x0 0x8680 0x0 0x34>;
261 #io-channel-cells = <1>;
262 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
263 status = "disabled";
264 };
265
232 pwm_ef: pwm@86c0 { 266 pwm_ef: pwm@86c0 {
233 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; 267 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
234 reg = <0x0 0x086c0 0x0 0x10>; 268 reg = <0x0 0x086c0 0x0 0x10>;
@@ -282,6 +316,25 @@
282 #address-cells = <0>; 316 #address-cells = <0>;
283 }; 317 };
284 318
319 sram: sram@c8000000 {
320 compatible = "amlogic,meson-gxbb-sram", "mmio-sram";
321 reg = <0x0 0xc8000000 0x0 0x14000>;
322
323 #address-cells = <1>;
324 #size-cells = <1>;
325 ranges = <0 0x0 0xc8000000 0x14000>;
326
327 cpu_scp_lpri: scp-shmem@0 {
328 compatible = "amlogic,meson-gxbb-scp-shmem";
329 reg = <0x13000 0x400>;
330 };
331
332 cpu_scp_hpri: scp-shmem@200 {
333 compatible = "amlogic,meson-gxbb-scp-shmem";
334 reg = <0x13400 0x400>;
335 };
336 };
337
285 aobus: aobus@c8100000 { 338 aobus: aobus@c8100000 {
286 compatible = "simple-bus"; 339 compatible = "simple-bus";
287 reg = <0x0 0xc8100000 0x0 0x100000>; 340 reg = <0x0 0xc8100000 0x0 0x100000>;
@@ -297,6 +350,21 @@
297 status = "disabled"; 350 status = "disabled";
298 }; 351 };
299 352
353 uart_AO_B: serial@4e0 {
354 compatible = "amlogic,meson-uart";
355 reg = <0x0 0x004e0 0x0 0x14>;
356 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
357 clocks = <&xtal>;
358 status = "disabled";
359 };
360
361 pwm_AO_ab: pwm@550 {
362 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
363 reg = <0x0 0x00550 0x0 0x10>;
364 #pwm-cells = <3>;
365 status = "disabled";
366 };
367
300 ir: ir@580 { 368 ir: ir@580 {
301 compatible = "amlogic,meson-gxbb-ir"; 369 compatible = "amlogic,meson-gxbb-ir";
302 reg = <0x0 0x00580 0x0 0x40>; 370 reg = <0x0 0x00580 0x0 0x40>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
index 03e3d76626dd..fc0e86cb4cde 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
@@ -45,10 +45,55 @@
45/dts-v1/; 45/dts-v1/;
46 46
47#include "meson-gxbb-p20x.dtsi" 47#include "meson-gxbb-p20x.dtsi"
48#include <dt-bindings/input/input.h>
48 49
49/ { 50/ {
50 compatible = "amlogic,p200", "amlogic,meson-gxbb"; 51 compatible = "amlogic,p200", "amlogic,meson-gxbb";
51 model = "Amlogic Meson GXBB P200 Development Board"; 52 model = "Amlogic Meson GXBB P200 Development Board";
53
54 avdd18_usb_adc: regulator-avdd18_usb_adc {
55 compatible = "regulator-fixed";
56 regulator-name = "AVDD18_USB_ADC";
57 regulator-min-microvolt = <1800000>;
58 regulator-max-microvolt = <1800000>;
59 };
60
61 adc_keys {
62 compatible = "adc-keys";
63 io-channels = <&saradc 0>;
64 io-channel-names = "buttons";
65 keyup-threshold-microvolt = <1800000>;
66
67 button-home {
68 label = "Home";
69 linux,code = <KEY_HOME>;
70 press-threshold-microvolt = <900000>; /* 50% */
71 };
72
73 button-esc {
74 label = "Esc";
75 linux,code = <KEY_ESC>;
76 press-threshold-microvolt = <684000>; /* 38% */
77 };
78
79 button-up {
80 label = "Volume Up";
81 linux,code = <KEY_VOLUMEUP>;
82 press-threshold-microvolt = <468000>; /* 26% */
83 };
84
85 button-down {
86 label = "Volume Down";
87 linux,code = <KEY_VOLUMEDOWN>;
88 press-threshold-microvolt = <252000>; /* 14% */
89 };
90
91 button-menu {
92 label = "Menu";
93 linux,code = <KEY_MENU>;
94 press-threshold-microvolt = <0>; /* 0% */
95 };
96 };
52}; 97};
53 98
54&i2c_B { 99&i2c_B {
@@ -56,3 +101,8 @@
56 pinctrl-0 = <&i2c_b_pins>; 101 pinctrl-0 = <&i2c_b_pins>;
57 pinctrl-names = "default"; 102 pinctrl-names = "default";
58}; 103};
104
105&saradc {
106 status = "okay";
107 vref-supply = <&avdd18_usb_adc>;
108};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
index e59ad308192f..86709929fd20 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
@@ -53,6 +53,17 @@
53 stdout-path = "serial0:115200n8"; 53 stdout-path = "serial0:115200n8";
54 }; 54 };
55 55
56 leds {
57 compatible = "gpio-leds";
58
59 blue {
60 label = "vega-s95:blue:on";
61 gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
62 default-state = "on";
63 panic-indicator;
64 };
65 };
66
56 usb_vbus: regulator-usb0-vbus { 67 usb_vbus: regulator-usb0-vbus {
57 compatible = "regulator-fixed"; 68 compatible = "regulator-fixed";
58 69
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
new file mode 100644
index 000000000000..56f855901262
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
@@ -0,0 +1,66 @@
1/*
2 * Copyright (c) 2016 BayLibre, Inc.
3 * Author: Neil Armstrong <narmstrong@baylibre.com>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44/dts-v1/;
45
46#include "meson-gxbb-p20x.dtsi"
47
48/ {
49 compatible = "wetek,hub", "amlogic,meson-gxbb";
50 model = "WeTek Hub";
51
52 leds {
53 compatible = "gpio-leds";
54
55 system {
56 label = "wetek-play:system-status";
57 gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
58 default-state = "on";
59 panic-indicator;
60 };
61 };
62
63 cvbs-connector {
64 status = "disabled";
65 };
66};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
new file mode 100644
index 000000000000..ea79fdd2c248
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
@@ -0,0 +1,94 @@
1/*
2 * Copyright (c) 2016 BayLibre, Inc.
3 * Author: Neil Armstrong <narmstrong@baylibre.com>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44/dts-v1/;
45
46#include "meson-gxbb-p20x.dtsi"
47#include <dt-bindings/input/input.h>
48
49/ {
50 compatible = "wetek,play2", "amlogic,meson-gxbb";
51 model = "WeTek Play 2";
52
53 leds {
54 compatible = "gpio-leds";
55
56 system {
57 label = "wetek-play:system-status";
58 gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
59 default-state = "on";
60 panic-indicator;
61 };
62
63 wifi {
64 label = "wetek-play:wifi-status";
65 gpios = <&gpio GPIODV_26 GPIO_ACTIVE_HIGH>;
66 default-state = "off";
67 };
68
69 ethernet {
70 label = "wetek-play:ethernet-status";
71 gpios = <&gpio GPIODV_27 GPIO_ACTIVE_HIGH>;
72 default-state = "off";
73 };
74 };
75
76 gpio-keys-polled {
77 compatible = "gpio-keys-polled";
78 #address-cells = <1>;
79 #size-cells = <0>;
80 poll-interval = <100>;
81
82 button@0 {
83 label = "reset";
84 linux,code = <KEY_RESTART>;
85 gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>;
86 };
87 };
88};
89
90&i2c_A {
91 status = "okay";
92 pinctrl-0 = <&i2c_a_pins>;
93 pinctrl-names = "default";
94};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index b35307321b63..04b3324bc132 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -50,28 +50,6 @@
50/ { 50/ {
51 compatible = "amlogic,meson-gxbb"; 51 compatible = "amlogic,meson-gxbb";
52 52
53 scpi {
54 compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
55 mboxes = <&mailbox 1 &mailbox 2>;
56 shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
57
58 scpi_clocks: clocks {
59 compatible = "arm,scpi-clocks";
60
61 scpi_dvfs: scpi_clocks@0 {
62 compatible = "arm,scpi-dvfs-clocks";
63 #clock-cells = <1>;
64 clock-indices = <0>;
65 clock-output-names = "vcpu";
66 };
67 };
68
69 scpi_sensors: sensors {
70 compatible = "arm,scpi-sensors";
71 #thermal-sensor-cells = <1>;
72 };
73 };
74
75 soc { 53 soc {
76 usb0_phy: phy@c0000000 { 54 usb0_phy: phy@c0000000 {
77 compatible = "amlogic,meson-gxbb-usb2-phy"; 55 compatible = "amlogic,meson-gxbb-usb2-phy";
@@ -93,25 +71,6 @@
93 status = "disabled"; 71 status = "disabled";
94 }; 72 };
95 73
96 sram: sram@c8000000 {
97 compatible = "amlogic,meson-gxbb-sram", "mmio-sram";
98 reg = <0x0 0xc8000000 0x0 0x14000>;
99
100 #address-cells = <1>;
101 #size-cells = <1>;
102 ranges = <0 0x0 0xc8000000 0x14000>;
103
104 cpu_scp_lpri: scp-shmem@0 {
105 compatible = "amlogic,meson-gxbb-scp-shmem";
106 reg = <0x13000 0x400>;
107 };
108
109 cpu_scp_hpri: scp-shmem@200 {
110 compatible = "amlogic,meson-gxbb-scp-shmem";
111 reg = <0x13400 0x400>;
112 };
113 };
114
115 usb0: usb@c9000000 { 74 usb0: usb@c9000000 {
116 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2"; 75 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
117 reg = <0x0 0xc9000000 0x0 0x40000>; 76 reg = <0x0 0xc9000000 0x0 0x40000>;
@@ -138,22 +97,6 @@
138 }; 97 };
139}; 98};
140 99
141&cpu0 {
142 clocks = <&scpi_dvfs 0>;
143};
144
145&cpu1 {
146 clocks = <&scpi_dvfs 0>;
147};
148
149&cpu2 {
150 clocks = <&scpi_dvfs 0>;
151};
152
153&cpu3 {
154 clocks = <&scpi_dvfs 0>;
155};
156
157&cbus { 100&cbus {
158 spifc: spi@8c80 { 101 spifc: spi@8c80 {
159 compatible = "amlogic,meson-gxbb-spifc"; 102 compatible = "amlogic,meson-gxbb-spifc";
@@ -195,6 +138,29 @@
195 }; 138 };
196 }; 139 };
197 140
141 uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
142 mux {
143 groups = "uart_cts_ao_a",
144 "uart_rts_ao_a";
145 function = "uart_ao";
146 };
147 };
148
149 uart_ao_b_pins: uart_ao_b {
150 mux {
151 groups = "uart_tx_ao_b", "uart_rx_ao_b";
152 function = "uart_ao_b";
153 };
154 };
155
156 uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
157 mux {
158 groups = "uart_cts_ao_b",
159 "uart_rts_ao_b";
160 function = "uart_ao_b";
161 };
162 };
163
198 remote_input_ao_pins: remote_input_ao { 164 remote_input_ao_pins: remote_input_ao {
199 mux { 165 mux {
200 groups = "remote_input_ao"; 166 groups = "remote_input_ao";
@@ -340,6 +306,14 @@
340 }; 306 };
341 }; 307 };
342 308
309 uart_a_cts_rts_pins: uart_a_cts_rts {
310 mux {
311 groups = "uart_cts_a",
312 "uart_rts_a";
313 function = "uart_a";
314 };
315 };
316
343 uart_b_pins: uart_b { 317 uart_b_pins: uart_b {
344 mux { 318 mux {
345 groups = "uart_tx_b", 319 groups = "uart_tx_b",
@@ -348,6 +322,14 @@
348 }; 322 };
349 }; 323 };
350 324
325 uart_b_cts_rts_pins: uart_b_cts_rts {
326 mux {
327 groups = "uart_cts_b",
328 "uart_rts_b";
329 function = "uart_b";
330 };
331 };
332
351 uart_c_pins: uart_c { 333 uart_c_pins: uart_c {
352 mux { 334 mux {
353 groups = "uart_tx_c", 335 groups = "uart_tx_c",
@@ -356,6 +338,14 @@
356 }; 338 };
357 }; 339 };
358 340
341 uart_c_cts_rts_pins: uart_c_cts_rts {
342 mux {
343 groups = "uart_cts_c",
344 "uart_rts_c";
345 function = "uart_c";
346 };
347 };
348
359 i2c_a_pins: i2c_a { 349 i2c_a_pins: i2c_a {
360 mux { 350 mux {
361 groups = "i2c_sck_a", 351 groups = "i2c_sck_a",
@@ -463,6 +453,20 @@
463 function = "pwm_f_y"; 453 function = "pwm_f_y";
464 }; 454 };
465 }; 455 };
456
457 hdmi_hpd_pins: hdmi_hpd {
458 mux {
459 groups = "hdmi_hpd";
460 function = "hdmi_hpd";
461 };
462 };
463
464 hdmi_i2c_pins: hdmi_i2c {
465 mux {
466 groups = "hdmi_sda", "hdmi_scl";
467 function = "hdmi_i2c";
468 };
469 };
466 }; 470 };
467}; 471};
468 472
@@ -486,6 +490,16 @@
486 clocks = <&clkc CLKID_I2C>; 490 clocks = <&clkc CLKID_I2C>;
487}; 491};
488 492
493&saradc {
494 compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc";
495 clocks = <&xtal>,
496 <&clkc CLKID_SAR_ADC>,
497 <&clkc CLKID_SANA>,
498 <&clkc CLKID_SAR_ADC_CLK>,
499 <&clkc CLKID_SAR_ADC_SEL>;
500 clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
501};
502
489&sd_emmc_a { 503&sd_emmc_a {
490 clocks = <&clkc CLKID_SD_EMMC_A>, 504 clocks = <&clkc CLKID_SD_EMMC_A>,
491 <&xtal>, 505 <&xtal>,
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
index cea4a3eded9b..cea4a3eded9b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-nexbox-a95x.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
index 69216246275d..fe11b5fc61f7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
@@ -88,12 +88,42 @@
88 }; 88 };
89 }; 89 };
90 90
91 uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
92 mux {
93 groups = "uart_cts_ao_a",
94 "uart_rts_ao_a";
95 function = "uart_ao";
96 };
97 };
98
99 uart_ao_b_pins: uart_ao_b {
100 mux {
101 groups = "uart_tx_ao_b", "uart_rx_ao_b";
102 function = "uart_ao_b";
103 };
104 };
105
106 uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
107 mux {
108 groups = "uart_cts_ao_b",
109 "uart_rts_ao_b";
110 function = "uart_ao_b";
111 };
112 };
113
91 remote_input_ao_pins: remote_input_ao { 114 remote_input_ao_pins: remote_input_ao {
92 mux { 115 mux {
93 groups = "remote_input_ao"; 116 groups = "remote_input_ao";
94 function = "remote_input_ao"; 117 function = "remote_input_ao";
95 }; 118 };
96 }; 119 };
120
121 pwm_ao_b_pins: pwm_ao_b {
122 mux {
123 groups = "pwm_ao_b";
124 function = "pwm_ao_b";
125 };
126 };
97 }; 127 };
98}; 128};
99 129
@@ -163,6 +193,14 @@
163 }; 193 };
164 }; 194 };
165 195
196 uart_a_cts_rts_pins: uart_a_cts_rts {
197 mux {
198 groups = "uart_cts_a",
199 "uart_rts_a";
200 function = "uart_a";
201 };
202 };
203
166 uart_b_pins: uart_b { 204 uart_b_pins: uart_b {
167 mux { 205 mux {
168 groups = "uart_tx_b", 206 groups = "uart_tx_b",
@@ -171,6 +209,14 @@
171 }; 209 };
172 }; 210 };
173 211
212 uart_b_cts_rts_pins: uart_b_cts_rts {
213 mux {
214 groups = "uart_cts_b",
215 "uart_rts_b";
216 function = "uart_b";
217 };
218 };
219
174 uart_c_pins: uart_c { 220 uart_c_pins: uart_c {
175 mux { 221 mux {
176 groups = "uart_tx_c", 222 groups = "uart_tx_c",
@@ -179,6 +225,14 @@
179 }; 225 };
180 }; 226 };
181 227
228 uart_c_cts_rts_pins: uart_c_cts_rts {
229 mux {
230 groups = "uart_cts_c",
231 "uart_rts_c";
232 function = "uart_c";
233 };
234 };
235
182 i2c_a_pins: i2c_a { 236 i2c_a_pins: i2c_a {
183 mux { 237 mux {
184 groups = "i2c_sck_a", 238 groups = "i2c_sck_a",
@@ -229,6 +283,20 @@
229 function = "pwm_e"; 283 function = "pwm_e";
230 }; 284 };
231 }; 285 };
286
287 hdmi_hpd_pins: hdmi_hpd {
288 mux {
289 groups = "hdmi_hpd";
290 function = "hdmi_hpd";
291 };
292 };
293
294 hdmi_i2c_pins: hdmi_i2c {
295 mux {
296 groups = "hdmi_sda", "hdmi_scl";
297 function = "hdmi_i2c";
298 };
299 };
232 }; 300 };
233 301
234 eth-phy-mux { 302 eth-phy-mux {
@@ -279,6 +347,16 @@
279 clocks = <&clkc CLKID_I2C>; 347 clocks = <&clkc CLKID_I2C>;
280}; 348};
281 349
350&saradc {
351 compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
352 clocks = <&xtal>,
353 <&clkc CLKID_SAR_ADC>,
354 <&clkc CLKID_SANA>,
355 <&clkc CLKID_SAR_ADC_CLK>,
356 <&clkc CLKID_SAR_ADC_SEL>;
357 clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
358};
359
282&sd_emmc_a { 360&sd_emmc_a {
283 clocks = <&clkc CLKID_SD_EMMC_A>, 361 clocks = <&clkc CLKID_SD_EMMC_A>,
284 <&xtal>, 362 <&xtal>,
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-s912-q200.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
index 5dbc66088355..5dbc66088355 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-s912-q200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-s912-q201.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts
index 95e11d7faab8..95e11d7faab8 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-s912-q201.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
index eb2f0c3e5e53..ddea7305c644 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
@@ -85,6 +85,7 @@
85 reg = <0x0 0x100>; 85 reg = <0x0 0x100>;
86 enable-method = "psci"; 86 enable-method = "psci";
87 next-level-cache = <&l2>; 87 next-level-cache = <&l2>;
88 clocks = <&scpi_dvfs 1>;
88 }; 89 };
89 90
90 cpu5: cpu@101 { 91 cpu5: cpu@101 {
@@ -93,6 +94,7 @@
93 reg = <0x0 0x101>; 94 reg = <0x0 0x101>;
94 enable-method = "psci"; 95 enable-method = "psci";
95 next-level-cache = <&l2>; 96 next-level-cache = <&l2>;
97 clocks = <&scpi_dvfs 1>;
96 }; 98 };
97 99
98 cpu6: cpu@102 { 100 cpu6: cpu@102 {
@@ -101,6 +103,7 @@
101 reg = <0x0 0x102>; 103 reg = <0x0 0x102>;
102 enable-method = "psci"; 104 enable-method = "psci";
103 next-level-cache = <&l2>; 105 next-level-cache = <&l2>;
106 clocks = <&scpi_dvfs 1>;
104 }; 107 };
105 108
106 cpu7: cpu@103 { 109 cpu7: cpu@103 {
@@ -109,10 +112,21 @@
109 reg = <0x0 0x103>; 112 reg = <0x0 0x103>;
110 enable-method = "psci"; 113 enable-method = "psci";
111 next-level-cache = <&l2>; 114 next-level-cache = <&l2>;
115 clocks = <&scpi_dvfs 1>;
112 }; 116 };
113 }; 117 };
114}; 118};
115 119
120&saradc {
121 compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc";
122};
123
124&scpi_dvfs {
125 clock-indices = <0 1>;
126 clock-output-names = "vbig", "vlittle";
127};
128
116&vpu { 129&vpu {
117 compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu"; 130 compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
118}; 131};
132
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
index 53fd0683d400..098ad557fee3 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
@@ -217,18 +217,6 @@
217 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>; 217 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
218}; 218};
219 219
220&cmu_disp {
221 assigned-clocks = <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
222 <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>,
223 <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
224 <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>;
225 assigned-clock-parents = <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
226 <0>,
227 <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
228 <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>;
229 assigned-clock-rates = <0>, <400000000>;
230};
231
232&cmu_fsys { 220&cmu_fsys {
233 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>, 221 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
234 <&cmu_top CLK_MOUT_SCLK_USBHOST30>, 222 <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index ddba2f889326..dea0a6f5bc18 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -18,6 +18,40 @@
18 compatible = "samsung,tm2", "samsung,exynos5433"; 18 compatible = "samsung,tm2", "samsung,exynos5433";
19}; 19};
20 20
21&cmu_disp {
22 /*
23 * TM2 and TM2e differ only by DISP_PLL rate, but define all assigned
24 * clocks properties for DISP CMU for each board to keep them together
25 * for easier review and maintenance.
26 */
27 assigned-clocks = <&cmu_disp CLK_FOUT_DISP_PLL>,
28 <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>,
29 <&cmu_disp CLK_MOUT_ACLK_DISP_333_USER>,
30 <&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>,
31 <&cmu_disp CLK_MOUT_SCLK_DSIM0>,
32 <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>,
33 <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK>,
34 <&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_RXCLKESC0_USER>,
35 <&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_BITCLKDIV8_USER>,
36 <&cmu_disp CLK_MOUT_DISP_PLL>,
37 <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
38 <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
39 <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>;
40 assigned-clock-parents = <0>, <0>,
41 <&cmu_mif CLK_ACLK_DISP_333>,
42 <&cmu_mif CLK_SCLK_DSIM0_DISP>,
43 <&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>,
44 <&cmu_mif CLK_SCLK_DECON_ECLK_DISP>,
45 <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>,
46 <&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY>,
47 <&cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY>,
48 <&cmu_disp CLK_FOUT_DISP_PLL>,
49 <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
50 <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
51 <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>;
52 assigned-clock-rates = <250000000>, <400000000>;
53};
54
21&hsi2c_9 { 55&hsi2c_9 {
22 status = "okay"; 56 status = "okay";
23 57
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
index 2fbf3a860316..7891a31adc17 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
@@ -18,6 +18,40 @@
18 compatible = "samsung,tm2e", "samsung,exynos5433"; 18 compatible = "samsung,tm2e", "samsung,exynos5433";
19}; 19};
20 20
21&cmu_disp {
22 /*
23 * TM2 and TM2e differ only by DISP_PLL rate, but define all assigned
24 * clocks properties for DISP CMU for each board to keep them together
25 * for easier review and maintenance.
26 */
27 assigned-clocks = <&cmu_disp CLK_FOUT_DISP_PLL>,
28 <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>,
29 <&cmu_disp CLK_MOUT_ACLK_DISP_333_USER>,
30 <&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>,
31 <&cmu_disp CLK_MOUT_SCLK_DSIM0>,
32 <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>,
33 <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK>,
34 <&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_RXCLKESC0_USER>,
35 <&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_BITCLKDIV8_USER>,
36 <&cmu_disp CLK_MOUT_DISP_PLL>,
37 <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
38 <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
39 <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>;
40 assigned-clock-parents = <0>, <0>,
41 <&cmu_mif CLK_ACLK_DISP_333>,
42 <&cmu_mif CLK_SCLK_DSIM0_DISP>,
43 <&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>,
44 <&cmu_mif CLK_SCLK_DECON_ECLK_DISP>,
45 <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>,
46 <&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY>,
47 <&cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY>,
48 <&cmu_disp CLK_FOUT_DISP_PLL>,
49 <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
50 <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
51 <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>;
52 assigned-clock-rates = <278000000>, <400000000>;
53};
54
21&ldo31_reg { 55&ldo31_reg {
22 regulator-name = "TSP_VDD_1.8V_AP"; 56 regulator-name = "TSP_VDD_1.8V_AP";
23 regulator-min-microvolt = <1800000>; 57 regulator-min-microvolt = <1800000>;
diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
index c528dd52ba2d..e5892bb0ae6e 100644
--- a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
+++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
@@ -13,6 +13,7 @@
13#include "exynos7.dtsi" 13#include "exynos7.dtsi"
14#include <dt-bindings/interrupt-controller/irq.h> 14#include <dt-bindings/interrupt-controller/irq.h>
15#include <dt-bindings/clock/samsung,s2mps11.h> 15#include <dt-bindings/clock/samsung,s2mps11.h>
16#include <dt-bindings/gpio/gpio.h>
16 17
17/ { 18/ {
18 model = "Samsung Exynos7 Espresso board based on EXYNOS7"; 19 model = "Samsung Exynos7 Espresso board based on EXYNOS7";
@@ -32,6 +33,29 @@
32 device_type = "memory"; 33 device_type = "memory";
33 reg = <0x0 0x40000000 0x0 0xC0000000>; 34 reg = <0x0 0x40000000 0x0 0xC0000000>;
34 }; 35 };
36
37 usb30_vbus_reg: regulator-usb30 {
38 compatible = "regulator-fixed";
39 regulator-name = "VBUS_5V";
40 regulator-min-microvolt = <5000000>;
41 regulator-max-microvolt = <5000000>;
42 gpio = <&gph1 1 GPIO_ACTIVE_HIGH>;
43 pinctrl-names = "default";
44 pinctrl-0 = <&usb30_vbus_en>;
45 enable-active-high;
46 };
47
48 usb3drd_boost_5v: regulator-usb3drd-boost {
49 compatible = "regulator-fixed";
50 regulator-name = "VUSB_VBUS_5V";
51 regulator-min-microvolt = <5000000>;
52 regulator-max-microvolt = <5000000>;
53 gpio = <&gpf4 1 GPIO_ACTIVE_HIGH>;
54 pinctrl-names = "default";
55 pinctrl-0 = <&usb3drd_boost_en>;
56 enable-active-high;
57 };
58
35}; 59};
36 60
37&fin_pll { 61&fin_pll {
@@ -328,8 +352,8 @@
328&pinctrl_alive { 352&pinctrl_alive {
329 pmic_irq: pmic-irq { 353 pmic_irq: pmic-irq {
330 samsung,pins = "gpa0-2"; 354 samsung,pins = "gpa0-2";
331 samsung,pin-pud = <3>; 355 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
332 samsung,pin-drv = <3>; 356 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
333 }; 357 };
334}; 358};
335 359
@@ -365,3 +389,24 @@
365 vqmmc-supply = <&ldo2_reg>; 389 vqmmc-supply = <&ldo2_reg>;
366 disable-wp; 390 disable-wp;
367}; 391};
392
393&pinctrl_bus1 {
394 usb30_vbus_en: usb30-vbus-en {
395 samsung,pins = "gph1-1";
396 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
397 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
398 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
399 };
400
401 usb3drd_boost_en: usb3drd-boost-en {
402 samsung,pins = "gpf4-1";
403 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
404 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
405 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
406 };
407};
408
409&usbdrd_phy {
410 vbus-supply = <&usb30_vbus_reg>;
411 vbus-boost-supply = <&usb3drd_boost_5v>;
412};
diff --git a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
index 7ebb93927f13..8f58850cd28c 100644
--- a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
@@ -12,6 +12,8 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13*/ 13*/
14 14
15#include <dt-bindings/pinctrl/samsung.h>
16
15&pinctrl_alive { 17&pinctrl_alive {
16 gpa0: gpa0 { 18 gpa0: gpa0 {
17 gpio-controller; 19 gpio-controller;
@@ -187,163 +189,163 @@
187 189
188 hs_i2c10_bus: hs-i2c10-bus { 190 hs_i2c10_bus: hs-i2c10-bus {
189 samsung,pins = "gpb0-1", "gpb0-0"; 191 samsung,pins = "gpb0-1", "gpb0-0";
190 samsung,pin-function = <2>; 192 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
191 samsung,pin-pud = <3>; 193 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
192 samsung,pin-drv = <0>; 194 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
193 }; 195 };
194 196
195 hs_i2c11_bus: hs-i2c11-bus { 197 hs_i2c11_bus: hs-i2c11-bus {
196 samsung,pins = "gpb0-3", "gpb0-2"; 198 samsung,pins = "gpb0-3", "gpb0-2";
197 samsung,pin-function = <2>; 199 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
198 samsung,pin-pud = <3>; 200 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
199 samsung,pin-drv = <0>; 201 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
200 }; 202 };
201 203
202 hs_i2c2_bus: hs-i2c2-bus { 204 hs_i2c2_bus: hs-i2c2-bus {
203 samsung,pins = "gpd0-3", "gpd0-2"; 205 samsung,pins = "gpd0-3", "gpd0-2";
204 samsung,pin-function = <3>; 206 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
205 samsung,pin-pud = <3>; 207 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
206 samsung,pin-drv = <0>; 208 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
207 }; 209 };
208 210
209 uart0_data: uart0-data { 211 uart0_data: uart0-data {
210 samsung,pins = "gpd0-0", "gpd0-1"; 212 samsung,pins = "gpd0-0", "gpd0-1";
211 samsung,pin-function = <2>; 213 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
212 samsung,pin-pud = <0>; 214 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
213 samsung,pin-drv = <0>; 215 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
214 }; 216 };
215 217
216 uart0_fctl: uart0-fctl { 218 uart0_fctl: uart0-fctl {
217 samsung,pins = "gpd0-2", "gpd0-3"; 219 samsung,pins = "gpd0-2", "gpd0-3";
218 samsung,pin-function = <2>; 220 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
219 samsung,pin-pud = <0>; 221 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
220 samsung,pin-drv = <0>; 222 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
221 }; 223 };
222 224
223 uart2_data: uart2-data { 225 uart2_data: uart2-data {
224 samsung,pins = "gpd1-4", "gpd1-5"; 226 samsung,pins = "gpd1-4", "gpd1-5";
225 samsung,pin-function = <2>; 227 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
226 samsung,pin-pud = <0>; 228 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
227 samsung,pin-drv = <0>; 229 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
228 }; 230 };
229 231
230 hs_i2c3_bus: hs-i2c3-bus { 232 hs_i2c3_bus: hs-i2c3-bus {
231 samsung,pins = "gpd1-3", "gpd1-2"; 233 samsung,pins = "gpd1-3", "gpd1-2";
232 samsung,pin-function = <3>; 234 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
233 samsung,pin-pud = <3>; 235 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
234 samsung,pin-drv = <0>; 236 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
235 }; 237 };
236 238
237 uart1_data: uart1-data { 239 uart1_data: uart1-data {
238 samsung,pins = "gpd1-0", "gpd1-1"; 240 samsung,pins = "gpd1-0", "gpd1-1";
239 samsung,pin-function = <2>; 241 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
240 samsung,pin-pud = <0>; 242 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
241 samsung,pin-drv = <0>; 243 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
242 }; 244 };
243 245
244 uart1_fctl: uart1-fctl { 246 uart1_fctl: uart1-fctl {
245 samsung,pins = "gpd1-2", "gpd1-3"; 247 samsung,pins = "gpd1-2", "gpd1-3";
246 samsung,pin-function = <2>; 248 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
247 samsung,pin-pud = <0>; 249 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
248 samsung,pin-drv = <0>; 250 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
249 }; 251 };
250 252
251 hs_i2c0_bus: hs-i2c0-bus { 253 hs_i2c0_bus: hs-i2c0-bus {
252 samsung,pins = "gpd2-1", "gpd2-0"; 254 samsung,pins = "gpd2-1", "gpd2-0";
253 samsung,pin-function = <2>; 255 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
254 samsung,pin-pud = <3>; 256 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
255 samsung,pin-drv = <0>; 257 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
256 }; 258 };
257 259
258 hs_i2c1_bus: hs-i2c1-bus { 260 hs_i2c1_bus: hs-i2c1-bus {
259 samsung,pins = "gpd2-3", "gpd2-2"; 261 samsung,pins = "gpd2-3", "gpd2-2";
260 samsung,pin-function = <2>; 262 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
261 samsung,pin-pud = <3>; 263 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
262 samsung,pin-drv = <0>; 264 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
263 }; 265 };
264 266
265 hs_i2c9_bus: hs-i2c9-bus { 267 hs_i2c9_bus: hs-i2c9-bus {
266 samsung,pins = "gpd2-7", "gpd2-6"; 268 samsung,pins = "gpd2-7", "gpd2-6";
267 samsung,pin-function = <3>; 269 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
268 samsung,pin-pud = <3>; 270 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
269 samsung,pin-drv = <0>; 271 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
270 }; 272 };
271 273
272 pwm0_out: pwm0-out { 274 pwm0_out: pwm0-out {
273 samsung,pins = "gpd2-4"; 275 samsung,pins = "gpd2-4";
274 samsung,pin-function = <2>; 276 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
275 samsung,pin-pud = <0>; 277 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
276 samsung,pin-drv = <0>; 278 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
277 }; 279 };
278 280
279 pwm1_out: pwm1-out { 281 pwm1_out: pwm1-out {
280 samsung,pins = "gpd2-5"; 282 samsung,pins = "gpd2-5";
281 samsung,pin-function = <2>; 283 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
282 samsung,pin-pud = <0>; 284 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
283 samsung,pin-drv = <0>; 285 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
284 }; 286 };
285 287
286 pwm2_out: pwm2-out { 288 pwm2_out: pwm2-out {
287 samsung,pins = "gpd2-6"; 289 samsung,pins = "gpd2-6";
288 samsung,pin-function = <2>; 290 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
289 samsung,pin-pud = <0>; 291 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
290 samsung,pin-drv = <0>; 292 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
291 }; 293 };
292 294
293 pwm3_out: pwm3-out { 295 pwm3_out: pwm3-out {
294 samsung,pins = "gpd2-7"; 296 samsung,pins = "gpd2-7";
295 samsung,pin-function = <2>; 297 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
296 samsung,pin-pud = <0>; 298 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
297 samsung,pin-drv = <0>; 299 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
298 }; 300 };
299 301
300 hs_i2c8_bus: hs-i2c8-bus { 302 hs_i2c8_bus: hs-i2c8-bus {
301 samsung,pins = "gpd5-3", "gpd5-2"; 303 samsung,pins = "gpd5-3", "gpd5-2";
302 samsung,pin-function = <3>; 304 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
303 samsung,pin-pud = <3>; 305 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
304 samsung,pin-drv = <0>; 306 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
305 }; 307 };
306 308
307 uart3_data: uart3-data { 309 uart3_data: uart3-data {
308 samsung,pins = "gpd5-0", "gpd5-1"; 310 samsung,pins = "gpd5-0", "gpd5-1";
309 samsung,pin-function = <3>; 311 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
310 samsung,pin-pud = <0>; 312 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
311 samsung,pin-drv = <0>; 313 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
312 }; 314 };
313 315
314 spi2_bus: spi2-bus { 316 spi2_bus: spi2-bus {
315 samsung,pins = "gpd5-0", "gpd5-1", "gpd5-2", "gpd5-3"; 317 samsung,pins = "gpd5-0", "gpd5-1", "gpd5-2", "gpd5-3";
316 samsung,pin-function = <2>; 318 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
317 samsung,pin-pud = <3>; 319 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
318 samsung,pin-drv = <0>; 320 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
319 }; 321 };
320 322
321 spi1_bus: spi1-bus { 323 spi1_bus: spi1-bus {
322 samsung,pins = "gpd6-2", "gpd6-3", "gpd6-4", "gpd6-5"; 324 samsung,pins = "gpd6-2", "gpd6-3", "gpd6-4", "gpd6-5";
323 samsung,pin-function = <2>; 325 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
324 samsung,pin-pud = <3>; 326 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
325 samsung,pin-drv = <0>; 327 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
326 }; 328 };
327 329
328 spi0_bus: spi0-bus { 330 spi0_bus: spi0-bus {
329 samsung,pins = "gpd8-0", "gpd8-1", "gpd6-0", "gpd6-1"; 331 samsung,pins = "gpd8-0", "gpd8-1", "gpd6-0", "gpd6-1";
330 samsung,pin-function = <2>; 332 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
331 samsung,pin-pud = <3>; 333 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
332 samsung,pin-drv = <0>; 334 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
333 }; 335 };
334 336
335 hs_i2c4_bus: hs-i2c4-bus { 337 hs_i2c4_bus: hs-i2c4-bus {
336 samsung,pins = "gpg3-1", "gpg3-0"; 338 samsung,pins = "gpg3-1", "gpg3-0";
337 samsung,pin-function = <2>; 339 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
338 samsung,pin-pud = <3>; 340 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
339 samsung,pin-drv = <0>; 341 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
340 }; 342 };
341 343
342 hs_i2c5_bus: hs-i2c5-bus { 344 hs_i2c5_bus: hs-i2c5-bus {
343 samsung,pins = "gpg3-3", "gpg3-2"; 345 samsung,pins = "gpg3-3", "gpg3-2";
344 samsung,pin-function = <2>; 346 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
345 samsung,pin-pud = <3>; 347 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
346 samsung,pin-drv = <0>; 348 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
347 }; 349 };
348}; 350};
349 351
@@ -358,9 +360,9 @@
358 360
359 hs_i2c6_bus: hs-i2c6-bus { 361 hs_i2c6_bus: hs-i2c6-bus {
360 samsung,pins = "gpj0-1", "gpj0-0"; 362 samsung,pins = "gpj0-1", "gpj0-0";
361 samsung,pin-function = <2>; 363 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
362 samsung,pin-pud = <3>; 364 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
363 samsung,pin-drv = <0>; 365 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
364 }; 366 };
365}; 367};
366 368
@@ -375,9 +377,9 @@
375 377
376 hs_i2c7_bus: hs-i2c7-bus { 378 hs_i2c7_bus: hs-i2c7-bus {
377 samsung,pins = "gpj1-1", "gpj1-0"; 379 samsung,pins = "gpj1-1", "gpj1-0";
378 samsung,pin-function = <2>; 380 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
379 samsung,pin-pud = <3>; 381 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
380 samsung,pin-drv = <0>; 382 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
381 }; 383 };
382}; 384};
383 385
@@ -392,9 +394,9 @@
392 394
393 spi3_bus: spi3-bus { 395 spi3_bus: spi3-bus {
394 samsung,pins = "gpg4-0", "gpg4-1", "gpg4-2", "gpg4-3"; 396 samsung,pins = "gpg4-0", "gpg4-1", "gpg4-2", "gpg4-3";
395 samsung,pin-function = <2>; 397 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
396 samsung,pin-pud = <3>; 398 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
397 samsung,pin-drv = <0>; 399 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
398 }; 400 };
399}; 401};
400 402
@@ -409,9 +411,9 @@
409 411
410 spi4_bus: spi4-bus { 412 spi4_bus: spi4-bus {
411 samsung,pins = "gpv7-0", "gpv7-1", "gpv7-2", "gpv7-3"; 413 samsung,pins = "gpv7-0", "gpv7-1", "gpv7-2", "gpv7-3";
412 samsung,pin-function = <2>; 414 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
413 samsung,pin-pud = <3>; 415 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
414 samsung,pin-drv = <0>; 416 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
415 }; 417 };
416}; 418};
417 419
@@ -426,37 +428,37 @@
426 428
427 sd2_clk: sd2-clk { 429 sd2_clk: sd2-clk {
428 samsung,pins = "gpr4-0"; 430 samsung,pins = "gpr4-0";
429 samsung,pin-function = <2>; 431 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
430 samsung,pin-pud = <0>; 432 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
431 samsung,pin-drv = <3>; 433 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
432 }; 434 };
433 435
434 sd2_cmd: sd2-cmd { 436 sd2_cmd: sd2-cmd {
435 samsung,pins = "gpr4-1"; 437 samsung,pins = "gpr4-1";
436 samsung,pin-function = <2>; 438 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
437 samsung,pin-pud = <0>; 439 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
438 samsung,pin-drv = <3>; 440 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
439 }; 441 };
440 442
441 sd2_cd: sd2-cd { 443 sd2_cd: sd2-cd {
442 samsung,pins = "gpr4-2"; 444 samsung,pins = "gpr4-2";
443 samsung,pin-function = <2>; 445 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
444 samsung,pin-pud = <3>; 446 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
445 samsung,pin-drv = <3>; 447 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
446 }; 448 };
447 449
448 sd2_bus1: sd2-bus-width1 { 450 sd2_bus1: sd2-bus-width1 {
449 samsung,pins = "gpr4-3"; 451 samsung,pins = "gpr4-3";
450 samsung,pin-function = <2>; 452 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
451 samsung,pin-pud = <3>; 453 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
452 samsung,pin-drv = <3>; 454 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
453 }; 455 };
454 456
455 sd2_bus4: sd2-bus-width4 { 457 sd2_bus4: sd2-bus-width4 {
456 samsung,pins = "gpr4-4", "gpr4-5", "gpr4-6"; 458 samsung,pins = "gpr4-4", "gpr4-5", "gpr4-6";
457 samsung,pin-function = <2>; 459 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
458 samsung,pin-pud = <3>; 460 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
459 samsung,pin-drv = <3>; 461 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
460 }; 462 };
461}; 463};
462 464
@@ -495,107 +497,107 @@
495 497
496 sd0_clk: sd0-clk { 498 sd0_clk: sd0-clk {
497 samsung,pins = "gpr0-0"; 499 samsung,pins = "gpr0-0";
498 samsung,pin-function = <2>; 500 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
499 samsung,pin-pud = <0>; 501 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
500 samsung,pin-drv = <4>; 502 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV2>;
501 }; 503 };
502 504
503 sd0_cmd: sd0-cmd { 505 sd0_cmd: sd0-cmd {
504 samsung,pins = "gpr0-1"; 506 samsung,pins = "gpr0-1";
505 samsung,pin-function = <2>; 507 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
506 samsung,pin-pud = <3>; 508 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
507 samsung,pin-drv = <4>; 509 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV2>;
508 }; 510 };
509 511
510 sd0_ds: sd0-ds { 512 sd0_ds: sd0-ds {
511 samsung,pins = "gpr0-2"; 513 samsung,pins = "gpr0-2";
512 samsung,pin-function = <2>; 514 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
513 samsung,pin-pud = <1>; 515 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
514 samsung,pin-drv = <4>; 516 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV2>;
515 }; 517 };
516 518
517 sd0_qrdy: sd0-qrdy { 519 sd0_qrdy: sd0-qrdy {
518 samsung,pins = "gpr0-3"; 520 samsung,pins = "gpr0-3";
519 samsung,pin-function = <2>; 521 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
520 samsung,pin-pud = <1>; 522 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
521 samsung,pin-drv = <4>; 523 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV2>;
522 }; 524 };
523 525
524 sd0_bus1: sd0-bus-width1 { 526 sd0_bus1: sd0-bus-width1 {
525 samsung,pins = "gpr1-0"; 527 samsung,pins = "gpr1-0";
526 samsung,pin-function = <2>; 528 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
527 samsung,pin-pud = <3>; 529 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
528 samsung,pin-drv = <4>; 530 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV2>;
529 }; 531 };
530 532
531 sd0_bus4: sd0-bus-width4 { 533 sd0_bus4: sd0-bus-width4 {
532 samsung,pins = "gpr1-1", "gpr1-2", "gpr1-3"; 534 samsung,pins = "gpr1-1", "gpr1-2", "gpr1-3";
533 samsung,pin-function = <2>; 535 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
534 samsung,pin-pud = <3>; 536 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
535 samsung,pin-drv = <4>; 537 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV2>;
536 }; 538 };
537 539
538 sd0_bus8: sd0-bus-width8 { 540 sd0_bus8: sd0-bus-width8 {
539 samsung,pins = "gpr1-4", "gpr1-5", "gpr1-6", "gpr1-7"; 541 samsung,pins = "gpr1-4", "gpr1-5", "gpr1-6", "gpr1-7";
540 samsung,pin-function = <2>; 542 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
541 samsung,pin-pud = <3>; 543 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
542 samsung,pin-drv = <4>; 544 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV2>;
543 }; 545 };
544 546
545 sd1_clk: sd1-clk { 547 sd1_clk: sd1-clk {
546 samsung,pins = "gpr2-0"; 548 samsung,pins = "gpr2-0";
547 samsung,pin-function = <2>; 549 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
548 samsung,pin-pud = <0>; 550 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
549 samsung,pin-drv = <2>; 551 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV3>;
550 }; 552 };
551 553
552 sd1_cmd: sd1-cmd { 554 sd1_cmd: sd1-cmd {
553 samsung,pins = "gpr2-1"; 555 samsung,pins = "gpr2-1";
554 samsung,pin-function = <2>; 556 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
555 samsung,pin-pud = <0>; 557 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
556 samsung,pin-drv = <2>; 558 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV3>;
557 }; 559 };
558 560
559 sd1_ds: sd1-ds { 561 sd1_ds: sd1-ds {
560 samsung,pins = "gpr2-2"; 562 samsung,pins = "gpr2-2";
561 samsung,pin-function = <2>; 563 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
562 samsung,pin-pud = <1>; 564 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
563 samsung,pin-drv = <6>; 565 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV4>;
564 }; 566 };
565 567
566 sd1_qrdy: sd1-qrdy { 568 sd1_qrdy: sd1-qrdy {
567 samsung,pins = "gpr2-3"; 569 samsung,pins = "gpr2-3";
568 samsung,pin-function = <2>; 570 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
569 samsung,pin-pud = <1>; 571 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
570 samsung,pin-drv = <6>; 572 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV4>;
571 }; 573 };
572 574
573 sd1_int: sd1-int { 575 sd1_int: sd1-int {
574 samsung,pins = "gpr2-4"; 576 samsung,pins = "gpr2-4";
575 samsung,pin-function = <2>; 577 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
576 samsung,pin-pud = <1>; 578 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
577 samsung,pin-drv = <6>; 579 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV4>;
578 }; 580 };
579 581
580 sd1_bus1: sd1-bus-width1 { 582 sd1_bus1: sd1-bus-width1 {
581 samsung,pins = "gpr3-0"; 583 samsung,pins = "gpr3-0";
582 samsung,pin-function = <2>; 584 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
583 samsung,pin-pud = <3>; 585 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
584 samsung,pin-drv = <2>; 586 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV3>;
585 }; 587 };
586 588
587 sd1_bus4: sd1-bus-width4 { 589 sd1_bus4: sd1-bus-width4 {
588 samsung,pins = "gpr3-1", "gpr3-2", "gpr3-3"; 590 samsung,pins = "gpr3-1", "gpr3-2", "gpr3-3";
589 samsung,pin-function = <2>; 591 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
590 samsung,pin-pud = <3>; 592 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
591 samsung,pin-drv = <2>; 593 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV3>;
592 }; 594 };
593 595
594 sd1_bus8: sd1-bus-width8 { 596 sd1_bus8: sd1-bus-width8 {
595 samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7"; 597 samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7";
596 samsung,pin-function = <2>; 598 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
597 samsung,pin-pud = <3>; 599 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
598 samsung,pin-drv = <2>; 600 samsung,pin-drv = <EXYNOS7_FSYS1_PIN_DRV_LV3>;
599 }; 601 };
600}; 602};
601 603
@@ -682,22 +684,22 @@
682 684
683 spi5_bus: spi5-bus { 685 spi5_bus: spi5-bus {
684 samsung,pins = "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3"; 686 samsung,pins = "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3";
685 samsung,pin-function = <2>; 687 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
686 samsung,pin-pud = <3>; 688 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
687 samsung,pin-drv = <0>; 689 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
688 }; 690 };
689 691
690 ufs_refclk_out: ufs-refclk-out { 692 ufs_refclk_out: ufs-refclk-out {
691 samsung,pins = "gpg2-4"; 693 samsung,pins = "gpg2-4";
692 samsung,pin-function = <2>; 694 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
693 samsung,pin-pud = <0>; 695 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
694 samsung,pin-drv = <2>; 696 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>;
695 }; 697 };
696 698
697 ufs_rst_n: ufs-rst-n { 699 ufs_rst_n: ufs-rst-n {
698 samsung,pins = "gph1-5"; 700 samsung,pins = "gph1-5";
699 samsung,pin-function = <2>; 701 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
700 samsung,pin-pud = <3>; 702 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
701 samsung,pin-drv = <0>; 703 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
702 }; 704 };
703}; 705};
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index 80aa60e38237..9a3fbed1765a 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -603,6 +603,40 @@
603 #include "exynos7-trip-points.dtsi" 603 #include "exynos7-trip-points.dtsi"
604 }; 604 };
605 }; 605 };
606
607 usbdrd_phy: phy@15500000 {
608 compatible = "samsung,exynos7-usbdrd-phy";
609 reg = <0x15500000 0x100>;
610 clocks = <&clock_fsys0 ACLK_USBDRD300>,
611 <&clock_fsys0 OSCCLK_PHY_CLKOUT_USB30_PHY>,
612 <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER>,
613 <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PHYCLK_USER>,
614 <&clock_fsys0 SCLK_USBDRD300_REFCLK>;
615 clock-names = "phy", "ref", "phy_pipe",
616 "phy_utmi", "itp";
617 samsung,pmu-syscon = <&pmu_system_controller>;
618 #phy-cells = <1>;
619 };
620
621 usbdrd3 {
622 compatible = "samsung,exynos7-dwusb3";
623 clocks = <&clock_fsys0 ACLK_USBDRD300>,
624 <&clock_fsys0 SCLK_USBDRD300_SUSPENDCLK>,
625 <&clock_fsys0 ACLK_AXIUS_USBDRD30X_FSYS0X>;
626 clock-names = "usbdrd30", "usbdrd30_susp_clk",
627 "usbdrd30_axius_clk";
628 #address-cells = <1>;
629 #size-cells = <1>;
630 ranges;
631
632 dwc3@15400000 {
633 compatible = "snps,dwc3";
634 reg = <0x15400000 0x10000>;
635 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
636 phys = <&usbdrd_phy 0>, <&usbdrd_phy 1>;
637 phy-names = "usb2-phy", "usb3-phy";
638 };
639 };
606 }; 640 };
607}; 641};
608 642
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 9d9af446bafc..1c1ec137a3cc 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -564,6 +564,46 @@ static struct clk_gate gxbb_clk81 = {
564 }, 564 },
565}; 565};
566 566
567static struct clk_mux gxbb_sar_adc_clk_sel = {
568 .reg = (void *)HHI_SAR_CLK_CNTL,
569 .mask = 0x3,
570 .shift = 9,
571 .lock = &clk_lock,
572 .hw.init = &(struct clk_init_data){
573 .name = "sar_adc_clk_sel",
574 .ops = &clk_mux_ops,
575 /* NOTE: The datasheet doesn't list the parents for bit 10 */
576 .parent_names = (const char *[]){ "xtal", "clk81", },
577 .num_parents = 2,
578 },
579};
580
581static struct clk_divider gxbb_sar_adc_clk_div = {
582 .reg = (void *)HHI_SAR_CLK_CNTL,
583 .shift = 0,
584 .width = 8,
585 .lock = &clk_lock,
586 .hw.init = &(struct clk_init_data){
587 .name = "sar_adc_clk_div",
588 .ops = &clk_divider_ops,
589 .parent_names = (const char *[]){ "sar_adc_clk_sel" },
590 .num_parents = 1,
591 },
592};
593
594static struct clk_gate gxbb_sar_adc_clk = {
595 .reg = (void *)HHI_SAR_CLK_CNTL,
596 .bit_idx = 8,
597 .lock = &clk_lock,
598 .hw.init = &(struct clk_init_data){
599 .name = "sar_adc_clk",
600 .ops = &clk_gate_ops,
601 .parent_names = (const char *[]){ "sar_adc_clk_div" },
602 .num_parents = 1,
603 .flags = CLK_SET_RATE_PARENT,
604 },
605};
606
567/* Everything Else (EE) domain gates */ 607/* Everything Else (EE) domain gates */
568static MESON_GATE(gxbb_ddr, HHI_GCLK_MPEG0, 0); 608static MESON_GATE(gxbb_ddr, HHI_GCLK_MPEG0, 0);
569static MESON_GATE(gxbb_dos, HHI_GCLK_MPEG0, 1); 609static MESON_GATE(gxbb_dos, HHI_GCLK_MPEG0, 1);
@@ -754,6 +794,9 @@ static struct clk_hw_onecell_data gxbb_hw_onecell_data = {
754 [CLKID_SD_EMMC_A] = &gxbb_emmc_a.hw, 794 [CLKID_SD_EMMC_A] = &gxbb_emmc_a.hw,
755 [CLKID_SD_EMMC_B] = &gxbb_emmc_b.hw, 795 [CLKID_SD_EMMC_B] = &gxbb_emmc_b.hw,
756 [CLKID_SD_EMMC_C] = &gxbb_emmc_c.hw, 796 [CLKID_SD_EMMC_C] = &gxbb_emmc_c.hw,
797 [CLKID_SAR_ADC_CLK] = &gxbb_sar_adc_clk.hw,
798 [CLKID_SAR_ADC_SEL] = &gxbb_sar_adc_clk_sel.hw,
799 [CLKID_SAR_ADC_DIV] = &gxbb_sar_adc_clk_div.hw,
757 }, 800 },
758 .num = NR_CLKS, 801 .num = NR_CLKS,
759}; 802};
@@ -856,6 +899,7 @@ static struct clk_gate *gxbb_clk_gates[] = {
856 &gxbb_emmc_a, 899 &gxbb_emmc_a,
857 &gxbb_emmc_b, 900 &gxbb_emmc_b,
858 &gxbb_emmc_c, 901 &gxbb_emmc_c,
902 &gxbb_sar_adc_clk,
859}; 903};
860 904
861static int gxbb_clkc_probe(struct platform_device *pdev) 905static int gxbb_clkc_probe(struct platform_device *pdev)
@@ -888,6 +932,10 @@ static int gxbb_clkc_probe(struct platform_device *pdev)
888 gxbb_mpeg_clk_sel.reg = clk_base + (u64)gxbb_mpeg_clk_sel.reg; 932 gxbb_mpeg_clk_sel.reg = clk_base + (u64)gxbb_mpeg_clk_sel.reg;
889 gxbb_mpeg_clk_div.reg = clk_base + (u64)gxbb_mpeg_clk_div.reg; 933 gxbb_mpeg_clk_div.reg = clk_base + (u64)gxbb_mpeg_clk_div.reg;
890 934
935 /* Populate the base address for the SAR ADC clks */
936 gxbb_sar_adc_clk_sel.reg = clk_base + (u64)gxbb_sar_adc_clk_sel.reg;
937 gxbb_sar_adc_clk_div.reg = clk_base + (u64)gxbb_sar_adc_clk_div.reg;
938
891 /* Populate base address for gates */ 939 /* Populate base address for gates */
892 for (i = 0; i < ARRAY_SIZE(gxbb_clk_gates); i++) 940 for (i = 0; i < ARRAY_SIZE(gxbb_clk_gates); i++)
893 gxbb_clk_gates[i]->reg = clk_base + 941 gxbb_clk_gates[i]->reg = clk_base +
diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h
index 0252939ba58f..8ee2022ce5d5 100644
--- a/drivers/clk/meson/gxbb.h
+++ b/drivers/clk/meson/gxbb.h
@@ -191,7 +191,7 @@
191#define CLKID_PERIPHS 20 191#define CLKID_PERIPHS 20
192#define CLKID_SPICC 21 192#define CLKID_SPICC 21
193/* CLKID_I2C */ 193/* CLKID_I2C */
194#define CLKID_SAR_ADC 23 194/* #define CLKID_SAR_ADC */
195#define CLKID_SMART_CARD 24 195#define CLKID_SMART_CARD 24
196#define CLKID_RNG0 25 196#define CLKID_RNG0 25
197#define CLKID_UART0 26 197#define CLKID_UART0 26
@@ -204,7 +204,7 @@
204#define CLKID_ASSIST_MISC 33 204#define CLKID_ASSIST_MISC 33
205/* CLKID_SPI */ 205/* CLKID_SPI */
206#define CLKID_I2S_SPDIF 35 206#define CLKID_I2S_SPDIF 35
207#define CLKID_ETH 36 207/* CLKID_ETH */
208#define CLKID_DEMUX 37 208#define CLKID_DEMUX 37
209#define CLKID_AIU_GLUE 38 209#define CLKID_AIU_GLUE 38
210#define CLKID_IEC958 39 210#define CLKID_IEC958 39
@@ -231,13 +231,13 @@
231#define CLKID_AHB_DATA_BUS 60 231#define CLKID_AHB_DATA_BUS 60
232#define CLKID_AHB_CTRL_BUS 61 232#define CLKID_AHB_CTRL_BUS 61
233#define CLKID_HDMI_INTR_SYNC 62 233#define CLKID_HDMI_INTR_SYNC 62
234#define CLKID_HDMI_PCLK 63 234/* CLKID_HDMI_PCLK */
235/* CLKID_USB1_DDR_BRIDGE */ 235/* CLKID_USB1_DDR_BRIDGE */
236/* CLKID_USB0_DDR_BRIDGE */ 236/* CLKID_USB0_DDR_BRIDGE */
237#define CLKID_MMC_PCLK 66 237#define CLKID_MMC_PCLK 66
238#define CLKID_DVIN 67 238#define CLKID_DVIN 67
239#define CLKID_UART2 68 239#define CLKID_UART2 68
240#define CLKID_SANA 69 240/* #define CLKID_SANA */
241#define CLKID_VPU_INTR 70 241#define CLKID_VPU_INTR 70
242#define CLKID_SEC_AHB_AHB3_BRIDGE 71 242#define CLKID_SEC_AHB_AHB3_BRIDGE 71
243#define CLKID_CLK81_A53 72 243#define CLKID_CLK81_A53 72
@@ -245,7 +245,7 @@
245#define CLKID_VCLK2_VENCI1 74 245#define CLKID_VCLK2_VENCI1 74
246#define CLKID_VCLK2_VENCP0 75 246#define CLKID_VCLK2_VENCP0 75
247#define CLKID_VCLK2_VENCP1 76 247#define CLKID_VCLK2_VENCP1 76
248#define CLKID_GCLK_VENCI_INT0 77 248/* CLKID_GCLK_VENCI_INT0 */
249#define CLKID_GCLK_VENCI_INT 78 249#define CLKID_GCLK_VENCI_INT 78
250#define CLKID_DAC_CLK 79 250#define CLKID_DAC_CLK 79
251#define CLKID_AOCLK_GATE 80 251#define CLKID_AOCLK_GATE 80
@@ -265,8 +265,11 @@
265/* CLKID_SD_EMMC_A */ 265/* CLKID_SD_EMMC_A */
266/* CLKID_SD_EMMC_B */ 266/* CLKID_SD_EMMC_B */
267/* CLKID_SD_EMMC_C */ 267/* CLKID_SD_EMMC_C */
268/* CLKID_SAR_ADC_CLK */
269/* CLKID_SAR_ADC_SEL */
270#define CLKID_SAR_ADC_DIV 99
268 271
269#define NR_CLKS 97 272#define NR_CLKS 100
270 273
271/* include the CLKIDs that have been made part of the stable DT binding */ 274/* include the CLKIDs that have been made part of the stable DT binding */
272#include <dt-bindings/clock/gxbb-clkc.h> 275#include <dt-bindings/clock/gxbb-clkc.h>
diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
index f096bd7df40c..3feaea8be40e 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -739,7 +739,9 @@ static const struct samsung_pll_rate_table exynos5443_pll_rates[] __initconst =
739 PLL_35XX_RATE(350000000U, 350, 6, 2), 739 PLL_35XX_RATE(350000000U, 350, 6, 2),
740 PLL_35XX_RATE(333000000U, 222, 4, 2), 740 PLL_35XX_RATE(333000000U, 222, 4, 2),
741 PLL_35XX_RATE(300000000U, 500, 5, 3), 741 PLL_35XX_RATE(300000000U, 500, 5, 3),
742 PLL_35XX_RATE(278000000U, 556, 6, 3),
742 PLL_35XX_RATE(266000000U, 532, 6, 3), 743 PLL_35XX_RATE(266000000U, 532, 6, 3),
744 PLL_35XX_RATE(250000000U, 500, 6, 3),
743 PLL_35XX_RATE(200000000U, 400, 6, 3), 745 PLL_35XX_RATE(200000000U, 400, 6, 3),
744 PLL_35XX_RATE(166000000U, 332, 6, 3), 746 PLL_35XX_RATE(166000000U, 332, 6, 3),
745 PLL_35XX_RATE(160000000U, 320, 6, 3), 747 PLL_35XX_RATE(160000000U, 320, 6, 3),
@@ -2559,8 +2561,10 @@ static const struct samsung_fixed_rate_clock disp_fixed_clks[] __initconst = {
2559 FRATE(0, "phyclk_mipidphy1_bitclkdiv8_phy", NULL, 0, 188000000), 2561 FRATE(0, "phyclk_mipidphy1_bitclkdiv8_phy", NULL, 0, 188000000),
2560 FRATE(0, "phyclk_mipidphy1_rxclkesc0_phy", NULL, 0, 100000000), 2562 FRATE(0, "phyclk_mipidphy1_rxclkesc0_phy", NULL, 0, 100000000),
2561 /* PHY clocks from MIPI_DPHY0 */ 2563 /* PHY clocks from MIPI_DPHY0 */
2562 FRATE(0, "phyclk_mipidphy0_bitclkdiv8_phy", NULL, 0, 188000000), 2564 FRATE(CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY, "phyclk_mipidphy0_bitclkdiv8_phy",
2563 FRATE(0, "phyclk_mipidphy0_rxclkesc0_phy", NULL, 0, 100000000), 2565 NULL, 0, 188000000),
2566 FRATE(CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY, "phyclk_mipidphy0_rxclkesc0_phy",
2567 NULL, 0, 100000000),
2564 /* PHY clocks from HDMI_PHY */ 2568 /* PHY clocks from HDMI_PHY */
2565 FRATE(CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY, "phyclk_hdmiphy_tmds_clko_phy", 2569 FRATE(CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY, "phyclk_hdmiphy_tmds_clko_phy",
2566 NULL, 0, 300000000), 2570 NULL, 0, 300000000),
diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h
index 4fa6bb2136e3..be39d23e6a32 100644
--- a/include/dt-bindings/clock/exynos5433.h
+++ b/include/dt-bindings/clock/exynos5433.h
@@ -771,7 +771,10 @@
771 771
772#define CLK_PCLK_DECON 113 772#define CLK_PCLK_DECON 113
773 773
774#define DISP_NR_CLK 114 774#define CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY 114
775#define CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY 115
776
777#define DISP_NR_CLK 116
775 778
776/* CMU_AUD */ 779/* CMU_AUD */
777#define CLK_MOUT_AUD_PLL_USER 1 780#define CLK_MOUT_AUD_PLL_USER 1
diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h
index baade6f429d0..692846c7941b 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -14,15 +14,21 @@
14#define CLKID_MPLL2 15 14#define CLKID_MPLL2 15
15#define CLKID_SPI 34 15#define CLKID_SPI 34
16#define CLKID_I2C 22 16#define CLKID_I2C 22
17#define CLKID_SAR_ADC 23
17#define CLKID_ETH 36 18#define CLKID_ETH 36
18#define CLKID_USB0 50 19#define CLKID_USB0 50
19#define CLKID_USB1 51 20#define CLKID_USB1 51
20#define CLKID_USB 55 21#define CLKID_USB 55
22#define CLKID_HDMI_PCLK 63
21#define CLKID_USB1_DDR_BRIDGE 64 23#define CLKID_USB1_DDR_BRIDGE 64
22#define CLKID_USB0_DDR_BRIDGE 65 24#define CLKID_USB0_DDR_BRIDGE 65
25#define CLKID_SANA 69
26#define CLKID_GCLK_VENCI_INT0 77
23#define CLKID_AO_I2C 93 27#define CLKID_AO_I2C 93
24#define CLKID_SD_EMMC_A 94 28#define CLKID_SD_EMMC_A 94
25#define CLKID_SD_EMMC_B 95 29#define CLKID_SD_EMMC_B 95
26#define CLKID_SD_EMMC_C 96 30#define CLKID_SD_EMMC_C 96
31#define CLKID_SAR_ADC_CLK 97
32#define CLKID_SAR_ADC_SEL 98
27 33
28#endif /* __GXBB_CLKC_H */ 34#endif /* __GXBB_CLKC_H */
diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h
index e0ebb20ffdd3..b7aa3646208b 100644
--- a/include/dt-bindings/pinctrl/samsung.h
+++ b/include/dt-bindings/pinctrl/samsung.h
@@ -68,4 +68,12 @@
68#define EXYNOS_PIN_FUNC_6 6 68#define EXYNOS_PIN_FUNC_6 6
69#define EXYNOS_PIN_FUNC_F 0xf 69#define EXYNOS_PIN_FUNC_F 0xf
70 70
71/* Drive strengths for Exynos7 FSYS1 block */
72#define EXYNOS7_FSYS1_PIN_DRV_LV1 0
73#define EXYNOS7_FSYS1_PIN_DRV_LV2 4
74#define EXYNOS7_FSYS1_PIN_DRV_LV3 2
75#define EXYNOS7_FSYS1_PIN_DRV_LV4 6
76#define EXYNOS7_FSYS1_PIN_DRV_LV5 1
77#define EXYNOS7_FSYS1_PIN_DRV_LV6 5
78
71#endif /* __DT_BINDINGS_PINCTRL_SAMSUNG_H__ */ 79#endif /* __DT_BINDINGS_PINCTRL_SAMSUNG_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2025-05-28 16:25:04 -0400