diff options
| -rw-r--r-- | drivers/pinctrl/pinctrl-at91.c | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index 087f994dcdeb..ecf77eb3d69e 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c | |||
| @@ -451,18 +451,18 @@ static enum at91_mux at91_mux_get_periph(void __iomem *pio, unsigned mask) | |||
| 451 | 451 | ||
| 452 | static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin) | 452 | static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin) |
| 453 | { | 453 | { |
| 454 | return (__raw_readl(pio + PIO_IFSR) >> pin) & 0x1; | 454 | return (readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1; |
| 455 | } | 455 | } |
| 456 | 456 | ||
| 457 | static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) | 457 | static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) |
| 458 | { | 458 | { |
| 459 | __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR)); | 459 | writel_relaxed(mask, pio + (is_on ? PIO_IFER : PIO_IFDR)); |
| 460 | } | 460 | } |
| 461 | 461 | ||
| 462 | static bool at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin) | 462 | static bool at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin) |
| 463 | { | 463 | { |
| 464 | if ((__raw_readl(pio + PIO_IFSR) >> pin) & 0x1) | 464 | if ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) |
| 465 | return !((__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1); | 465 | return !((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1); |
| 466 | 466 | ||
| 467 | return false; | 467 | return false; |
| 468 | } | 468 | } |
| @@ -470,55 +470,55 @@ static bool at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin) | |||
| 470 | static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) | 470 | static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) |
| 471 | { | 471 | { |
| 472 | if (is_on) | 472 | if (is_on) |
| 473 | __raw_writel(mask, pio + PIO_IFSCDR); | 473 | writel_relaxed(mask, pio + PIO_IFSCDR); |
| 474 | at91_mux_set_deglitch(pio, mask, is_on); | 474 | at91_mux_set_deglitch(pio, mask, is_on); |
| 475 | } | 475 | } |
| 476 | 476 | ||
| 477 | static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div) | 477 | static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div) |
| 478 | { | 478 | { |
| 479 | *div = __raw_readl(pio + PIO_SCDR); | 479 | *div = readl_relaxed(pio + PIO_SCDR); |
| 480 | 480 | ||
| 481 | return ((__raw_readl(pio + PIO_IFSR) >> pin) & 0x1) && | 481 | return ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) && |
| 482 | ((__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1); | 482 | ((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1); |
| 483 | } | 483 | } |
| 484 | 484 | ||
| 485 | static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask, | 485 | static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask, |
| 486 | bool is_on, u32 div) | 486 | bool is_on, u32 div) |
| 487 | { | 487 | { |
| 488 | if (is_on) { | 488 | if (is_on) { |
| 489 | __raw_writel(mask, pio + PIO_IFSCER); | 489 | writel_relaxed(mask, pio + PIO_IFSCER); |
| 490 | __raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR); | 490 | writel_relaxed(div & PIO_SCDR_DIV, pio + PIO_SCDR); |
| 491 | __raw_writel(mask, pio + PIO_IFER); | 491 | writel_relaxed(mask, pio + PIO_IFER); |
| 492 | } else | 492 | } else |
| 493 | __raw_writel(mask, pio + PIO_IFSCDR); | 493 | writel_relaxed(mask, pio + PIO_IFSCDR); |
| 494 | } | 494 | } |
| 495 | 495 | ||
| 496 | static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin) | 496 | static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin) |
| 497 | { | 497 | { |
| 498 | return !((__raw_readl(pio + PIO_PPDSR) >> pin) & 0x1); | 498 | return !((readl_relaxed(pio + PIO_PPDSR) >> pin) & 0x1); |
| 499 | } | 499 | } |
| 500 | 500 | ||
| 501 | static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on) | 501 | static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on) |
| 502 | { | 502 | { |
| 503 | if (is_on) | 503 | if (is_on) |
| 504 | __raw_writel(mask, pio + PIO_PUDR); | 504 | writel_relaxed(mask, pio + PIO_PUDR); |
| 505 | 505 | ||
| 506 | __raw_writel(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR)); | 506 | writel_relaxed(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR)); |
| 507 | } | 507 | } |
| 508 | 508 | ||
| 509 | static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask) | 509 | static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask) |
| 510 | { | 510 | { |
| 511 | __raw_writel(__raw_readl(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT); | 511 | writel_relaxed(readl_relaxed(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT); |
| 512 | } | 512 | } |
| 513 | 513 | ||
| 514 | static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin) | 514 | static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin) |
| 515 | { | 515 | { |
| 516 | return (__raw_readl(pio + PIO_SCHMITT) >> pin) & 0x1; | 516 | return (readl_relaxed(pio + PIO_SCHMITT) >> pin) & 0x1; |
| 517 | } | 517 | } |
| 518 | 518 | ||
| 519 | static inline u32 read_drive_strength(void __iomem *reg, unsigned pin) | 519 | static inline u32 read_drive_strength(void __iomem *reg, unsigned pin) |
| 520 | { | 520 | { |
| 521 | unsigned tmp = __raw_readl(reg); | 521 | unsigned tmp = readl_relaxed(reg); |
| 522 | 522 | ||
| 523 | tmp = tmp >> two_bit_pin_value_shift_amount(pin); | 523 | tmp = tmp >> two_bit_pin_value_shift_amount(pin); |
| 524 | 524 | ||
| @@ -554,13 +554,13 @@ static unsigned at91_mux_sam9x5_get_drivestrength(void __iomem *pio, | |||
| 554 | 554 | ||
| 555 | static void set_drive_strength(void __iomem *reg, unsigned pin, u32 strength) | 555 | static void set_drive_strength(void __iomem *reg, unsigned pin, u32 strength) |
| 556 | { | 556 | { |
| 557 | unsigned tmp = __raw_readl(reg); | 557 | unsigned tmp = readl_relaxed(reg); |
| 558 | unsigned shift = two_bit_pin_value_shift_amount(pin); | 558 | unsigned shift = two_bit_pin_value_shift_amount(pin); |
| 559 | 559 | ||
| 560 | tmp &= ~(DRIVE_STRENGTH_MASK << shift); | 560 | tmp &= ~(DRIVE_STRENGTH_MASK << shift); |
| 561 | tmp |= strength << shift; | 561 | tmp |= strength << shift; |
| 562 | 562 | ||
| 563 | __raw_writel(tmp, reg); | 563 | writel_relaxed(tmp, reg); |
| 564 | } | 564 | } |
| 565 | 565 | ||
| 566 | static void at91_mux_sama5d3_set_drivestrength(void __iomem *pio, unsigned pin, | 566 | static void at91_mux_sama5d3_set_drivestrength(void __iomem *pio, unsigned pin, |
| @@ -1534,9 +1534,9 @@ void at91_pinctrl_gpio_suspend(void) | |||
| 1534 | 1534 | ||
| 1535 | pio = gpio_chips[i]->regbase; | 1535 | pio = gpio_chips[i]->regbase; |
| 1536 | 1536 | ||
| 1537 | backups[i] = __raw_readl(pio + PIO_IMR); | 1537 | backups[i] = readl_relaxed(pio + PIO_IMR); |
| 1538 | __raw_writel(backups[i], pio + PIO_IDR); | 1538 | writel_relaxed(backups[i], pio + PIO_IDR); |
| 1539 | __raw_writel(wakeups[i], pio + PIO_IER); | 1539 | writel_relaxed(wakeups[i], pio + PIO_IER); |
| 1540 | 1540 | ||
| 1541 | if (!wakeups[i]) | 1541 | if (!wakeups[i]) |
| 1542 | clk_disable_unprepare(gpio_chips[i]->clock); | 1542 | clk_disable_unprepare(gpio_chips[i]->clock); |
| @@ -1561,8 +1561,8 @@ void at91_pinctrl_gpio_resume(void) | |||
| 1561 | if (!wakeups[i]) | 1561 | if (!wakeups[i]) |
| 1562 | clk_prepare_enable(gpio_chips[i]->clock); | 1562 | clk_prepare_enable(gpio_chips[i]->clock); |
| 1563 | 1563 | ||
| 1564 | __raw_writel(wakeups[i], pio + PIO_IDR); | 1564 | writel_relaxed(wakeups[i], pio + PIO_IDR); |
| 1565 | __raw_writel(backups[i], pio + PIO_IER); | 1565 | writel_relaxed(backups[i], pio + PIO_IER); |
| 1566 | } | 1566 | } |
| 1567 | } | 1567 | } |
| 1568 | 1568 | ||
