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-rw-r--r--drivers/gpu/drm/i915/intel_atomic.c45
-rw-r--r--drivers/gpu/drm/i915/intel_display.c11
2 files changed, 14 insertions, 42 deletions
diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c
index 7ed8033aae60..8e35e0d013df 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -129,8 +129,9 @@ int intel_atomic_commit(struct drm_device *dev,
129 struct drm_atomic_state *state, 129 struct drm_atomic_state *state,
130 bool async) 130 bool async)
131{ 131{
132 int ret; 132 struct drm_crtc_state *crtc_state;
133 int i; 133 struct drm_crtc *crtc;
134 int ret, i;
134 135
135 if (async) { 136 if (async) {
136 DRM_DEBUG_KMS("i915 does not yet support async commit\n"); 137 DRM_DEBUG_KMS("i915 does not yet support async commit\n");
@@ -142,48 +143,18 @@ int intel_atomic_commit(struct drm_device *dev,
142 return ret; 143 return ret;
143 144
144 /* Point of no return */ 145 /* Point of no return */
145 146 drm_atomic_helper_swap_state(dev, state);
146 /*
147 * FIXME: The proper sequence here will eventually be:
148 *
149 * drm_atomic_helper_swap_state(dev, state)
150 * drm_atomic_helper_commit_modeset_disables(dev, state);
151 * drm_atomic_helper_commit_planes(dev, state);
152 * drm_atomic_helper_commit_modeset_enables(dev, state);
153 * drm_atomic_helper_wait_for_vblanks(dev, state);
154 * drm_atomic_helper_cleanup_planes(dev, state);
155 * drm_atomic_state_free(state);
156 *
157 * once we have full atomic modeset. For now, just manually update
158 * plane states to avoid clobbering good states with dummy states
159 * while nuclear pageflipping.
160 */
161 for (i = 0; i < dev->mode_config.num_total_plane; i++) {
162 struct drm_plane *plane = state->planes[i];
163
164 if (!plane)
165 continue;
166
167 plane->state->state = state;
168 swap(state->plane_states[i], plane->state);
169 plane->state->state = NULL;
170 }
171 147
172 /* swap crtc_scaler_state */ 148 /* swap crtc_scaler_state */
173 for (i = 0; i < dev->mode_config.num_crtc; i++) { 149 for_each_crtc_in_state(state, crtc, crtc_state, i) {
174 struct drm_crtc *crtc = state->crtcs[i]; 150 to_intel_crtc(crtc)->config = to_intel_crtc_state(crtc->state);
175 if (!crtc) {
176 continue;
177 }
178
179 to_intel_crtc(crtc)->config->scaler_state =
180 to_intel_crtc_state(state->crtc_states[i])->scaler_state;
181 151
182 if (INTEL_INFO(dev)->gen >= 9) 152 if (INTEL_INFO(dev)->gen >= 9)
183 skl_detach_scalers(to_intel_crtc(crtc)); 153 skl_detach_scalers(to_intel_crtc(crtc));
154
155 drm_atomic_helper_commit_planes_on_crtc(crtc_state);
184 } 156 }
185 157
186 drm_atomic_helper_commit_planes(dev, state);
187 drm_atomic_helper_wait_for_vblanks(dev, state); 158 drm_atomic_helper_wait_for_vblanks(dev, state);
188 drm_atomic_helper_cleanup_planes(dev, state); 159 drm_atomic_helper_cleanup_planes(dev, state);
189 drm_atomic_state_free(state); 160 drm_atomic_state_free(state);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index faf4d186caf7..87476ff181dd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12626,17 +12626,17 @@ static int __intel_set_mode(struct drm_crtc *modeset_crtc,
12626 12626
12627 modeset_update_crtc_power_domains(state); 12627 modeset_update_crtc_power_domains(state);
12628 12628
12629 drm_atomic_helper_commit_planes(dev, state);
12630
12631 /* Now enable the clocks, plane, pipe, and connectors that we set up. */ 12629 /* Now enable the clocks, plane, pipe, and connectors that we set up. */
12632 for_each_crtc_in_state(state, crtc, crtc_state, i) { 12630 for_each_crtc_in_state(state, crtc, crtc_state, i) {
12633 if (!needs_modeset(crtc->state) || !crtc->state->enable) 12631 if (!needs_modeset(crtc->state) || !crtc->state->enable) {
12632 drm_atomic_helper_commit_planes_on_crtc(crtc_state);
12634 continue; 12633 continue;
12634 }
12635 12635
12636 update_scanline_offset(to_intel_crtc(crtc)); 12636 update_scanline_offset(to_intel_crtc(crtc));
12637 12637
12638 dev_priv->display.crtc_enable(crtc); 12638 dev_priv->display.crtc_enable(crtc);
12639 intel_crtc_enable_planes(crtc); 12639 drm_atomic_helper_commit_planes_on_crtc(crtc_state);
12640 } 12640 }
12641 12641
12642 /* FIXME: add subpixel order */ 12642 /* FIXME: add subpixel order */
@@ -13269,7 +13269,7 @@ intel_check_primary_plane(struct drm_plane *plane,
13269 if (IS_BROADWELL(dev)) 13269 if (IS_BROADWELL(dev))
13270 intel_crtc->atomic.wait_vblank = true; 13270 intel_crtc->atomic.wait_vblank = true;
13271 13271
13272 if (crtc_state && !needs_modeset(&crtc_state->base)) 13272 if (crtc_state)
13273 intel_crtc->atomic.post_enable_primary = true; 13273 intel_crtc->atomic.post_enable_primary = true;
13274 } 13274 }
13275 13275
@@ -15004,6 +15004,7 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
15004 struct intel_plane_state *plane_state; 15004 struct intel_plane_state *plane_state;
15005 15005
15006 memset(crtc->config, 0, sizeof(*crtc->config)); 15006 memset(crtc->config, 0, sizeof(*crtc->config));
15007 crtc->config->base.crtc = &crtc->base;
15007 15008
15008 crtc->config->quirks |= PIPE_CONFIG_QUIRK_INHERITED_MODE; 15009 crtc->config->quirks |= PIPE_CONFIG_QUIRK_INHERITED_MODE;
15009 15010