aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--drivers/gpu/drm/arm/hdlcd_crtc.c47
-rw-r--r--drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c36
-rw-r--r--drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c4
-rw-r--r--drivers/gpu/drm/i915/gvt/handlers.c2
-rw-r--r--drivers/gpu/drm/i915/gvt/render.c3
-rw-r--r--drivers/gpu/drm/i915/gvt/sched_policy.c8
-rw-r--r--drivers/gpu/drm/i915/i915_gem_gtt.c12
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h10
-rw-r--r--drivers/gpu/drm/i915/intel_cdclk.c6
-rw-r--r--drivers/gpu/drm/i915/intel_dsi.c7
-rw-r--r--drivers/gpu/drm/i915/intel_lpe_audio.c5
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_display.c6
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drm.c6
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c3
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c4
-rw-r--r--drivers/gpu/host1x/Kconfig1
-rw-r--r--sound/x86/intel_hdmi_audio.c4
17 files changed, 94 insertions, 70 deletions
diff --git a/drivers/gpu/drm/arm/hdlcd_crtc.c b/drivers/gpu/drm/arm/hdlcd_crtc.c
index 798a3cc480a2..1a3359c0f6cd 100644
--- a/drivers/gpu/drm/arm/hdlcd_crtc.c
+++ b/drivers/gpu/drm/arm/hdlcd_crtc.c
@@ -10,6 +10,7 @@
10 */ 10 */
11 11
12#include <drm/drmP.h> 12#include <drm/drmP.h>
13#include <drm/drm_atomic.h>
13#include <drm/drm_atomic_helper.h> 14#include <drm/drm_atomic_helper.h>
14#include <drm/drm_crtc.h> 15#include <drm/drm_crtc.h>
15#include <drm/drm_crtc_helper.h> 16#include <drm/drm_crtc_helper.h>
@@ -226,16 +227,33 @@ static const struct drm_crtc_helper_funcs hdlcd_crtc_helper_funcs = {
226static int hdlcd_plane_atomic_check(struct drm_plane *plane, 227static int hdlcd_plane_atomic_check(struct drm_plane *plane,
227 struct drm_plane_state *state) 228 struct drm_plane_state *state)
228{ 229{
229 u32 src_w, src_h; 230 struct drm_rect clip = { 0 };
231 struct drm_crtc_state *crtc_state;
232 u32 src_h = state->src_h >> 16;
230 233
231 src_w = state->src_w >> 16; 234 /* only the HDLCD_REG_FB_LINE_COUNT register has a limit */
232 src_h = state->src_h >> 16; 235 if (src_h >= HDLCD_MAX_YRES) {
236 DRM_DEBUG_KMS("Invalid source width: %d\n", src_h);
237 return -EINVAL;
238 }
239
240 if (!state->fb || !state->crtc)
241 return 0;
233 242
234 /* we can't do any scaling of the plane source */ 243 crtc_state = drm_atomic_get_existing_crtc_state(state->state,
235 if ((src_w != state->crtc_w) || (src_h != state->crtc_h)) 244 state->crtc);
245 if (!crtc_state) {
246 DRM_DEBUG_KMS("Invalid crtc state\n");
236 return -EINVAL; 247 return -EINVAL;
248 }
237 249
238 return 0; 250 clip.x2 = crtc_state->adjusted_mode.hdisplay;
251 clip.y2 = crtc_state->adjusted_mode.vdisplay;
252
253 return drm_plane_helper_check_state(state, &clip,
254 DRM_PLANE_HELPER_NO_SCALING,
255 DRM_PLANE_HELPER_NO_SCALING,
256 false, true);
239} 257}
240 258
241static void hdlcd_plane_atomic_update(struct drm_plane *plane, 259static void hdlcd_plane_atomic_update(struct drm_plane *plane,
@@ -244,21 +262,20 @@ static void hdlcd_plane_atomic_update(struct drm_plane *plane,
244 struct drm_framebuffer *fb = plane->state->fb; 262 struct drm_framebuffer *fb = plane->state->fb;
245 struct hdlcd_drm_private *hdlcd; 263 struct hdlcd_drm_private *hdlcd;
246 struct drm_gem_cma_object *gem; 264 struct drm_gem_cma_object *gem;
247 u32 src_w, src_h, dest_w, dest_h; 265 u32 src_x, src_y, dest_h;
248 dma_addr_t scanout_start; 266 dma_addr_t scanout_start;
249 267
250 if (!fb) 268 if (!fb)
251 return; 269 return;
252 270
253 src_w = plane->state->src_w >> 16; 271 src_x = plane->state->src.x1 >> 16;
254 src_h = plane->state->src_h >> 16; 272 src_y = plane->state->src.y1 >> 16;
255 dest_w = plane->state->crtc_w; 273 dest_h = drm_rect_height(&plane->state->dst);
256 dest_h = plane->state->crtc_h;
257 gem = drm_fb_cma_get_gem_obj(fb, 0); 274 gem = drm_fb_cma_get_gem_obj(fb, 0);
275
258 scanout_start = gem->paddr + fb->offsets[0] + 276 scanout_start = gem->paddr + fb->offsets[0] +
259 plane->state->crtc_y * fb->pitches[0] + 277 src_y * fb->pitches[0] +
260 plane->state->crtc_x * 278 src_x * fb->format->cpp[0];
261 fb->format->cpp[0];
262 279
263 hdlcd = plane->dev->dev_private; 280 hdlcd = plane->dev->dev_private;
264 hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_LENGTH, fb->pitches[0]); 281 hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_LENGTH, fb->pitches[0]);
@@ -305,7 +322,6 @@ static struct drm_plane *hdlcd_plane_init(struct drm_device *drm)
305 formats, ARRAY_SIZE(formats), 322 formats, ARRAY_SIZE(formats),
306 DRM_PLANE_TYPE_PRIMARY, NULL); 323 DRM_PLANE_TYPE_PRIMARY, NULL);
307 if (ret) { 324 if (ret) {
308 devm_kfree(drm->dev, plane);
309 return ERR_PTR(ret); 325 return ERR_PTR(ret);
310 } 326 }
311 327
@@ -329,7 +345,6 @@ int hdlcd_setup_crtc(struct drm_device *drm)
329 &hdlcd_crtc_funcs, NULL); 345 &hdlcd_crtc_funcs, NULL);
330 if (ret) { 346 if (ret) {
331 hdlcd_plane_destroy(primary); 347 hdlcd_plane_destroy(primary);
332 devm_kfree(drm->dev, primary);
333 return ret; 348 return ret;
334 } 349 }
335 350
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c
index 65a3bd7a0c00..423dda2785d4 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c
@@ -152,8 +152,7 @@ static const struct drm_connector_funcs atmel_hlcdc_panel_connector_funcs = {
152 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 152 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
153}; 153};
154 154
155static int atmel_hlcdc_attach_endpoint(struct drm_device *dev, 155static int atmel_hlcdc_attach_endpoint(struct drm_device *dev, int endpoint)
156 const struct device_node *np)
157{ 156{
158 struct atmel_hlcdc_dc *dc = dev->dev_private; 157 struct atmel_hlcdc_dc *dc = dev->dev_private;
159 struct atmel_hlcdc_rgb_output *output; 158 struct atmel_hlcdc_rgb_output *output;
@@ -161,6 +160,11 @@ static int atmel_hlcdc_attach_endpoint(struct drm_device *dev,
161 struct drm_bridge *bridge; 160 struct drm_bridge *bridge;
162 int ret; 161 int ret;
163 162
163 ret = drm_of_find_panel_or_bridge(dev->dev->of_node, 0, endpoint,
164 &panel, &bridge);
165 if (ret)
166 return ret;
167
164 output = devm_kzalloc(dev->dev, sizeof(*output), GFP_KERNEL); 168 output = devm_kzalloc(dev->dev, sizeof(*output), GFP_KERNEL);
165 if (!output) 169 if (!output)
166 return -EINVAL; 170 return -EINVAL;
@@ -177,10 +181,6 @@ static int atmel_hlcdc_attach_endpoint(struct drm_device *dev,
177 181
178 output->encoder.possible_crtcs = 0x1; 182 output->encoder.possible_crtcs = 0x1;
179 183
180 ret = drm_of_find_panel_or_bridge(np, 0, 0, &panel, &bridge);
181 if (ret)
182 return ret;
183
184 if (panel) { 184 if (panel) {
185 output->connector.dpms = DRM_MODE_DPMS_OFF; 185 output->connector.dpms = DRM_MODE_DPMS_OFF;
186 output->connector.polled = DRM_CONNECTOR_POLL_CONNECT; 186 output->connector.polled = DRM_CONNECTOR_POLL_CONNECT;
@@ -220,22 +220,14 @@ err_encoder_cleanup:
220 220
221int atmel_hlcdc_create_outputs(struct drm_device *dev) 221int atmel_hlcdc_create_outputs(struct drm_device *dev)
222{ 222{
223 struct device_node *remote; 223 int endpoint, ret = 0;
224 int ret = -ENODEV; 224
225 int endpoint = 0; 225 for (endpoint = 0; !ret; endpoint++)
226 226 ret = atmel_hlcdc_attach_endpoint(dev, endpoint);
227 while (true) { 227
228 /* Loop thru possible multiple connections to the output */ 228 /* At least one device was successfully attached.*/
229 remote = of_graph_get_remote_node(dev->dev->of_node, 0, 229 if (ret == -ENODEV && endpoint)
230 endpoint++); 230 return 0;
231 if (!remote)
232 break;
233
234 ret = atmel_hlcdc_attach_endpoint(dev, remote);
235 of_node_put(remote);
236 if (ret)
237 return ret;
238 }
239 231
240 return ret; 232 return ret;
241} 233}
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c
index e1909429837e..de80ee1b71df 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c
@@ -44,6 +44,7 @@ static struct etnaviv_gem_submit *submit_create(struct drm_device *dev,
44 44
45 /* initially, until copy_from_user() and bo lookup succeeds: */ 45 /* initially, until copy_from_user() and bo lookup succeeds: */
46 submit->nr_bos = 0; 46 submit->nr_bos = 0;
47 submit->fence = NULL;
47 48
48 ww_acquire_init(&submit->ticket, &reservation_ww_class); 49 ww_acquire_init(&submit->ticket, &reservation_ww_class);
49 } 50 }
@@ -294,7 +295,8 @@ static void submit_cleanup(struct etnaviv_gem_submit *submit)
294 } 295 }
295 296
296 ww_acquire_fini(&submit->ticket); 297 ww_acquire_fini(&submit->ticket);
297 dma_fence_put(submit->fence); 298 if (submit->fence)
299 dma_fence_put(submit->fence);
298 kfree(submit); 300 kfree(submit);
299} 301}
300 302
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 0ad1a508e2af..c995e540ff96 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -1244,7 +1244,7 @@ static int dma_ctrl_write(struct intel_vgpu *vgpu, unsigned int offset,
1244 mode = vgpu_vreg(vgpu, offset); 1244 mode = vgpu_vreg(vgpu, offset);
1245 1245
1246 if (GFX_MODE_BIT_SET_IN_MASK(mode, START_DMA)) { 1246 if (GFX_MODE_BIT_SET_IN_MASK(mode, START_DMA)) {
1247 WARN_ONCE(1, "VM(%d): iGVT-g doesn't supporte GuC\n", 1247 WARN_ONCE(1, "VM(%d): iGVT-g doesn't support GuC\n",
1248 vgpu->id); 1248 vgpu->id);
1249 return 0; 1249 return 0;
1250 } 1250 }
diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c
index c6e7972ac21d..a5e11d89df2f 100644
--- a/drivers/gpu/drm/i915/gvt/render.c
+++ b/drivers/gpu/drm/i915/gvt/render.c
@@ -340,6 +340,9 @@ void intel_gvt_restore_render_mmio(struct intel_vgpu *vgpu, int ring_id)
340 } else 340 } else
341 v = mmio->value; 341 v = mmio->value;
342 342
343 if (mmio->in_context)
344 continue;
345
343 I915_WRITE(mmio->reg, v); 346 I915_WRITE(mmio->reg, v);
344 POSTING_READ(mmio->reg); 347 POSTING_READ(mmio->reg);
345 348
diff --git a/drivers/gpu/drm/i915/gvt/sched_policy.c b/drivers/gpu/drm/i915/gvt/sched_policy.c
index 79ba4b3440aa..f25ff133865f 100644
--- a/drivers/gpu/drm/i915/gvt/sched_policy.c
+++ b/drivers/gpu/drm/i915/gvt/sched_policy.c
@@ -129,9 +129,13 @@ static void try_to_schedule_next_vgpu(struct intel_gvt *gvt)
129 struct vgpu_sched_data *vgpu_data; 129 struct vgpu_sched_data *vgpu_data;
130 ktime_t cur_time; 130 ktime_t cur_time;
131 131
132 /* no target to schedule */ 132 /* no need to schedule if next_vgpu is the same with current_vgpu,
133 if (!scheduler->next_vgpu) 133 * let scheduler chose next_vgpu again by setting it to NULL.
134 */
135 if (scheduler->next_vgpu == scheduler->current_vgpu) {
136 scheduler->next_vgpu = NULL;
134 return; 137 return;
138 }
135 139
136 /* 140 /*
137 * after the flag is set, workload dispatch thread will 141 * after the flag is set, workload dispatch thread will
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 2aa6b97fd22f..a0563e18d753 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -195,9 +195,12 @@ static int ppgtt_bind_vma(struct i915_vma *vma,
195 u32 pte_flags; 195 u32 pte_flags;
196 int ret; 196 int ret;
197 197
198 ret = vma->vm->allocate_va_range(vma->vm, vma->node.start, vma->size); 198 if (!(vma->flags & I915_VMA_LOCAL_BIND)) {
199 if (ret) 199 ret = vma->vm->allocate_va_range(vma->vm, vma->node.start,
200 return ret; 200 vma->size);
201 if (ret)
202 return ret;
203 }
201 204
202 vma->pages = vma->obj->mm.pages; 205 vma->pages = vma->obj->mm.pages;
203 206
@@ -2306,7 +2309,8 @@ static int aliasing_gtt_bind_vma(struct i915_vma *vma,
2306 if (flags & I915_VMA_LOCAL_BIND) { 2309 if (flags & I915_VMA_LOCAL_BIND) {
2307 struct i915_hw_ppgtt *appgtt = i915->mm.aliasing_ppgtt; 2310 struct i915_hw_ppgtt *appgtt = i915->mm.aliasing_ppgtt;
2308 2311
2309 if (appgtt->base.allocate_va_range) { 2312 if (!(vma->flags & I915_VMA_LOCAL_BIND) &&
2313 appgtt->base.allocate_va_range) {
2310 ret = appgtt->base.allocate_va_range(&appgtt->base, 2314 ret = appgtt->base.allocate_va_range(&appgtt->base,
2311 vma->node.start, 2315 vma->node.start,
2312 vma->node.size); 2316 vma->node.size);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 11b12f412492..5a7c63e64381 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3051,10 +3051,14 @@ enum skl_disp_power_wells {
3051#define CLKCFG_FSB_667 (3 << 0) /* hrawclk 166 */ 3051#define CLKCFG_FSB_667 (3 << 0) /* hrawclk 166 */
3052#define CLKCFG_FSB_800 (2 << 0) /* hrawclk 200 */ 3052#define CLKCFG_FSB_800 (2 << 0) /* hrawclk 200 */
3053#define CLKCFG_FSB_1067 (6 << 0) /* hrawclk 266 */ 3053#define CLKCFG_FSB_1067 (6 << 0) /* hrawclk 266 */
3054#define CLKCFG_FSB_1067_ALT (0 << 0) /* hrawclk 266 */
3054#define CLKCFG_FSB_1333 (7 << 0) /* hrawclk 333 */ 3055#define CLKCFG_FSB_1333 (7 << 0) /* hrawclk 333 */
3055/* Note, below two are guess */ 3056/*
3056#define CLKCFG_FSB_1600 (4 << 0) /* hrawclk 400 */ 3057 * Note that on at least on ELK the below value is reported for both
3057#define CLKCFG_FSB_1600_ALT (0 << 0) /* hrawclk 400 */ 3058 * 333 and 400 MHz BIOS FSB setting, but given that the gmch datasheet
3059 * lists only 200/266/333 MHz FSB as supported let's decode it as 333 MHz.
3060 */
3061#define CLKCFG_FSB_1333_ALT (4 << 0) /* hrawclk 333 */
3058#define CLKCFG_FSB_MASK (7 << 0) 3062#define CLKCFG_FSB_MASK (7 << 0)
3059#define CLKCFG_MEM_533 (1 << 4) 3063#define CLKCFG_MEM_533 (1 << 4)
3060#define CLKCFG_MEM_667 (2 << 4) 3064#define CLKCFG_MEM_667 (2 << 4)
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index dd3ad52b7dfe..f29a226e24d8 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -1798,13 +1798,11 @@ static int g4x_hrawclk(struct drm_i915_private *dev_priv)
1798 case CLKCFG_FSB_800: 1798 case CLKCFG_FSB_800:
1799 return 200000; 1799 return 200000;
1800 case CLKCFG_FSB_1067: 1800 case CLKCFG_FSB_1067:
1801 case CLKCFG_FSB_1067_ALT:
1801 return 266667; 1802 return 266667;
1802 case CLKCFG_FSB_1333: 1803 case CLKCFG_FSB_1333:
1804 case CLKCFG_FSB_1333_ALT:
1803 return 333333; 1805 return 333333;
1804 /* these two are just a guess; one of them might be right */
1805 case CLKCFG_FSB_1600:
1806 case CLKCFG_FSB_1600_ALT:
1807 return 400000;
1808 default: 1806 default:
1809 return 133333; 1807 return 133333;
1810 } 1808 }
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 3ffe8b1f1d48..fc0ef492252a 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -410,11 +410,10 @@ static void glk_dsi_device_ready(struct intel_encoder *encoder)
410 val |= (ULPS_STATE_ENTER | DEVICE_READY); 410 val |= (ULPS_STATE_ENTER | DEVICE_READY);
411 I915_WRITE(MIPI_DEVICE_READY(port), val); 411 I915_WRITE(MIPI_DEVICE_READY(port), val);
412 412
413 /* Wait for ULPS Not active */ 413 /* Wait for ULPS active */
414 if (intel_wait_for_register(dev_priv, 414 if (intel_wait_for_register(dev_priv,
415 MIPI_CTRL(port), GLK_ULPS_NOT_ACTIVE, 415 MIPI_CTRL(port), GLK_ULPS_NOT_ACTIVE, 0, 20))
416 GLK_ULPS_NOT_ACTIVE, 20)) 416 DRM_ERROR("ULPS not active\n");
417 DRM_ERROR("ULPS is still active\n");
418 417
419 /* Exit ULPS */ 418 /* Exit ULPS */
420 val = I915_READ(MIPI_DEVICE_READY(port)); 419 val = I915_READ(MIPI_DEVICE_READY(port));
diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c b/drivers/gpu/drm/i915/intel_lpe_audio.c
index 25d8e76489e4..668f00480d97 100644
--- a/drivers/gpu/drm/i915/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/intel_lpe_audio.c
@@ -63,6 +63,7 @@
63#include <linux/acpi.h> 63#include <linux/acpi.h>
64#include <linux/device.h> 64#include <linux/device.h>
65#include <linux/pci.h> 65#include <linux/pci.h>
66#include <linux/pm_runtime.h>
66 67
67#include "i915_drv.h" 68#include "i915_drv.h"
68#include <linux/delay.h> 69#include <linux/delay.h>
@@ -121,6 +122,10 @@ lpe_audio_platdev_create(struct drm_i915_private *dev_priv)
121 122
122 kfree(rsc); 123 kfree(rsc);
123 124
125 pm_runtime_forbid(&platdev->dev);
126 pm_runtime_set_active(&platdev->dev);
127 pm_runtime_enable(&platdev->dev);
128
124 return platdev; 129 return platdev;
125 130
126err: 131err:
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
index 21b10f9840c9..549763f5e17d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -360,6 +360,8 @@ nouveau_display_hpd_work(struct work_struct *work)
360 pm_runtime_get_sync(drm->dev->dev); 360 pm_runtime_get_sync(drm->dev->dev);
361 361
362 drm_helper_hpd_irq_event(drm->dev); 362 drm_helper_hpd_irq_event(drm->dev);
363 /* enable polling for external displays */
364 drm_kms_helper_poll_enable(drm->dev);
363 365
364 pm_runtime_mark_last_busy(drm->dev->dev); 366 pm_runtime_mark_last_busy(drm->dev->dev);
365 pm_runtime_put_sync(drm->dev->dev); 367 pm_runtime_put_sync(drm->dev->dev);
@@ -413,10 +415,6 @@ nouveau_display_init(struct drm_device *dev)
413 if (ret) 415 if (ret)
414 return ret; 416 return ret;
415 417
416 /* enable polling for external displays */
417 if (!dev->mode_config.poll_enabled)
418 drm_kms_helper_poll_enable(dev);
419
420 /* enable hotplug interrupts */ 418 /* enable hotplug interrupts */
421 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 419 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
422 struct nouveau_connector *conn = nouveau_connector(connector); 420 struct nouveau_connector *conn = nouveau_connector(connector);
diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c
index 2b6ac24ce690..36268e1802b5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
@@ -502,6 +502,9 @@ nouveau_drm_load(struct drm_device *dev, unsigned long flags)
502 pm_runtime_allow(dev->dev); 502 pm_runtime_allow(dev->dev);
503 pm_runtime_mark_last_busy(dev->dev); 503 pm_runtime_mark_last_busy(dev->dev);
504 pm_runtime_put(dev->dev); 504 pm_runtime_put(dev->dev);
505 } else {
506 /* enable polling for external displays */
507 drm_kms_helper_poll_enable(dev);
505 } 508 }
506 return 0; 509 return 0;
507 510
@@ -774,9 +777,6 @@ nouveau_pmops_runtime_resume(struct device *dev)
774 777
775 ret = nouveau_do_resume(drm_dev, true); 778 ret = nouveau_do_resume(drm_dev, true);
776 779
777 if (!drm_dev->mode_config.poll_enabled)
778 drm_kms_helper_poll_enable(drm_dev);
779
780 /* do magic */ 780 /* do magic */
781 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); 781 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
782 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); 782 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
index 3a24788c3185..a7e55c422501 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
@@ -148,7 +148,7 @@ gk104_fifo_runlist_commit(struct gk104_fifo *fifo, int runl)
148 case NVKM_MEM_TARGET_NCOH: target = 3; break; 148 case NVKM_MEM_TARGET_NCOH: target = 3; break;
149 default: 149 default:
150 WARN_ON(1); 150 WARN_ON(1);
151 return; 151 goto unlock;
152 } 152 }
153 153
154 nvkm_wr32(device, 0x002270, (nvkm_memory_addr(mem) >> 12) | 154 nvkm_wr32(device, 0x002270, (nvkm_memory_addr(mem) >> 12) |
@@ -160,6 +160,7 @@ gk104_fifo_runlist_commit(struct gk104_fifo *fifo, int runl)
160 & 0x00100000), 160 & 0x00100000),
161 msecs_to_jiffies(2000)) == 0) 161 msecs_to_jiffies(2000)) == 0)
162 nvkm_error(subdev, "runlist %d update timeout\n", runl); 162 nvkm_error(subdev, "runlist %d update timeout\n", runl);
163unlock:
163 mutex_unlock(&subdev->mutex); 164 mutex_unlock(&subdev->mutex);
164} 165}
165 166
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c
index d1cf02d22db1..1b0c793c0192 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c
@@ -116,6 +116,7 @@ ls_ucode_img_load_gr(const struct nvkm_subdev *subdev, struct ls_ucode_img *img,
116 ret = nvkm_firmware_get(subdev->device, f, &sig); 116 ret = nvkm_firmware_get(subdev->device, f, &sig);
117 if (ret) 117 if (ret)
118 goto free_data; 118 goto free_data;
119
119 img->sig = kmemdup(sig->data, sig->size, GFP_KERNEL); 120 img->sig = kmemdup(sig->data, sig->size, GFP_KERNEL);
120 if (!img->sig) { 121 if (!img->sig) {
121 ret = -ENOMEM; 122 ret = -ENOMEM;
@@ -126,8 +127,9 @@ ls_ucode_img_load_gr(const struct nvkm_subdev *subdev, struct ls_ucode_img *img,
126 img->ucode_data = ls_ucode_img_build(bl, code, data, 127 img->ucode_data = ls_ucode_img_build(bl, code, data,
127 &img->ucode_desc); 128 &img->ucode_desc);
128 if (IS_ERR(img->ucode_data)) { 129 if (IS_ERR(img->ucode_data)) {
130 kfree(img->sig);
129 ret = PTR_ERR(img->ucode_data); 131 ret = PTR_ERR(img->ucode_data);
130 goto free_data; 132 goto free_sig;
131 } 133 }
132 img->ucode_size = img->ucode_desc.image_size; 134 img->ucode_size = img->ucode_desc.image_size;
133 135
diff --git a/drivers/gpu/host1x/Kconfig b/drivers/gpu/host1x/Kconfig
index b2fd029d67b3..91916326957f 100644
--- a/drivers/gpu/host1x/Kconfig
+++ b/drivers/gpu/host1x/Kconfig
@@ -1,6 +1,7 @@
1config TEGRA_HOST1X 1config TEGRA_HOST1X
2 tristate "NVIDIA Tegra host1x driver" 2 tristate "NVIDIA Tegra host1x driver"
3 depends on ARCH_TEGRA || (ARM && COMPILE_TEST) 3 depends on ARCH_TEGRA || (ARM && COMPILE_TEST)
4 select IOMMU_IOVA if IOMMU_SUPPORT
4 help 5 help
5 Driver for the NVIDIA Tegra host1x hardware. 6 Driver for the NVIDIA Tegra host1x hardware.
6 7
diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c
index 664b7fe206d6..b11d3920b9a5 100644
--- a/sound/x86/intel_hdmi_audio.c
+++ b/sound/x86/intel_hdmi_audio.c
@@ -1809,10 +1809,6 @@ static int hdmi_lpe_audio_probe(struct platform_device *pdev)
1809 pdata->notify_pending = false; 1809 pdata->notify_pending = false;
1810 spin_unlock_irq(&pdata->lpe_audio_slock); 1810 spin_unlock_irq(&pdata->lpe_audio_slock);
1811 1811
1812 /* runtime PM isn't enabled as default, since it won't save much on
1813 * BYT/CHT devices; user who want the runtime PM should adjust the
1814 * power/ontrol and power/autosuspend_delay_ms sysfs entries instead
1815 */
1816 pm_runtime_use_autosuspend(&pdev->dev); 1812 pm_runtime_use_autosuspend(&pdev->dev);
1817 pm_runtime_mark_last_busy(&pdev->dev); 1813 pm_runtime_mark_last_busy(&pdev->dev);
1818 pm_runtime_set_active(&pdev->dev); 1814 pm_runtime_set_active(&pdev->dev);