1 files changed, 6 insertions, 1 deletions

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 4acb24c90c68..e2cf4f750c66 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -442,8 +442,13 @@ static u64 execlists_update_context(struct i915_request *rq)
          * may not be visible to the HW prior to the completion of the UC
          * register write and that we may begin execution from the context
          * before its image is complete leading to invalid PD chasing.
+         *
+         * Furthermore, Braswell, at least, wants a full mb to be sure that
+         * the writes are coherent in memory (visible to the GPU) prior to
+         * execution, and not just visible to other CPUs (as is the result of
+         * wmb).
          */
-        wmb();
+        mb();
         return ce->lrc_desc;
 }