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-rw-r--r--Documentation/features/time/modern-timekeeping/arch-support.txt2
-rw-r--r--arch/m68k/Kconfig1
-rw-r--r--arch/m68k/amiga/cia.c9
-rw-r--r--arch/m68k/amiga/config.c49
-rw-r--r--arch/m68k/apollo/config.c7
-rw-r--r--arch/m68k/atari/ataints.c4
-rw-r--r--arch/m68k/atari/config.c2
-rw-r--r--arch/m68k/atari/time.c70
-rw-r--r--arch/m68k/bvme6000/config.c77
-rw-r--r--arch/m68k/configs/amiga_defconfig14
-rw-r--r--arch/m68k/configs/apollo_defconfig14
-rw-r--r--arch/m68k/configs/atari_defconfig14
-rw-r--r--arch/m68k/configs/bvme6000_defconfig14
-rw-r--r--arch/m68k/configs/hp300_defconfig14
-rw-r--r--arch/m68k/configs/mac_defconfig14
-rw-r--r--arch/m68k/configs/multi_defconfig14
-rw-r--r--arch/m68k/configs/mvme147_defconfig14
-rw-r--r--arch/m68k/configs/mvme16x_defconfig14
-rw-r--r--arch/m68k/configs/q40_defconfig14
-rw-r--r--arch/m68k/configs/sun3_defconfig14
-rw-r--r--arch/m68k/configs/sun3x_defconfig14
-rw-r--r--arch/m68k/hp300/config.c1
-rw-r--r--arch/m68k/hp300/time.c73
-rw-r--r--arch/m68k/hp300/time.h1
-rw-r--r--arch/m68k/include/asm/mvme147hw.h2
-rw-r--r--arch/m68k/mac/config.c3
-rw-r--r--arch/m68k/mac/via.c146
-rw-r--r--arch/m68k/mvme147/config.c73
-rw-r--r--arch/m68k/mvme16x/config.c97
-rw-r--r--arch/m68k/q40/config.c9
-rw-r--r--arch/m68k/q40/q40ints.c19
-rw-r--r--arch/m68k/sun3/config.c2
-rw-r--r--arch/m68k/sun3/intersil.c7
-rw-r--r--arch/m68k/sun3/sun3ints.c3
-rw-r--r--arch/m68k/sun3x/config.c1
-rw-r--r--arch/m68k/sun3x/time.c21
-rw-r--r--arch/m68k/sun3x/time.h1
37 files changed, 518 insertions, 330 deletions
diff --git a/Documentation/features/time/modern-timekeeping/arch-support.txt b/Documentation/features/time/modern-timekeeping/arch-support.txt
index 2855dfe2464d..1d46da165b75 100644
--- a/Documentation/features/time/modern-timekeeping/arch-support.txt
+++ b/Documentation/features/time/modern-timekeeping/arch-support.txt
@@ -15,7 +15,7 @@
15 | h8300: | ok | 15 | h8300: | ok |
16 | hexagon: | ok | 16 | hexagon: | ok |
17 | ia64: | ok | 17 | ia64: | ok |
18 | m68k: | TODO | 18 | m68k: | ok |
19 | microblaze: | ok | 19 | microblaze: | ok |
20 | mips: | ok | 20 | mips: | ok |
21 | nds32: | ok | 21 | nds32: | ok |
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 735b9679fe6f..fe5cc2da6d10 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -20,7 +20,6 @@ config M68K
20 select GENERIC_STRNCPY_FROM_USER if MMU 20 select GENERIC_STRNCPY_FROM_USER if MMU
21 select GENERIC_STRNLEN_USER if MMU 21 select GENERIC_STRNLEN_USER if MMU
22 select ARCH_WANT_IPC_PARSE_VERSION 22 select ARCH_WANT_IPC_PARSE_VERSION
23 select ARCH_USES_GETTIMEOFFSET if MMU && !COLDFIRE
24 select HAVE_FUTEX_CMPXCHG if MMU && FUTEX 23 select HAVE_FUTEX_CMPXCHG if MMU && FUTEX
25 select HAVE_MOD_ARCH_SPECIFIC 24 select HAVE_MOD_ARCH_SPECIFIC
26 select MODULES_USE_ELF_REL 25 select MODULES_USE_ELF_REL
diff --git a/arch/m68k/amiga/cia.c b/arch/m68k/amiga/cia.c
index 2081b8cd5591..b9aee983e6f4 100644
--- a/arch/m68k/amiga/cia.c
+++ b/arch/m68k/amiga/cia.c
@@ -88,10 +88,19 @@ static irqreturn_t cia_handler(int irq, void *dev_id)
88 struct ciabase *base = dev_id; 88 struct ciabase *base = dev_id;
89 int mach_irq; 89 int mach_irq;
90 unsigned char ints; 90 unsigned char ints;
91 unsigned long flags;
91 92
93 /* Interrupts get disabled while the timer irq flag is cleared and
94 * the timer interrupt serviced.
95 */
92 mach_irq = base->cia_irq; 96 mach_irq = base->cia_irq;
97 local_irq_save(flags);
93 ints = cia_set_irq(base, CIA_ICR_ALL); 98 ints = cia_set_irq(base, CIA_ICR_ALL);
94 amiga_custom.intreq = base->int_mask; 99 amiga_custom.intreq = base->int_mask;
100 if (ints & 1)
101 generic_handle_irq(mach_irq);
102 local_irq_restore(flags);
103 mach_irq++, ints >>= 1;
95 for (; ints; mach_irq++, ints >>= 1) { 104 for (; ints; mach_irq++, ints >>= 1) {
96 if (ints & 1) 105 if (ints & 1)
97 generic_handle_irq(mach_irq); 106 generic_handle_irq(mach_irq);
diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c
index 65f63a457130..c32ab8041cf6 100644
--- a/arch/m68k/amiga/config.c
+++ b/arch/m68k/amiga/config.c
@@ -17,6 +17,7 @@
17#include <linux/mm.h> 17#include <linux/mm.h>
18#include <linux/seq_file.h> 18#include <linux/seq_file.h>
19#include <linux/tty.h> 19#include <linux/tty.h>
20#include <linux/clocksource.h>
20#include <linux/console.h> 21#include <linux/console.h>
21#include <linux/rtc.h> 22#include <linux/rtc.h>
22#include <linux/init.h> 23#include <linux/init.h>
@@ -95,8 +96,6 @@ static char amiga_model_name[13] = "Amiga ";
95static void amiga_sched_init(irq_handler_t handler); 96static void amiga_sched_init(irq_handler_t handler);
96static void amiga_get_model(char *model); 97static void amiga_get_model(char *model);
97static void amiga_get_hardware_list(struct seq_file *m); 98static void amiga_get_hardware_list(struct seq_file *m);
98/* amiga specific timer functions */
99static u32 amiga_gettimeoffset(void);
100extern void amiga_mksound(unsigned int count, unsigned int ticks); 99extern void amiga_mksound(unsigned int count, unsigned int ticks);
101static void amiga_reset(void); 100static void amiga_reset(void);
102extern void amiga_init_sound(void); 101extern void amiga_init_sound(void);
@@ -386,7 +385,6 @@ void __init config_amiga(void)
386 mach_init_IRQ = amiga_init_IRQ; 385 mach_init_IRQ = amiga_init_IRQ;
387 mach_get_model = amiga_get_model; 386 mach_get_model = amiga_get_model;
388 mach_get_hardware_list = amiga_get_hardware_list; 387 mach_get_hardware_list = amiga_get_hardware_list;
389 arch_gettimeoffset = amiga_gettimeoffset;
390 388
391 /* 389 /*
392 * default MAX_DMA=0xffffffff on all machines. If we don't do so, the SCSI 390 * default MAX_DMA=0xffffffff on all machines. If we don't do so, the SCSI
@@ -464,7 +462,29 @@ void __init config_amiga(void)
464 *(unsigned char *)ZTWO_VADDR(0xde0002) |= 0x80; 462 *(unsigned char *)ZTWO_VADDR(0xde0002) |= 0x80;
465} 463}
466 464
465static u64 amiga_read_clk(struct clocksource *cs);
466
467static struct clocksource amiga_clk = {
468 .name = "ciab",
469 .rating = 250,
470 .read = amiga_read_clk,
471 .mask = CLOCKSOURCE_MASK(32),
472 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
473};
474
467static unsigned short jiffy_ticks; 475static unsigned short jiffy_ticks;
476static u32 clk_total, clk_offset;
477
478static irqreturn_t ciab_timer_handler(int irq, void *dev_id)
479{
480 irq_handler_t timer_routine = dev_id;
481
482 clk_total += jiffy_ticks;
483 clk_offset = 0;
484 timer_routine(0, NULL);
485
486 return IRQ_HANDLED;
487}
468 488
469static void __init amiga_sched_init(irq_handler_t timer_routine) 489static void __init amiga_sched_init(irq_handler_t timer_routine)
470{ 490{
@@ -484,19 +504,22 @@ static void __init amiga_sched_init(irq_handler_t timer_routine)
484 * Please don't change this to use ciaa, as it interferes with the 504 * Please don't change this to use ciaa, as it interferes with the
485 * SCSI code. We'll have to take a look at this later 505 * SCSI code. We'll have to take a look at this later
486 */ 506 */
487 if (request_irq(IRQ_AMIGA_CIAB_TA, timer_routine, 0, "timer", NULL)) 507 if (request_irq(IRQ_AMIGA_CIAB_TA, ciab_timer_handler, IRQF_TIMER,
508 "timer", timer_routine))
488 pr_err("Couldn't register timer interrupt\n"); 509 pr_err("Couldn't register timer interrupt\n");
489 /* start timer */ 510 /* start timer */
490 ciab.cra |= 0x11; 511 ciab.cra |= 0x11;
491}
492 512
493#define TICK_SIZE 10000 513 clocksource_register_hz(&amiga_clk, amiga_eclock);
514}
494 515
495/* This is always executed with interrupts disabled. */ 516static u64 amiga_read_clk(struct clocksource *cs)
496static u32 amiga_gettimeoffset(void)
497{ 517{
498 unsigned short hi, lo, hi2; 518 unsigned short hi, lo, hi2;
499 u32 ticks, offset = 0; 519 unsigned long flags;
520 u32 ticks;
521
522 local_irq_save(flags);
500 523
501 /* read CIA B timer A current value */ 524 /* read CIA B timer A current value */
502 hi = ciab.tahi; 525 hi = ciab.tahi;
@@ -513,12 +536,14 @@ static u32 amiga_gettimeoffset(void)
513 if (ticks > jiffy_ticks / 2) 536 if (ticks > jiffy_ticks / 2)
514 /* check for pending interrupt */ 537 /* check for pending interrupt */
515 if (cia_set_irq(&ciab_base, 0) & CIA_ICR_TA) 538 if (cia_set_irq(&ciab_base, 0) & CIA_ICR_TA)
516 offset = 10000; 539 clk_offset = jiffy_ticks;
517 540
518 ticks = jiffy_ticks - ticks; 541 ticks = jiffy_ticks - ticks;
519 ticks = (10000 * ticks) / jiffy_ticks; 542 ticks += clk_offset + clk_total;
543
544 local_irq_restore(flags);
520 545
521 return (ticks + offset) * 1000; 546 return ticks;
522} 547}
523 548
524static void amiga_reset(void) __noreturn; 549static void amiga_reset(void) __noreturn;
diff --git a/arch/m68k/apollo/config.c b/arch/m68k/apollo/config.c
index aef8d42e078d..7d168e6dfb01 100644
--- a/arch/m68k/apollo/config.c
+++ b/arch/m68k/apollo/config.c
@@ -29,7 +29,6 @@ u_long apollo_model;
29 29
30extern void dn_sched_init(irq_handler_t handler); 30extern void dn_sched_init(irq_handler_t handler);
31extern void dn_init_IRQ(void); 31extern void dn_init_IRQ(void);
32extern u32 dn_gettimeoffset(void);
33extern int dn_dummy_hwclk(int, struct rtc_time *); 32extern int dn_dummy_hwclk(int, struct rtc_time *);
34extern void dn_dummy_reset(void); 33extern void dn_dummy_reset(void);
35#ifdef CONFIG_HEARTBEAT 34#ifdef CONFIG_HEARTBEAT
@@ -152,7 +151,6 @@ void __init config_apollo(void)
152 151
153 mach_sched_init=dn_sched_init; /* */ 152 mach_sched_init=dn_sched_init; /* */
154 mach_init_IRQ=dn_init_IRQ; 153 mach_init_IRQ=dn_init_IRQ;
155 arch_gettimeoffset = dn_gettimeoffset;
156 mach_max_dma_address = 0xffffffff; 154 mach_max_dma_address = 0xffffffff;
157 mach_hwclk = dn_dummy_hwclk; /* */ 155 mach_hwclk = dn_dummy_hwclk; /* */
158 mach_reset = dn_dummy_reset; /* */ 156 mach_reset = dn_dummy_reset; /* */
@@ -205,11 +203,6 @@ void dn_sched_init(irq_handler_t timer_routine)
205 pr_err("Couldn't register timer interrupt\n"); 203 pr_err("Couldn't register timer interrupt\n");
206} 204}
207 205
208u32 dn_gettimeoffset(void)
209{
210 return 0xdeadbeef;
211}
212
213int dn_dummy_hwclk(int op, struct rtc_time *t) { 206int dn_dummy_hwclk(int op, struct rtc_time *t) {
214 207
215 208
diff --git a/arch/m68k/atari/ataints.c b/arch/m68k/atari/ataints.c
index 3d2b63bedf05..56f02ea2c248 100644
--- a/arch/m68k/atari/ataints.c
+++ b/arch/m68k/atari/ataints.c
@@ -142,7 +142,7 @@ struct mfptimerbase {
142 .name = "MFP Timer D" 142 .name = "MFP Timer D"
143}; 143};
144 144
145static irqreturn_t mfptimer_handler(int irq, void *dev_id) 145static irqreturn_t mfp_timer_d_handler(int irq, void *dev_id)
146{ 146{
147 struct mfptimerbase *base = dev_id; 147 struct mfptimerbase *base = dev_id;
148 int mach_irq; 148 int mach_irq;
@@ -344,7 +344,7 @@ void __init atari_init_IRQ(void)
344 st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 0xf0) | 0x6; 344 st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 0xf0) | 0x6;
345 345
346 /* request timer D dispatch handler */ 346 /* request timer D dispatch handler */
347 if (request_irq(IRQ_MFP_TIMD, mfptimer_handler, IRQF_SHARED, 347 if (request_irq(IRQ_MFP_TIMD, mfp_timer_d_handler, IRQF_SHARED,
348 stmfp_base.name, &stmfp_base)) 348 stmfp_base.name, &stmfp_base))
349 pr_err("Couldn't register %s interrupt\n", stmfp_base.name); 349 pr_err("Couldn't register %s interrupt\n", stmfp_base.name);
350 350
diff --git a/arch/m68k/atari/config.c b/arch/m68k/atari/config.c
index 4fcc4b1df1c0..902255e7b5b2 100644
--- a/arch/m68k/atari/config.c
+++ b/arch/m68k/atari/config.c
@@ -78,7 +78,6 @@ static void atari_heartbeat(int on);
78 78
79/* atari specific timer functions (in time.c) */ 79/* atari specific timer functions (in time.c) */
80extern void atari_sched_init(irq_handler_t); 80extern void atari_sched_init(irq_handler_t);
81extern u32 atari_gettimeoffset(void);
82extern int atari_mste_hwclk (int, struct rtc_time *); 81extern int atari_mste_hwclk (int, struct rtc_time *);
83extern int atari_tt_hwclk (int, struct rtc_time *); 82extern int atari_tt_hwclk (int, struct rtc_time *);
84 83
@@ -205,7 +204,6 @@ void __init config_atari(void)
205 mach_init_IRQ = atari_init_IRQ; 204 mach_init_IRQ = atari_init_IRQ;
206 mach_get_model = atari_get_model; 205 mach_get_model = atari_get_model;
207 mach_get_hardware_list = atari_get_hardware_list; 206 mach_get_hardware_list = atari_get_hardware_list;
208 arch_gettimeoffset = atari_gettimeoffset;
209 mach_reset = atari_reset; 207 mach_reset = atari_reset;
210 mach_max_dma_address = 0xffffff; 208 mach_max_dma_address = 0xffffff;
211#if IS_ENABLED(CONFIG_INPUT_M68K_BEEP) 209#if IS_ENABLED(CONFIG_INPUT_M68K_BEEP)
diff --git a/arch/m68k/atari/time.c b/arch/m68k/atari/time.c
index 9cca64286464..ce923a523695 100644
--- a/arch/m68k/atari/time.c
+++ b/arch/m68k/atari/time.c
@@ -16,6 +16,7 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/rtc.h> 17#include <linux/rtc.h>
18#include <linux/bcd.h> 18#include <linux/bcd.h>
19#include <linux/clocksource.h>
19#include <linux/delay.h> 20#include <linux/delay.h>
20#include <linux/export.h> 21#include <linux/export.h>
21 22
@@ -24,6 +25,35 @@
24DEFINE_SPINLOCK(rtc_lock); 25DEFINE_SPINLOCK(rtc_lock);
25EXPORT_SYMBOL_GPL(rtc_lock); 26EXPORT_SYMBOL_GPL(rtc_lock);
26 27
28static u64 atari_read_clk(struct clocksource *cs);
29
30static struct clocksource atari_clk = {
31 .name = "mfp",
32 .rating = 100,
33 .read = atari_read_clk,
34 .mask = CLOCKSOURCE_MASK(32),
35 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
36};
37
38static u32 clk_total;
39static u8 last_timer_count;
40
41static irqreturn_t mfp_timer_c_handler(int irq, void *dev_id)
42{
43 irq_handler_t timer_routine = dev_id;
44 unsigned long flags;
45
46 local_irq_save(flags);
47 do {
48 last_timer_count = st_mfp.tim_dt_c;
49 } while (last_timer_count == 1);
50 clk_total += INT_TICKS;
51 timer_routine(0, NULL);
52 local_irq_restore(flags);
53
54 return IRQ_HANDLED;
55}
56
27void __init 57void __init
28atari_sched_init(irq_handler_t timer_routine) 58atari_sched_init(irq_handler_t timer_routine)
29{ 59{
@@ -32,31 +62,33 @@ atari_sched_init(irq_handler_t timer_routine)
32 /* start timer C, div = 1:100 */ 62 /* start timer C, div = 1:100 */
33 st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 15) | 0x60; 63 st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 15) | 0x60;
34 /* install interrupt service routine for MFP Timer C */ 64 /* install interrupt service routine for MFP Timer C */
35 if (request_irq(IRQ_MFP_TIMC, timer_routine, 0, "timer", timer_routine)) 65 if (request_irq(IRQ_MFP_TIMC, mfp_timer_c_handler, IRQF_TIMER, "timer",
66 timer_routine))
36 pr_err("Couldn't register timer interrupt\n"); 67 pr_err("Couldn't register timer interrupt\n");
68
69 clocksource_register_hz(&atari_clk, INT_CLK);
37} 70}
38 71
39/* ++andreas: gettimeoffset fixed to check for pending interrupt */ 72/* ++andreas: gettimeoffset fixed to check for pending interrupt */
40 73
41#define TICK_SIZE 10000 74static u64 atari_read_clk(struct clocksource *cs)
42
43/* This is always executed with interrupts disabled. */
44u32 atari_gettimeoffset(void)
45{ 75{
46 u32 ticks, offset = 0; 76 unsigned long flags;
47 77 u8 count;
48 /* read MFP timer C current value */ 78 u32 ticks;
49 ticks = st_mfp.tim_dt_c; 79
50 /* The probability of underflow is less than 2% */ 80 local_irq_save(flags);
51 if (ticks > INT_TICKS - INT_TICKS / 50) 81 /* Ensure that the count is monotonically decreasing, even though
52 /* Check for pending timer interrupt */ 82 * the result may briefly stop changing after counter wrap-around.
53 if (st_mfp.int_pn_b & (1 << 5)) 83 */
54 offset = TICK_SIZE; 84 count = min(st_mfp.tim_dt_c, last_timer_count);
55 85 last_timer_count = count;
56 ticks = INT_TICKS - ticks; 86
57 ticks = ticks * 10000L / INT_TICKS; 87 ticks = INT_TICKS - count;
58 88 ticks += clk_total;
59 return (ticks + offset) * 1000; 89 local_irq_restore(flags);
90
91 return ticks;
60} 92}
61 93
62 94
diff --git a/arch/m68k/bvme6000/config.c b/arch/m68k/bvme6000/config.c
index 143ee9fa3893..8ebaabc931cd 100644
--- a/arch/m68k/bvme6000/config.c
+++ b/arch/m68k/bvme6000/config.c
@@ -18,6 +18,7 @@
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/mm.h> 19#include <linux/mm.h>
20#include <linux/tty.h> 20#include <linux/tty.h>
21#include <linux/clocksource.h>
21#include <linux/console.h> 22#include <linux/console.h>
22#include <linux/linkage.h> 23#include <linux/linkage.h>
23#include <linux/init.h> 24#include <linux/init.h>
@@ -39,16 +40,10 @@
39 40
40static void bvme6000_get_model(char *model); 41static void bvme6000_get_model(char *model);
41extern void bvme6000_sched_init(irq_handler_t handler); 42extern void bvme6000_sched_init(irq_handler_t handler);
42extern u32 bvme6000_gettimeoffset(void);
43extern int bvme6000_hwclk (int, struct rtc_time *); 43extern int bvme6000_hwclk (int, struct rtc_time *);
44extern void bvme6000_reset (void); 44extern void bvme6000_reset (void);
45void bvme6000_set_vectors (void); 45void bvme6000_set_vectors (void);
46 46
47/* Save tick handler routine pointer, will point to xtime_update() in
48 * kernel/timer/timekeeping.c, called via bvme6000_process_int() */
49
50static irq_handler_t tick_handler;
51
52 47
53int __init bvme6000_parse_bootinfo(const struct bi_record *bi) 48int __init bvme6000_parse_bootinfo(const struct bi_record *bi)
54{ 49{
@@ -110,7 +105,6 @@ void __init config_bvme6000(void)
110 mach_max_dma_address = 0xffffffff; 105 mach_max_dma_address = 0xffffffff;
111 mach_sched_init = bvme6000_sched_init; 106 mach_sched_init = bvme6000_sched_init;
112 mach_init_IRQ = bvme6000_init_IRQ; 107 mach_init_IRQ = bvme6000_init_IRQ;
113 arch_gettimeoffset = bvme6000_gettimeoffset;
114 mach_hwclk = bvme6000_hwclk; 108 mach_hwclk = bvme6000_hwclk;
115 mach_reset = bvme6000_reset; 109 mach_reset = bvme6000_reset;
116 mach_get_model = bvme6000_get_model; 110 mach_get_model = bvme6000_get_model;
@@ -154,15 +148,38 @@ irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
154 return IRQ_HANDLED; 148 return IRQ_HANDLED;
155} 149}
156 150
151static u64 bvme6000_read_clk(struct clocksource *cs);
152
153static struct clocksource bvme6000_clk = {
154 .name = "rtc",
155 .rating = 250,
156 .read = bvme6000_read_clk,
157 .mask = CLOCKSOURCE_MASK(32),
158 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
159};
160
161static u32 clk_total, clk_offset;
162
163#define RTC_TIMER_CLOCK_FREQ 8000000
164#define RTC_TIMER_CYCLES (RTC_TIMER_CLOCK_FREQ / HZ)
165#define RTC_TIMER_COUNT ((RTC_TIMER_CYCLES / 2) - 1)
157 166
158static irqreturn_t bvme6000_timer_int (int irq, void *dev_id) 167static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
159{ 168{
169 irq_handler_t timer_routine = dev_id;
170 unsigned long flags;
160 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; 171 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
161 unsigned char msr = rtc->msr & 0xc0; 172 unsigned char msr;
162 173
174 local_irq_save(flags);
175 msr = rtc->msr & 0xc0;
163 rtc->msr = msr | 0x20; /* Ack the interrupt */ 176 rtc->msr = msr | 0x20; /* Ack the interrupt */
177 clk_total += RTC_TIMER_CYCLES;
178 clk_offset = 0;
179 timer_routine(0, NULL);
180 local_irq_restore(flags);
164 181
165 return tick_handler(irq, dev_id); 182 return IRQ_HANDLED;
166} 183}
167 184
168/* 185/*
@@ -181,14 +198,13 @@ void bvme6000_sched_init (irq_handler_t timer_routine)
181 198
182 rtc->msr = 0; /* Ensure timer registers accessible */ 199 rtc->msr = 0; /* Ensure timer registers accessible */
183 200
184 tick_handler = timer_routine; 201 if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, IRQF_TIMER, "timer",
185 if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0, 202 timer_routine))
186 "timer", bvme6000_timer_int))
187 panic ("Couldn't register timer int"); 203 panic ("Couldn't register timer int");
188 204
189 rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */ 205 rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */
190 rtc->t1msb = 39999 >> 8; 206 rtc->t1msb = RTC_TIMER_COUNT >> 8;
191 rtc->t1lsb = 39999 & 0xff; 207 rtc->t1lsb = RTC_TIMER_COUNT & 0xff;
192 rtc->irr_icr1 &= 0xef; /* Route timer 1 to INTR pin */ 208 rtc->irr_icr1 &= 0xef; /* Route timer 1 to INTR pin */
193 rtc->msr = 0x40; /* Access int.cntrl, etc */ 209 rtc->msr = 0x40; /* Access int.cntrl, etc */
194 rtc->pfr_icr0 = 0x80; /* Just timer 1 ints enabled */ 210 rtc->pfr_icr0 = 0x80; /* Just timer 1 ints enabled */
@@ -200,14 +216,14 @@ void bvme6000_sched_init (irq_handler_t timer_routine)
200 216
201 rtc->msr = msr; 217 rtc->msr = msr;
202 218
219 clocksource_register_hz(&bvme6000_clk, RTC_TIMER_CLOCK_FREQ);
220
203 if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0, 221 if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0,
204 "abort", bvme6000_abort_int)) 222 "abort", bvme6000_abort_int))
205 panic ("Couldn't register abort int"); 223 panic ("Couldn't register abort int");
206} 224}
207 225
208 226
209/* This is always executed with interrupts disabled. */
210
211/* 227/*
212 * NOTE: Don't accept any readings within 5us of rollover, as 228 * NOTE: Don't accept any readings within 5us of rollover, as
213 * the T1INT bit may be a little slow getting set. There is also 229 * the T1INT bit may be a little slow getting set. There is also
@@ -215,14 +231,18 @@ void bvme6000_sched_init (irq_handler_t timer_routine)
215 * results... 231 * results...
216 */ 232 */
217 233
218u32 bvme6000_gettimeoffset(void) 234static u64 bvme6000_read_clk(struct clocksource *cs)
219{ 235{
236 unsigned long flags;
220 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; 237 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
221 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE; 238 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
222 unsigned char msr = rtc->msr & 0xc0; 239 unsigned char msr, msb;
223 unsigned char t1int, t1op; 240 unsigned char t1int, t1op;
224 u32 v = 800000, ov; 241 u32 v = 800000, ov;
225 242
243 local_irq_save(flags);
244
245 msr = rtc->msr & 0xc0;
226 rtc->msr = 0; /* Ensure timer registers accessible */ 246 rtc->msr = 0; /* Ensure timer registers accessible */
227 247
228 do { 248 do {
@@ -230,22 +250,25 @@ u32 bvme6000_gettimeoffset(void)
230 t1int = rtc->msr & 0x20; 250 t1int = rtc->msr & 0x20;
231 t1op = pit->pcdr & 0x04; 251 t1op = pit->pcdr & 0x04;
232 rtc->t1cr_omr |= 0x40; /* Latch timer1 */ 252 rtc->t1cr_omr |= 0x40; /* Latch timer1 */
233 v = rtc->t1msb << 8; /* Read timer1 */ 253 msb = rtc->t1msb; /* Read timer1 */
234 v |= rtc->t1lsb; /* Read timer1 */ 254 v = (msb << 8) | rtc->t1lsb; /* Read timer1 */
235 } while (t1int != (rtc->msr & 0x20) || 255 } while (t1int != (rtc->msr & 0x20) ||
236 t1op != (pit->pcdr & 0x04) || 256 t1op != (pit->pcdr & 0x04) ||
237 abs(ov-v) > 80 || 257 abs(ov-v) > 80 ||
238 v > 39960); 258 v > RTC_TIMER_COUNT - (RTC_TIMER_COUNT / 100));
239 259
240 v = 39999 - v; 260 v = RTC_TIMER_COUNT - v;
241 if (!t1op) /* If in second half cycle.. */ 261 if (!t1op) /* If in second half cycle.. */
242 v += 40000; 262 v += RTC_TIMER_CYCLES / 2;
243 v /= 8; /* Convert ticks to microseconds */ 263 if (msb > 0 && t1int)
244 if (t1int) 264 clk_offset = RTC_TIMER_CYCLES;
245 v += 10000; /* Int pending, + 10ms */
246 rtc->msr = msr; 265 rtc->msr = msr;
247 266
248 return v * 1000; 267 v += clk_offset + clk_total;
268
269 local_irq_restore(flags);
270
271 return v;
249} 272}
250 273
251/* 274/*
diff --git a/arch/m68k/configs/amiga_defconfig b/arch/m68k/configs/amiga_defconfig
index 525421ae277d..fea392cfcf1b 100644
--- a/arch/m68k/configs/amiga_defconfig
+++ b/arch/m68k/configs/amiga_defconfig
@@ -56,6 +56,7 @@ CONFIG_TLS=m
56CONFIG_XFRM_MIGRATE=y 56CONFIG_XFRM_MIGRATE=y
57CONFIG_NET_KEY=y 57CONFIG_NET_KEY=y
58CONFIG_XDP_SOCKETS=y 58CONFIG_XDP_SOCKETS=y
59CONFIG_XDP_SOCKETS_DIAG=m
59CONFIG_INET=y 60CONFIG_INET=y
60CONFIG_IP_PNP=y 61CONFIG_IP_PNP=y
61CONFIG_IP_PNP_DHCP=y 62CONFIG_IP_PNP_DHCP=y
@@ -210,9 +211,6 @@ CONFIG_NFT_FIB_IPV4=m
210CONFIG_NF_TABLES_ARP=y 211CONFIG_NF_TABLES_ARP=y
211CONFIG_NF_FLOW_TABLE_IPV4=m 212CONFIG_NF_FLOW_TABLE_IPV4=m
212CONFIG_NF_LOG_ARP=m 213CONFIG_NF_LOG_ARP=m
213CONFIG_NFT_CHAIN_NAT_IPV4=m
214CONFIG_NFT_MASQ_IPV4=m
215CONFIG_NFT_REDIR_IPV4=m
216CONFIG_IP_NF_IPTABLES=m 214CONFIG_IP_NF_IPTABLES=m
217CONFIG_IP_NF_MATCH_AH=m 215CONFIG_IP_NF_MATCH_AH=m
218CONFIG_IP_NF_MATCH_ECN=m 216CONFIG_IP_NF_MATCH_ECN=m
@@ -234,9 +232,6 @@ CONFIG_IP_NF_ARPTABLES=m
234CONFIG_IP_NF_ARPFILTER=m 232CONFIG_IP_NF_ARPFILTER=m
235CONFIG_IP_NF_ARP_MANGLE=m 233CONFIG_IP_NF_ARP_MANGLE=m
236CONFIG_NFT_CHAIN_ROUTE_IPV6=m 234CONFIG_NFT_CHAIN_ROUTE_IPV6=m
237CONFIG_NFT_CHAIN_NAT_IPV6=m
238CONFIG_NFT_MASQ_IPV6=m
239CONFIG_NFT_REDIR_IPV6=m
240CONFIG_NFT_DUP_IPV6=m 235CONFIG_NFT_DUP_IPV6=m
241CONFIG_NFT_FIB_IPV6=m 236CONFIG_NFT_FIB_IPV6=m
242CONFIG_NF_FLOW_TABLE_IPV6=m 237CONFIG_NF_FLOW_TABLE_IPV6=m
@@ -313,7 +308,6 @@ CONFIG_AF_KCM=m
313# CONFIG_WIRELESS is not set 308# CONFIG_WIRELESS is not set
314CONFIG_PSAMPLE=m 309CONFIG_PSAMPLE=m
315CONFIG_NET_IFE=m 310CONFIG_NET_IFE=m
316CONFIG_NET_DEVLINK=m
317# CONFIG_UEVENT_HELPER is not set 311# CONFIG_UEVENT_HELPER is not set
318CONFIG_DEVTMPFS=y 312CONFIG_DEVTMPFS=y
319CONFIG_DEVTMPFS_MOUNT=y 313CONFIG_DEVTMPFS_MOUNT=y
@@ -460,12 +454,12 @@ CONFIG_RTC_DRV_RP5C01=m
460# CONFIG_VIRTIO_MENU is not set 454# CONFIG_VIRTIO_MENU is not set
461# CONFIG_IOMMU_SUPPORT is not set 455# CONFIG_IOMMU_SUPPORT is not set
462CONFIG_DAX=m 456CONFIG_DAX=m
457# CONFIG_VALIDATE_FS_PARSER is not set
463CONFIG_EXT4_FS=y 458CONFIG_EXT4_FS=y
464CONFIG_REISERFS_FS=m 459CONFIG_REISERFS_FS=m
465CONFIG_JFS_FS=m 460CONFIG_JFS_FS=m
466CONFIG_OCFS2_FS=m 461CONFIG_OCFS2_FS=m
467# CONFIG_OCFS2_DEBUG_MASKLOG is not set 462# CONFIG_OCFS2_DEBUG_MASKLOG is not set
468CONFIG_FS_ENCRYPTION=m
469CONFIG_FANOTIFY=y 463CONFIG_FANOTIFY=y
470CONFIG_QUOTA_NETLINK_INTERFACE=y 464CONFIG_QUOTA_NETLINK_INTERFACE=y
471# CONFIG_PRINT_QUOTA_WARNING is not set 465# CONFIG_PRINT_QUOTA_WARNING is not set
@@ -573,9 +567,11 @@ CONFIG_CRYPTO_AEGIS256=m
573CONFIG_CRYPTO_MORUS640=m 567CONFIG_CRYPTO_MORUS640=m
574CONFIG_CRYPTO_MORUS1280=m 568CONFIG_CRYPTO_MORUS1280=m
575CONFIG_CRYPTO_CFB=m 569CONFIG_CRYPTO_CFB=m
570CONFIG_CRYPTO_CTS=m
576CONFIG_CRYPTO_LRW=m 571CONFIG_CRYPTO_LRW=m
577CONFIG_CRYPTO_OFB=m 572CONFIG_CRYPTO_OFB=m
578CONFIG_CRYPTO_PCBC=m 573CONFIG_CRYPTO_PCBC=m
574CONFIG_CRYPTO_XTS=m
579CONFIG_CRYPTO_KEYWRAP=m 575CONFIG_CRYPTO_KEYWRAP=m
580CONFIG_CRYPTO_ADIANTUM=m 576CONFIG_CRYPTO_ADIANTUM=m
581CONFIG_CRYPTO_XCBC=m 577CONFIG_CRYPTO_XCBC=m
@@ -640,6 +636,7 @@ CONFIG_TEST_OVERFLOW=m
640CONFIG_TEST_RHASHTABLE=m 636CONFIG_TEST_RHASHTABLE=m
641CONFIG_TEST_HASH=m 637CONFIG_TEST_HASH=m
642CONFIG_TEST_IDA=m 638CONFIG_TEST_IDA=m
639CONFIG_TEST_VMALLOC=m
643CONFIG_TEST_USER_COPY=m 640CONFIG_TEST_USER_COPY=m
644CONFIG_TEST_BPF=m 641CONFIG_TEST_BPF=m
645CONFIG_FIND_BIT_BENCHMARK=m 642CONFIG_FIND_BIT_BENCHMARK=m
@@ -649,4 +646,5 @@ CONFIG_TEST_UDELAY=m
649CONFIG_TEST_STATIC_KEYS=m 646CONFIG_TEST_STATIC_KEYS=m
650CONFIG_TEST_KMOD=m 647CONFIG_TEST_KMOD=m
651CONFIG_TEST_MEMCAT_P=m 648CONFIG_TEST_MEMCAT_P=m
649CONFIG_TEST_STACKINIT=m
652CONFIG_EARLY_PRINTK=y 650CONFIG_EARLY_PRINTK=y
diff --git a/arch/m68k/configs/apollo_defconfig b/arch/m68k/configs/apollo_defconfig
index db0e654a88d5..2474d267460e 100644
--- a/arch/m68k/configs/apollo_defconfig
+++ b/arch/m68k/configs/apollo_defconfig
@@ -52,6 +52,7 @@ CONFIG_TLS=m
52CONFIG_XFRM_MIGRATE=y 52CONFIG_XFRM_MIGRATE=y
53CONFIG_NET_KEY=y 53CONFIG_NET_KEY=y
54CONFIG_XDP_SOCKETS=y 54CONFIG_XDP_SOCKETS=y
55CONFIG_XDP_SOCKETS_DIAG=m
55CONFIG_INET=y 56CONFIG_INET=y
56CONFIG_IP_PNP=y 57CONFIG_IP_PNP=y
57CONFIG_IP_PNP_DHCP=y 58CONFIG_IP_PNP_DHCP=y
@@ -206,9 +207,6 @@ CONFIG_NFT_FIB_IPV4=m
206CONFIG_NF_TABLES_ARP=y 207CONFIG_NF_TABLES_ARP=y
207CONFIG_NF_FLOW_TABLE_IPV4=m 208CONFIG_NF_FLOW_TABLE_IPV4=m
208CONFIG_NF_LOG_ARP=m 209CONFIG_NF_LOG_ARP=m
209CONFIG_NFT_CHAIN_NAT_IPV4=m
210CONFIG_NFT_MASQ_IPV4=m
211CONFIG_NFT_REDIR_IPV4=m
212CONFIG_IP_NF_IPTABLES=m 210CONFIG_IP_NF_IPTABLES=m
213CONFIG_IP_NF_MATCH_AH=m 211CONFIG_IP_NF_MATCH_AH=m
214CONFIG_IP_NF_MATCH_ECN=m 212CONFIG_IP_NF_MATCH_ECN=m
@@ -230,9 +228,6 @@ CONFIG_IP_NF_ARPTABLES=m
230CONFIG_IP_NF_ARPFILTER=m 228CONFIG_IP_NF_ARPFILTER=m
231CONFIG_IP_NF_ARP_MANGLE=m 229CONFIG_IP_NF_ARP_MANGLE=m
232CONFIG_NFT_CHAIN_ROUTE_IPV6=m 230CONFIG_NFT_CHAIN_ROUTE_IPV6=m
233CONFIG_NFT_CHAIN_NAT_IPV6=m
234CONFIG_NFT_MASQ_IPV6=m
235CONFIG_NFT_REDIR_IPV6=m
236CONFIG_NFT_DUP_IPV6=m 231CONFIG_NFT_DUP_IPV6=m
237CONFIG_NFT_FIB_IPV6=m 232CONFIG_NFT_FIB_IPV6=m
238CONFIG_NF_FLOW_TABLE_IPV6=m 233CONFIG_NF_FLOW_TABLE_IPV6=m
@@ -309,7 +304,6 @@ CONFIG_AF_KCM=m
309# CONFIG_WIRELESS is not set 304# CONFIG_WIRELESS is not set
310CONFIG_PSAMPLE=m 305CONFIG_PSAMPLE=m
311CONFIG_NET_IFE=m 306CONFIG_NET_IFE=m
312CONFIG_NET_DEVLINK=m
313# CONFIG_UEVENT_HELPER is not set 307# CONFIG_UEVENT_HELPER is not set
314CONFIG_DEVTMPFS=y 308CONFIG_DEVTMPFS=y
315CONFIG_DEVTMPFS_MOUNT=y 309CONFIG_DEVTMPFS_MOUNT=y
@@ -420,12 +414,12 @@ CONFIG_RTC_DRV_GENERIC=m
420# CONFIG_VIRTIO_MENU is not set 414# CONFIG_VIRTIO_MENU is not set
421# CONFIG_IOMMU_SUPPORT is not set 415# CONFIG_IOMMU_SUPPORT is not set
422CONFIG_DAX=m 416CONFIG_DAX=m
417# CONFIG_VALIDATE_FS_PARSER is not set
423CONFIG_EXT4_FS=y 418CONFIG_EXT4_FS=y
424CONFIG_REISERFS_FS=m 419CONFIG_REISERFS_FS=m
425CONFIG_JFS_FS=m 420CONFIG_JFS_FS=m
426CONFIG_OCFS2_FS=m 421CONFIG_OCFS2_FS=m
427# CONFIG_OCFS2_DEBUG_MASKLOG is not set 422# CONFIG_OCFS2_DEBUG_MASKLOG is not set
428CONFIG_FS_ENCRYPTION=m
429CONFIG_FANOTIFY=y 423CONFIG_FANOTIFY=y
430CONFIG_QUOTA_NETLINK_INTERFACE=y 424CONFIG_QUOTA_NETLINK_INTERFACE=y
431# CONFIG_PRINT_QUOTA_WARNING is not set 425# CONFIG_PRINT_QUOTA_WARNING is not set
@@ -533,9 +527,11 @@ CONFIG_CRYPTO_AEGIS256=m
533CONFIG_CRYPTO_MORUS640=m 527CONFIG_CRYPTO_MORUS640=m
534CONFIG_CRYPTO_MORUS1280=m 528CONFIG_CRYPTO_MORUS1280=m
535CONFIG_CRYPTO_CFB=m 529CONFIG_CRYPTO_CFB=m
530CONFIG_CRYPTO_CTS=m
536CONFIG_CRYPTO_LRW=m 531CONFIG_CRYPTO_LRW=m
537CONFIG_CRYPTO_OFB=m 532CONFIG_CRYPTO_OFB=m
538CONFIG_CRYPTO_PCBC=m 533CONFIG_CRYPTO_PCBC=m
534CONFIG_CRYPTO_XTS=m
539CONFIG_CRYPTO_KEYWRAP=m 535CONFIG_CRYPTO_KEYWRAP=m
540CONFIG_CRYPTO_ADIANTUM=m 536CONFIG_CRYPTO_ADIANTUM=m
541CONFIG_CRYPTO_XCBC=m 537CONFIG_CRYPTO_XCBC=m
@@ -600,6 +596,7 @@ CONFIG_TEST_OVERFLOW=m
600CONFIG_TEST_RHASHTABLE=m 596CONFIG_TEST_RHASHTABLE=m
601CONFIG_TEST_HASH=m 597CONFIG_TEST_HASH=m
602CONFIG_TEST_IDA=m 598CONFIG_TEST_IDA=m
599CONFIG_TEST_VMALLOC=m
603CONFIG_TEST_USER_COPY=m 600CONFIG_TEST_USER_COPY=m
604CONFIG_TEST_BPF=m 601CONFIG_TEST_BPF=m
605CONFIG_FIND_BIT_BENCHMARK=m 602CONFIG_FIND_BIT_BENCHMARK=m
@@ -609,4 +606,5 @@ CONFIG_TEST_UDELAY=m
609CONFIG_TEST_STATIC_KEYS=m 606CONFIG_TEST_STATIC_KEYS=m
610CONFIG_TEST_KMOD=m 607CONFIG_TEST_KMOD=m
611CONFIG_TEST_MEMCAT_P=m 608CONFIG_TEST_MEMCAT_P=m
609CONFIG_TEST_STACKINIT=m
612CONFIG_EARLY_PRINTK=y 610CONFIG_EARLY_PRINTK=y
diff --git a/arch/m68k/configs/atari_defconfig b/arch/m68k/configs/atari_defconfig
index 1451168eb789..0fc7d2992fe0 100644
--- a/arch/m68k/configs/atari_defconfig
+++ b/arch/m68k/configs/atari_defconfig
@@ -59,6 +59,7 @@ CONFIG_TLS=m
59CONFIG_XFRM_MIGRATE=y 59CONFIG_XFRM_MIGRATE=y
60CONFIG_NET_KEY=y 60CONFIG_NET_KEY=y
61CONFIG_XDP_SOCKETS=y 61CONFIG_XDP_SOCKETS=y
62CONFIG_XDP_SOCKETS_DIAG=m
62CONFIG_INET=y 63CONFIG_INET=y
63CONFIG_IP_PNP=y 64CONFIG_IP_PNP=y
64CONFIG_IP_PNP_DHCP=y 65CONFIG_IP_PNP_DHCP=y
@@ -213,9 +214,6 @@ CONFIG_NFT_FIB_IPV4=m
213CONFIG_NF_TABLES_ARP=y 214CONFIG_NF_TABLES_ARP=y
214CONFIG_NF_FLOW_TABLE_IPV4=m 215CONFIG_NF_FLOW_TABLE_IPV4=m
215CONFIG_NF_LOG_ARP=m 216CONFIG_NF_LOG_ARP=m
216CONFIG_NFT_CHAIN_NAT_IPV4=m
217CONFIG_NFT_MASQ_IPV4=m
218CONFIG_NFT_REDIR_IPV4=m
219CONFIG_IP_NF_IPTABLES=m 217CONFIG_IP_NF_IPTABLES=m
220CONFIG_IP_NF_MATCH_AH=m 218CONFIG_IP_NF_MATCH_AH=m
221CONFIG_IP_NF_MATCH_ECN=m 219CONFIG_IP_NF_MATCH_ECN=m
@@ -237,9 +235,6 @@ CONFIG_IP_NF_ARPTABLES=m
237CONFIG_IP_NF_ARPFILTER=m 235CONFIG_IP_NF_ARPFILTER=m
238CONFIG_IP_NF_ARP_MANGLE=m 236CONFIG_IP_NF_ARP_MANGLE=m
239CONFIG_NFT_CHAIN_ROUTE_IPV6=m 237CONFIG_NFT_CHAIN_ROUTE_IPV6=m
240CONFIG_NFT_CHAIN_NAT_IPV6=m
241CONFIG_NFT_MASQ_IPV6=m
242CONFIG_NFT_REDIR_IPV6=m
243CONFIG_NFT_DUP_IPV6=m 238CONFIG_NFT_DUP_IPV6=m
244CONFIG_NFT_FIB_IPV6=m 239CONFIG_NFT_FIB_IPV6=m
245CONFIG_NF_FLOW_TABLE_IPV6=m 240CONFIG_NF_FLOW_TABLE_IPV6=m
@@ -316,7 +311,6 @@ CONFIG_AF_KCM=m
316# CONFIG_WIRELESS is not set 311# CONFIG_WIRELESS is not set
317CONFIG_PSAMPLE=m 312CONFIG_PSAMPLE=m
318CONFIG_NET_IFE=m 313CONFIG_NET_IFE=m
319CONFIG_NET_DEVLINK=m
320# CONFIG_UEVENT_HELPER is not set 314# CONFIG_UEVENT_HELPER is not set
321CONFIG_DEVTMPFS=y 315CONFIG_DEVTMPFS=y
322CONFIG_DEVTMPFS_MOUNT=y 316CONFIG_DEVTMPFS_MOUNT=y
@@ -442,12 +436,12 @@ CONFIG_RTC_DRV_GENERIC=m
442# CONFIG_VIRTIO_MENU is not set 436# CONFIG_VIRTIO_MENU is not set
443# CONFIG_IOMMU_SUPPORT is not set 437# CONFIG_IOMMU_SUPPORT is not set
444CONFIG_DAX=m 438CONFIG_DAX=m
439# CONFIG_VALIDATE_FS_PARSER is not set
445CONFIG_EXT4_FS=y 440CONFIG_EXT4_FS=y
446CONFIG_REISERFS_FS=m 441CONFIG_REISERFS_FS=m
447CONFIG_JFS_FS=m 442CONFIG_JFS_FS=m
448CONFIG_OCFS2_FS=m 443CONFIG_OCFS2_FS=m
449# CONFIG_OCFS2_DEBUG_MASKLOG is not set 444# CONFIG_OCFS2_DEBUG_MASKLOG is not set
450CONFIG_FS_ENCRYPTION=m
451CONFIG_FANOTIFY=y 445CONFIG_FANOTIFY=y
452CONFIG_QUOTA_NETLINK_INTERFACE=y 446CONFIG_QUOTA_NETLINK_INTERFACE=y
453# CONFIG_PRINT_QUOTA_WARNING is not set 447# CONFIG_PRINT_QUOTA_WARNING is not set
@@ -555,9 +549,11 @@ CONFIG_CRYPTO_AEGIS256=m
555CONFIG_CRYPTO_MORUS640=m 549CONFIG_CRYPTO_MORUS640=m
556CONFIG_CRYPTO_MORUS1280=m 550CONFIG_CRYPTO_MORUS1280=m
557CONFIG_CRYPTO_CFB=m 551CONFIG_CRYPTO_CFB=m
552CONFIG_CRYPTO_CTS=m
558CONFIG_CRYPTO_LRW=m 553CONFIG_CRYPTO_LRW=m
559CONFIG_CRYPTO_OFB=m 554CONFIG_CRYPTO_OFB=m
560CONFIG_CRYPTO_PCBC=m 555CONFIG_CRYPTO_PCBC=m
556CONFIG_CRYPTO_XTS=m
561CONFIG_CRYPTO_KEYWRAP=m 557CONFIG_CRYPTO_KEYWRAP=m
562CONFIG_CRYPTO_ADIANTUM=m 558CONFIG_CRYPTO_ADIANTUM=m
563CONFIG_CRYPTO_XCBC=m 559CONFIG_CRYPTO_XCBC=m
@@ -622,6 +618,7 @@ CONFIG_TEST_OVERFLOW=m
622CONFIG_TEST_RHASHTABLE=m 618CONFIG_TEST_RHASHTABLE=m
623CONFIG_TEST_HASH=m 619CONFIG_TEST_HASH=m
624CONFIG_TEST_IDA=m 620CONFIG_TEST_IDA=m
621CONFIG_TEST_VMALLOC=m
625CONFIG_TEST_USER_COPY=m 622CONFIG_TEST_USER_COPY=m
626CONFIG_TEST_BPF=m 623CONFIG_TEST_BPF=m
627CONFIG_FIND_BIT_BENCHMARK=m 624CONFIG_FIND_BIT_BENCHMARK=m
@@ -631,4 +628,5 @@ CONFIG_TEST_UDELAY=m
631CONFIG_TEST_STATIC_KEYS=m 628CONFIG_TEST_STATIC_KEYS=m
632CONFIG_TEST_KMOD=m 629CONFIG_TEST_KMOD=m
633CONFIG_TEST_MEMCAT_P=m 630CONFIG_TEST_MEMCAT_P=m
631CONFIG_TEST_STACKINIT=m
634CONFIG_EARLY_PRINTK=y 632CONFIG_EARLY_PRINTK=y
diff --git a/arch/m68k/configs/bvme6000_defconfig b/arch/m68k/configs/bvme6000_defconfig
index b0d3609f5bb3..699df9fdf866 100644
--- a/arch/m68k/configs/bvme6000_defconfig
+++ b/arch/m68k/configs/bvme6000_defconfig
@@ -49,6 +49,7 @@ CONFIG_TLS=m
49CONFIG_XFRM_MIGRATE=y 49CONFIG_XFRM_MIGRATE=y
50CONFIG_NET_KEY=y 50CONFIG_NET_KEY=y
51CONFIG_XDP_SOCKETS=y 51CONFIG_XDP_SOCKETS=y
52CONFIG_XDP_SOCKETS_DIAG=m
52CONFIG_INET=y 53CONFIG_INET=y
53CONFIG_IP_PNP=y 54CONFIG_IP_PNP=y
54CONFIG_IP_PNP_DHCP=y 55CONFIG_IP_PNP_DHCP=y
@@ -203,9 +204,6 @@ CONFIG_NFT_FIB_IPV4=m
203CONFIG_NF_TABLES_ARP=y 204CONFIG_NF_TABLES_ARP=y
204CONFIG_NF_FLOW_TABLE_IPV4=m 205CONFIG_NF_FLOW_TABLE_IPV4=m
205CONFIG_NF_LOG_ARP=m 206CONFIG_NF_LOG_ARP=m
206CONFIG_NFT_CHAIN_NAT_IPV4=m
207CONFIG_NFT_MASQ_IPV4=m
208CONFIG_NFT_REDIR_IPV4=m
209CONFIG_IP_NF_IPTABLES=m 207CONFIG_IP_NF_IPTABLES=m
210CONFIG_IP_NF_MATCH_AH=m 208CONFIG_IP_NF_MATCH_AH=m
211CONFIG_IP_NF_MATCH_ECN=m 209CONFIG_IP_NF_MATCH_ECN=m
@@ -227,9 +225,6 @@ CONFIG_IP_NF_ARPTABLES=m
227CONFIG_IP_NF_ARPFILTER=m 225CONFIG_IP_NF_ARPFILTER=m
228CONFIG_IP_NF_ARP_MANGLE=m 226CONFIG_IP_NF_ARP_MANGLE=m
229CONFIG_NFT_CHAIN_ROUTE_IPV6=m 227CONFIG_NFT_CHAIN_ROUTE_IPV6=m
230CONFIG_NFT_CHAIN_NAT_IPV6=m
231CONFIG_NFT_MASQ_IPV6=m
232CONFIG_NFT_REDIR_IPV6=m
233CONFIG_NFT_DUP_IPV6=m 228CONFIG_NFT_DUP_IPV6=m
234CONFIG_NFT_FIB_IPV6=m 229CONFIG_NFT_FIB_IPV6=m
235CONFIG_NF_FLOW_TABLE_IPV6=m 230CONFIG_NF_FLOW_TABLE_IPV6=m
@@ -306,7 +301,6 @@ CONFIG_AF_KCM=m
306# CONFIG_WIRELESS is not set 301# CONFIG_WIRELESS is not set
307CONFIG_PSAMPLE=m 302CONFIG_PSAMPLE=m
308CONFIG_NET_IFE=m 303CONFIG_NET_IFE=m
309CONFIG_NET_DEVLINK=m
310# CONFIG_UEVENT_HELPER is not set 304# CONFIG_UEVENT_HELPER is not set
311CONFIG_DEVTMPFS=y 305CONFIG_DEVTMPFS=y
312CONFIG_DEVTMPFS_MOUNT=y 306CONFIG_DEVTMPFS_MOUNT=y
@@ -413,12 +407,12 @@ CONFIG_RTC_DRV_GENERIC=m
413# CONFIG_VIRTIO_MENU is not set 407# CONFIG_VIRTIO_MENU is not set
414# CONFIG_IOMMU_SUPPORT is not set 408# CONFIG_IOMMU_SUPPORT is not set
415CONFIG_DAX=m 409CONFIG_DAX=m
410# CONFIG_VALIDATE_FS_PARSER is not set
416CONFIG_EXT4_FS=y 411CONFIG_EXT4_FS=y
417CONFIG_REISERFS_FS=m 412CONFIG_REISERFS_FS=m
418CONFIG_JFS_FS=m 413CONFIG_JFS_FS=m
419CONFIG_OCFS2_FS=m 414CONFIG_OCFS2_FS=m
420# CONFIG_OCFS2_DEBUG_MASKLOG is not set 415# CONFIG_OCFS2_DEBUG_MASKLOG is not set
421CONFIG_FS_ENCRYPTION=m
422CONFIG_FANOTIFY=y 416CONFIG_FANOTIFY=y
423CONFIG_QUOTA_NETLINK_INTERFACE=y 417CONFIG_QUOTA_NETLINK_INTERFACE=y
424# CONFIG_PRINT_QUOTA_WARNING is not set 418# CONFIG_PRINT_QUOTA_WARNING is not set
@@ -526,9 +520,11 @@ CONFIG_CRYPTO_AEGIS256=m
526CONFIG_CRYPTO_MORUS640=m 520CONFIG_CRYPTO_MORUS640=m
527CONFIG_CRYPTO_MORUS1280=m 521CONFIG_CRYPTO_MORUS1280=m
528CONFIG_CRYPTO_CFB=m 522CONFIG_CRYPTO_CFB=m
523CONFIG_CRYPTO_CTS=m
529CONFIG_CRYPTO_LRW=m 524CONFIG_CRYPTO_LRW=m
530CONFIG_CRYPTO_OFB=m 525CONFIG_CRYPTO_OFB=m
531CONFIG_CRYPTO_PCBC=m 526CONFIG_CRYPTO_PCBC=m
527CONFIG_CRYPTO_XTS=m
532CONFIG_CRYPTO_KEYWRAP=m 528CONFIG_CRYPTO_KEYWRAP=m
533CONFIG_CRYPTO_ADIANTUM=m 529CONFIG_CRYPTO_ADIANTUM=m
534CONFIG_CRYPTO_XCBC=m 530CONFIG_CRYPTO_XCBC=m
@@ -593,6 +589,7 @@ CONFIG_TEST_OVERFLOW=m
593CONFIG_TEST_RHASHTABLE=m 589CONFIG_TEST_RHASHTABLE=m
594CONFIG_TEST_HASH=m 590CONFIG_TEST_HASH=m
595CONFIG_TEST_IDA=m 591CONFIG_TEST_IDA=m
592CONFIG_TEST_VMALLOC=m
596CONFIG_TEST_USER_COPY=m 593CONFIG_TEST_USER_COPY=m
597CONFIG_TEST_BPF=m 594CONFIG_TEST_BPF=m
598CONFIG_FIND_BIT_BENCHMARK=m 595CONFIG_FIND_BIT_BENCHMARK=m
@@ -602,4 +599,5 @@ CONFIG_TEST_UDELAY=m
602CONFIG_TEST_STATIC_KEYS=m 599CONFIG_TEST_STATIC_KEYS=m
603CONFIG_TEST_KMOD=m 600CONFIG_TEST_KMOD=m
604CONFIG_TEST_MEMCAT_P=m 601CONFIG_TEST_MEMCAT_P=m
602CONFIG_TEST_STACKINIT=m
605CONFIG_EARLY_PRINTK=y 603CONFIG_EARLY_PRINTK=y
diff --git a/arch/m68k/configs/hp300_defconfig b/arch/m68k/configs/hp300_defconfig
index 4ed7c151347c..b50802255324 100644
--- a/arch/m68k/configs/hp300_defconfig
+++ b/arch/m68k/configs/hp300_defconfig
@@ -51,6 +51,7 @@ CONFIG_TLS=m
51CONFIG_XFRM_MIGRATE=y 51CONFIG_XFRM_MIGRATE=y
52CONFIG_NET_KEY=y 52CONFIG_NET_KEY=y
53CONFIG_XDP_SOCKETS=y 53CONFIG_XDP_SOCKETS=y
54CONFIG_XDP_SOCKETS_DIAG=m
54CONFIG_INET=y 55CONFIG_INET=y
55CONFIG_IP_PNP=y 56CONFIG_IP_PNP=y
56CONFIG_IP_PNP_DHCP=y 57CONFIG_IP_PNP_DHCP=y
@@ -205,9 +206,6 @@ CONFIG_NFT_FIB_IPV4=m
205CONFIG_NF_TABLES_ARP=y 206CONFIG_NF_TABLES_ARP=y
206CONFIG_NF_FLOW_TABLE_IPV4=m 207CONFIG_NF_FLOW_TABLE_IPV4=m
207CONFIG_NF_LOG_ARP=m 208CONFIG_NF_LOG_ARP=m
208CONFIG_NFT_CHAIN_NAT_IPV4=m
209CONFIG_NFT_MASQ_IPV4=m
210CONFIG_NFT_REDIR_IPV4=m
211CONFIG_IP_NF_IPTABLES=m 209CONFIG_IP_NF_IPTABLES=m
212CONFIG_IP_NF_MATCH_AH=m 210CONFIG_IP_NF_MATCH_AH=m
213CONFIG_IP_NF_MATCH_ECN=m 211CONFIG_IP_NF_MATCH_ECN=m
@@ -229,9 +227,6 @@ CONFIG_IP_NF_ARPTABLES=m
229CONFIG_IP_NF_ARPFILTER=m 227CONFIG_IP_NF_ARPFILTER=m
230CONFIG_IP_NF_ARP_MANGLE=m 228CONFIG_IP_NF_ARP_MANGLE=m
231CONFIG_NFT_CHAIN_ROUTE_IPV6=m 229CONFIG_NFT_CHAIN_ROUTE_IPV6=m
232CONFIG_NFT_CHAIN_NAT_IPV6=m
233CONFIG_NFT_MASQ_IPV6=m
234CONFIG_NFT_REDIR_IPV6=m
235CONFIG_NFT_DUP_IPV6=m 230CONFIG_NFT_DUP_IPV6=m
236CONFIG_NFT_FIB_IPV6=m 231CONFIG_NFT_FIB_IPV6=m
237CONFIG_NF_FLOW_TABLE_IPV6=m 232CONFIG_NF_FLOW_TABLE_IPV6=m
@@ -308,7 +303,6 @@ CONFIG_AF_KCM=m
308# CONFIG_WIRELESS is not set 303# CONFIG_WIRELESS is not set
309CONFIG_PSAMPLE=m 304CONFIG_PSAMPLE=m
310CONFIG_NET_IFE=m 305CONFIG_NET_IFE=m
311CONFIG_NET_DEVLINK=m
312# CONFIG_UEVENT_HELPER is not set 306# CONFIG_UEVENT_HELPER is not set
313CONFIG_DEVTMPFS=y 307CONFIG_DEVTMPFS=y
314CONFIG_DEVTMPFS_MOUNT=y 308CONFIG_DEVTMPFS_MOUNT=y
@@ -422,12 +416,12 @@ CONFIG_RTC_DRV_GENERIC=m
422# CONFIG_VIRTIO_MENU is not set 416# CONFIG_VIRTIO_MENU is not set
423# CONFIG_IOMMU_SUPPORT is not set 417# CONFIG_IOMMU_SUPPORT is not set
424CONFIG_DAX=m 418CONFIG_DAX=m
419# CONFIG_VALIDATE_FS_PARSER is not set
425CONFIG_EXT4_FS=y 420CONFIG_EXT4_FS=y
426CONFIG_REISERFS_FS=m 421CONFIG_REISERFS_FS=m
427CONFIG_JFS_FS=m 422CONFIG_JFS_FS=m
428CONFIG_OCFS2_FS=m 423CONFIG_OCFS2_FS=m
429# CONFIG_OCFS2_DEBUG_MASKLOG is not set 424# CONFIG_OCFS2_DEBUG_MASKLOG is not set
430CONFIG_FS_ENCRYPTION=m
431CONFIG_FANOTIFY=y 425CONFIG_FANOTIFY=y
432CONFIG_QUOTA_NETLINK_INTERFACE=y 426CONFIG_QUOTA_NETLINK_INTERFACE=y
433# CONFIG_PRINT_QUOTA_WARNING is not set 427# CONFIG_PRINT_QUOTA_WARNING is not set
@@ -535,9 +529,11 @@ CONFIG_CRYPTO_AEGIS256=m
535CONFIG_CRYPTO_MORUS640=m 529CONFIG_CRYPTO_MORUS640=m
536CONFIG_CRYPTO_MORUS1280=m 530CONFIG_CRYPTO_MORUS1280=m
537CONFIG_CRYPTO_CFB=m 531CONFIG_CRYPTO_CFB=m
532CONFIG_CRYPTO_CTS=m
538CONFIG_CRYPTO_LRW=m 533CONFIG_CRYPTO_LRW=m
539CONFIG_CRYPTO_OFB=m 534CONFIG_CRYPTO_OFB=m
540CONFIG_CRYPTO_PCBC=m 535CONFIG_CRYPTO_PCBC=m
536CONFIG_CRYPTO_XTS=m
541CONFIG_CRYPTO_KEYWRAP=m 537CONFIG_CRYPTO_KEYWRAP=m
542CONFIG_CRYPTO_ADIANTUM=m 538CONFIG_CRYPTO_ADIANTUM=m
543CONFIG_CRYPTO_XCBC=m 539CONFIG_CRYPTO_XCBC=m
@@ -602,6 +598,7 @@ CONFIG_TEST_OVERFLOW=m
602CONFIG_TEST_RHASHTABLE=m 598CONFIG_TEST_RHASHTABLE=m
603CONFIG_TEST_HASH=m 599CONFIG_TEST_HASH=m
604CONFIG_TEST_IDA=m 600CONFIG_TEST_IDA=m
601CONFIG_TEST_VMALLOC=m
605CONFIG_TEST_USER_COPY=m 602CONFIG_TEST_USER_COPY=m
606CONFIG_TEST_BPF=m 603CONFIG_TEST_BPF=m
607CONFIG_FIND_BIT_BENCHMARK=m 604CONFIG_FIND_BIT_BENCHMARK=m
@@ -611,4 +608,5 @@ CONFIG_TEST_UDELAY=m
611CONFIG_TEST_STATIC_KEYS=m 608CONFIG_TEST_STATIC_KEYS=m
612CONFIG_TEST_KMOD=m 609CONFIG_TEST_KMOD=m
613CONFIG_TEST_MEMCAT_P=m 610CONFIG_TEST_MEMCAT_P=m
611CONFIG_TEST_STACKINIT=m
614CONFIG_EARLY_PRINTK=y 612CONFIG_EARLY_PRINTK=y
diff --git a/arch/m68k/configs/mac_defconfig b/arch/m68k/configs/mac_defconfig
index 0dc544e1ce1f..04e7d70f6030 100644
--- a/arch/m68k/configs/mac_defconfig
+++ b/arch/m68k/configs/mac_defconfig
@@ -50,6 +50,7 @@ CONFIG_TLS=m
50CONFIG_XFRM_MIGRATE=y 50CONFIG_XFRM_MIGRATE=y
51CONFIG_NET_KEY=y 51CONFIG_NET_KEY=y
52CONFIG_XDP_SOCKETS=y 52CONFIG_XDP_SOCKETS=y
53CONFIG_XDP_SOCKETS_DIAG=m
53CONFIG_INET=y 54CONFIG_INET=y
54CONFIG_IP_PNP=y 55CONFIG_IP_PNP=y
55CONFIG_IP_PNP_DHCP=y 56CONFIG_IP_PNP_DHCP=y
@@ -204,9 +205,6 @@ CONFIG_NFT_FIB_IPV4=m
204CONFIG_NF_TABLES_ARP=y 205CONFIG_NF_TABLES_ARP=y
205CONFIG_NF_FLOW_TABLE_IPV4=m 206CONFIG_NF_FLOW_TABLE_IPV4=m
206CONFIG_NF_LOG_ARP=m 207CONFIG_NF_LOG_ARP=m
207CONFIG_NFT_CHAIN_NAT_IPV4=m
208CONFIG_NFT_MASQ_IPV4=m
209CONFIG_NFT_REDIR_IPV4=m
210CONFIG_IP_NF_IPTABLES=m 208CONFIG_IP_NF_IPTABLES=m
211CONFIG_IP_NF_MATCH_AH=m 209CONFIG_IP_NF_MATCH_AH=m
212CONFIG_IP_NF_MATCH_ECN=m 210CONFIG_IP_NF_MATCH_ECN=m
@@ -228,9 +226,6 @@ CONFIG_IP_NF_ARPTABLES=m
228CONFIG_IP_NF_ARPFILTER=m 226CONFIG_IP_NF_ARPFILTER=m
229CONFIG_IP_NF_ARP_MANGLE=m 227CONFIG_IP_NF_ARP_MANGLE=m
230CONFIG_NFT_CHAIN_ROUTE_IPV6=m 228CONFIG_NFT_CHAIN_ROUTE_IPV6=m
231CONFIG_NFT_CHAIN_NAT_IPV6=m
232CONFIG_NFT_MASQ_IPV6=m
233CONFIG_NFT_REDIR_IPV6=m
234CONFIG_NFT_DUP_IPV6=m 229CONFIG_NFT_DUP_IPV6=m
235CONFIG_NFT_FIB_IPV6=m 230CONFIG_NFT_FIB_IPV6=m
236CONFIG_NF_FLOW_TABLE_IPV6=m 231CONFIG_NF_FLOW_TABLE_IPV6=m
@@ -310,7 +305,6 @@ CONFIG_AF_KCM=m
310# CONFIG_WIRELESS is not set 305# CONFIG_WIRELESS is not set
311CONFIG_PSAMPLE=m 306CONFIG_PSAMPLE=m
312CONFIG_NET_IFE=m 307CONFIG_NET_IFE=m
313CONFIG_NET_DEVLINK=m
314# CONFIG_UEVENT_HELPER is not set 308# CONFIG_UEVENT_HELPER is not set
315CONFIG_DEVTMPFS=y 309CONFIG_DEVTMPFS=y
316CONFIG_DEVTMPFS_MOUNT=y 310CONFIG_DEVTMPFS_MOUNT=y
@@ -444,12 +438,12 @@ CONFIG_RTC_DRV_GENERIC=m
444# CONFIG_VIRTIO_MENU is not set 438# CONFIG_VIRTIO_MENU is not set
445# CONFIG_IOMMU_SUPPORT is not set 439# CONFIG_IOMMU_SUPPORT is not set
446CONFIG_DAX=m 440CONFIG_DAX=m
441# CONFIG_VALIDATE_FS_PARSER is not set
447CONFIG_EXT4_FS=y 442CONFIG_EXT4_FS=y
448CONFIG_REISERFS_FS=m 443CONFIG_REISERFS_FS=m
449CONFIG_JFS_FS=m 444CONFIG_JFS_FS=m
450CONFIG_OCFS2_FS=m 445CONFIG_OCFS2_FS=m
451# CONFIG_OCFS2_DEBUG_MASKLOG is not set 446# CONFIG_OCFS2_DEBUG_MASKLOG is not set
452CONFIG_FS_ENCRYPTION=m
453CONFIG_FANOTIFY=y 447CONFIG_FANOTIFY=y
454CONFIG_QUOTA_NETLINK_INTERFACE=y 448CONFIG_QUOTA_NETLINK_INTERFACE=y
455# CONFIG_PRINT_QUOTA_WARNING is not set 449# CONFIG_PRINT_QUOTA_WARNING is not set
@@ -557,9 +551,11 @@ CONFIG_CRYPTO_AEGIS256=m
557CONFIG_CRYPTO_MORUS640=m 551CONFIG_CRYPTO_MORUS640=m
558CONFIG_CRYPTO_MORUS1280=m 552CONFIG_CRYPTO_MORUS1280=m
559CONFIG_CRYPTO_CFB=m 553CONFIG_CRYPTO_CFB=m
554CONFIG_CRYPTO_CTS=m
560CONFIG_CRYPTO_LRW=m 555CONFIG_CRYPTO_LRW=m
561CONFIG_CRYPTO_OFB=m 556CONFIG_CRYPTO_OFB=m
562CONFIG_CRYPTO_PCBC=m 557CONFIG_CRYPTO_PCBC=m
558CONFIG_CRYPTO_XTS=m
563CONFIG_CRYPTO_KEYWRAP=m 559CONFIG_CRYPTO_KEYWRAP=m
564CONFIG_CRYPTO_ADIANTUM=m 560CONFIG_CRYPTO_ADIANTUM=m
565CONFIG_CRYPTO_XCBC=m 561CONFIG_CRYPTO_XCBC=m
@@ -624,6 +620,7 @@ CONFIG_TEST_OVERFLOW=m
624CONFIG_TEST_RHASHTABLE=m 620CONFIG_TEST_RHASHTABLE=m
625CONFIG_TEST_HASH=m 621CONFIG_TEST_HASH=m
626CONFIG_TEST_IDA=m 622CONFIG_TEST_IDA=m
623CONFIG_TEST_VMALLOC=m
627CONFIG_TEST_USER_COPY=m 624CONFIG_TEST_USER_COPY=m
628CONFIG_TEST_BPF=m 625CONFIG_TEST_BPF=m
629CONFIG_FIND_BIT_BENCHMARK=m 626CONFIG_FIND_BIT_BENCHMARK=m
@@ -633,4 +630,5 @@ CONFIG_TEST_UDELAY=m
633CONFIG_TEST_STATIC_KEYS=m 630CONFIG_TEST_STATIC_KEYS=m
634CONFIG_TEST_KMOD=m 631CONFIG_TEST_KMOD=m
635CONFIG_TEST_MEMCAT_P=m 632CONFIG_TEST_MEMCAT_P=m
633CONFIG_TEST_STACKINIT=m
636CONFIG_EARLY_PRINTK=y 634CONFIG_EARLY_PRINTK=y
diff --git a/arch/m68k/configs/multi_defconfig b/arch/m68k/configs/multi_defconfig
index 5a7b7b0d6e72..5e1cc4c17852 100644
--- a/arch/m68k/configs/multi_defconfig
+++ b/arch/m68k/configs/multi_defconfig
@@ -70,6 +70,7 @@ CONFIG_TLS=m
70CONFIG_XFRM_MIGRATE=y 70CONFIG_XFRM_MIGRATE=y
71CONFIG_NET_KEY=y 71CONFIG_NET_KEY=y
72CONFIG_XDP_SOCKETS=y 72CONFIG_XDP_SOCKETS=y
73CONFIG_XDP_SOCKETS_DIAG=m
73CONFIG_INET=y 74CONFIG_INET=y
74CONFIG_IP_PNP=y 75CONFIG_IP_PNP=y
75CONFIG_IP_PNP_DHCP=y 76CONFIG_IP_PNP_DHCP=y
@@ -224,9 +225,6 @@ CONFIG_NFT_FIB_IPV4=m
224CONFIG_NF_TABLES_ARP=y 225CONFIG_NF_TABLES_ARP=y
225CONFIG_NF_FLOW_TABLE_IPV4=m 226CONFIG_NF_FLOW_TABLE_IPV4=m
226CONFIG_NF_LOG_ARP=m 227CONFIG_NF_LOG_ARP=m
227CONFIG_NFT_CHAIN_NAT_IPV4=m
228CONFIG_NFT_MASQ_IPV4=m
229CONFIG_NFT_REDIR_IPV4=m
230CONFIG_IP_NF_IPTABLES=m 228CONFIG_IP_NF_IPTABLES=m
231CONFIG_IP_NF_MATCH_AH=m 229CONFIG_IP_NF_MATCH_AH=m
232CONFIG_IP_NF_MATCH_ECN=m 230CONFIG_IP_NF_MATCH_ECN=m
@@ -248,9 +246,6 @@ CONFIG_IP_NF_ARPTABLES=m
248CONFIG_IP_NF_ARPFILTER=m 246CONFIG_IP_NF_ARPFILTER=m
249CONFIG_IP_NF_ARP_MANGLE=m 247CONFIG_IP_NF_ARP_MANGLE=m
250CONFIG_NFT_CHAIN_ROUTE_IPV6=m 248CONFIG_NFT_CHAIN_ROUTE_IPV6=m
251CONFIG_NFT_CHAIN_NAT_IPV6=m
252CONFIG_NFT_MASQ_IPV6=m
253CONFIG_NFT_REDIR_IPV6=m
254CONFIG_NFT_DUP_IPV6=m 249CONFIG_NFT_DUP_IPV6=m
255CONFIG_NFT_FIB_IPV6=m 250CONFIG_NFT_FIB_IPV6=m
256CONFIG_NF_FLOW_TABLE_IPV6=m 251CONFIG_NF_FLOW_TABLE_IPV6=m
@@ -330,7 +325,6 @@ CONFIG_AF_KCM=m
330# CONFIG_WIRELESS is not set 325# CONFIG_WIRELESS is not set
331CONFIG_PSAMPLE=m 326CONFIG_PSAMPLE=m
332CONFIG_NET_IFE=m 327CONFIG_NET_IFE=m
333CONFIG_NET_DEVLINK=m
334# CONFIG_UEVENT_HELPER is not set 328# CONFIG_UEVENT_HELPER is not set
335CONFIG_DEVTMPFS=y 329CONFIG_DEVTMPFS=y
336CONFIG_DEVTMPFS_MOUNT=y 330CONFIG_DEVTMPFS_MOUNT=y
@@ -526,12 +520,12 @@ CONFIG_RTC_DRV_GENERIC=m
526# CONFIG_VIRTIO_MENU is not set 520# CONFIG_VIRTIO_MENU is not set
527# CONFIG_IOMMU_SUPPORT is not set 521# CONFIG_IOMMU_SUPPORT is not set
528CONFIG_DAX=m 522CONFIG_DAX=m
523# CONFIG_VALIDATE_FS_PARSER is not set
529CONFIG_EXT4_FS=y 524CONFIG_EXT4_FS=y
530CONFIG_REISERFS_FS=m 525CONFIG_REISERFS_FS=m
531CONFIG_JFS_FS=m 526CONFIG_JFS_FS=m
532CONFIG_OCFS2_FS=m 527CONFIG_OCFS2_FS=m
533# CONFIG_OCFS2_DEBUG_MASKLOG is not set 528# CONFIG_OCFS2_DEBUG_MASKLOG is not set
534CONFIG_FS_ENCRYPTION=m
535CONFIG_FANOTIFY=y 529CONFIG_FANOTIFY=y
536CONFIG_QUOTA_NETLINK_INTERFACE=y 530CONFIG_QUOTA_NETLINK_INTERFACE=y
537# CONFIG_PRINT_QUOTA_WARNING is not set 531# CONFIG_PRINT_QUOTA_WARNING is not set
@@ -639,9 +633,11 @@ CONFIG_CRYPTO_AEGIS256=m
639CONFIG_CRYPTO_MORUS640=m 633CONFIG_CRYPTO_MORUS640=m
640CONFIG_CRYPTO_MORUS1280=m 634CONFIG_CRYPTO_MORUS1280=m
641CONFIG_CRYPTO_CFB=m 635CONFIG_CRYPTO_CFB=m
636CONFIG_CRYPTO_CTS=m
642CONFIG_CRYPTO_LRW=m 637CONFIG_CRYPTO_LRW=m
643CONFIG_CRYPTO_OFB=m 638CONFIG_CRYPTO_OFB=m
644CONFIG_CRYPTO_PCBC=m 639CONFIG_CRYPTO_PCBC=m
640CONFIG_CRYPTO_XTS=m
645CONFIG_CRYPTO_KEYWRAP=m 641CONFIG_CRYPTO_KEYWRAP=m
646CONFIG_CRYPTO_ADIANTUM=m 642CONFIG_CRYPTO_ADIANTUM=m
647CONFIG_CRYPTO_XCBC=m 643CONFIG_CRYPTO_XCBC=m
@@ -706,6 +702,7 @@ CONFIG_TEST_OVERFLOW=m
706CONFIG_TEST_RHASHTABLE=m 702CONFIG_TEST_RHASHTABLE=m
707CONFIG_TEST_HASH=m 703CONFIG_TEST_HASH=m
708CONFIG_TEST_IDA=m 704CONFIG_TEST_IDA=m
705CONFIG_TEST_VMALLOC=m
709CONFIG_TEST_USER_COPY=m 706CONFIG_TEST_USER_COPY=m
710CONFIG_TEST_BPF=m 707CONFIG_TEST_BPF=m
711CONFIG_FIND_BIT_BENCHMARK=m 708CONFIG_FIND_BIT_BENCHMARK=m
@@ -715,4 +712,5 @@ CONFIG_TEST_UDELAY=m
715CONFIG_TEST_STATIC_KEYS=m 712CONFIG_TEST_STATIC_KEYS=m
716CONFIG_TEST_KMOD=m 713CONFIG_TEST_KMOD=m
717CONFIG_TEST_MEMCAT_P=m 714CONFIG_TEST_MEMCAT_P=m
715CONFIG_TEST_STACKINIT=m
718CONFIG_EARLY_PRINTK=y 716CONFIG_EARLY_PRINTK=y
diff --git a/arch/m68k/configs/mvme147_defconfig b/arch/m68k/configs/mvme147_defconfig
index 71eb9be1803b..170ac8792c2d 100644
--- a/arch/m68k/configs/mvme147_defconfig
+++ b/arch/m68k/configs/mvme147_defconfig
@@ -48,6 +48,7 @@ CONFIG_TLS=m
48CONFIG_XFRM_MIGRATE=y 48CONFIG_XFRM_MIGRATE=y
49CONFIG_NET_KEY=y 49CONFIG_NET_KEY=y
50CONFIG_XDP_SOCKETS=y 50CONFIG_XDP_SOCKETS=y
51CONFIG_XDP_SOCKETS_DIAG=m
51CONFIG_INET=y 52CONFIG_INET=y
52CONFIG_IP_PNP=y 53CONFIG_IP_PNP=y
53CONFIG_IP_PNP_DHCP=y 54CONFIG_IP_PNP_DHCP=y
@@ -202,9 +203,6 @@ CONFIG_NFT_FIB_IPV4=m
202CONFIG_NF_TABLES_ARP=y 203CONFIG_NF_TABLES_ARP=y
203CONFIG_NF_FLOW_TABLE_IPV4=m 204CONFIG_NF_FLOW_TABLE_IPV4=m
204CONFIG_NF_LOG_ARP=m 205CONFIG_NF_LOG_ARP=m
205CONFIG_NFT_CHAIN_NAT_IPV4=m
206CONFIG_NFT_MASQ_IPV4=m
207CONFIG_NFT_REDIR_IPV4=m
208CONFIG_IP_NF_IPTABLES=m 206CONFIG_IP_NF_IPTABLES=m
209CONFIG_IP_NF_MATCH_AH=m 207CONFIG_IP_NF_MATCH_AH=m
210CONFIG_IP_NF_MATCH_ECN=m 208CONFIG_IP_NF_MATCH_ECN=m
@@ -226,9 +224,6 @@ CONFIG_IP_NF_ARPTABLES=m
226CONFIG_IP_NF_ARPFILTER=m 224CONFIG_IP_NF_ARPFILTER=m
227CONFIG_IP_NF_ARP_MANGLE=m 225CONFIG_IP_NF_ARP_MANGLE=m
228CONFIG_NFT_CHAIN_ROUTE_IPV6=m 226CONFIG_NFT_CHAIN_ROUTE_IPV6=m
229CONFIG_NFT_CHAIN_NAT_IPV6=m
230CONFIG_NFT_MASQ_IPV6=m
231CONFIG_NFT_REDIR_IPV6=m
232CONFIG_NFT_DUP_IPV6=m 227CONFIG_NFT_DUP_IPV6=m
233CONFIG_NFT_FIB_IPV6=m 228CONFIG_NFT_FIB_IPV6=m
234CONFIG_NF_FLOW_TABLE_IPV6=m 229CONFIG_NF_FLOW_TABLE_IPV6=m
@@ -305,7 +300,6 @@ CONFIG_AF_KCM=m
305# CONFIG_WIRELESS is not set 300# CONFIG_WIRELESS is not set
306CONFIG_PSAMPLE=m 301CONFIG_PSAMPLE=m
307CONFIG_NET_IFE=m 302CONFIG_NET_IFE=m
308CONFIG_NET_DEVLINK=m
309# CONFIG_UEVENT_HELPER is not set 303# CONFIG_UEVENT_HELPER is not set
310CONFIG_DEVTMPFS=y 304CONFIG_DEVTMPFS=y
311CONFIG_DEVTMPFS_MOUNT=y 305CONFIG_DEVTMPFS_MOUNT=y
@@ -412,12 +406,12 @@ CONFIG_RTC_DRV_GENERIC=m
412# CONFIG_VIRTIO_MENU is not set 406# CONFIG_VIRTIO_MENU is not set
413# CONFIG_IOMMU_SUPPORT is not set 407# CONFIG_IOMMU_SUPPORT is not set
414CONFIG_DAX=m 408CONFIG_DAX=m
409# CONFIG_VALIDATE_FS_PARSER is not set
415CONFIG_EXT4_FS=y 410CONFIG_EXT4_FS=y
416CONFIG_REISERFS_FS=m 411CONFIG_REISERFS_FS=m
417CONFIG_JFS_FS=m 412CONFIG_JFS_FS=m
418CONFIG_OCFS2_FS=m 413CONFIG_OCFS2_FS=m
419# CONFIG_OCFS2_DEBUG_MASKLOG is not set 414# CONFIG_OCFS2_DEBUG_MASKLOG is not set
420CONFIG_FS_ENCRYPTION=m
421CONFIG_FANOTIFY=y 415CONFIG_FANOTIFY=y
422CONFIG_QUOTA_NETLINK_INTERFACE=y 416CONFIG_QUOTA_NETLINK_INTERFACE=y
423# CONFIG_PRINT_QUOTA_WARNING is not set 417# CONFIG_PRINT_QUOTA_WARNING is not set
@@ -525,9 +519,11 @@ CONFIG_CRYPTO_AEGIS256=m
525CONFIG_CRYPTO_MORUS640=m 519CONFIG_CRYPTO_MORUS640=m
526CONFIG_CRYPTO_MORUS1280=m 520CONFIG_CRYPTO_MORUS1280=m
527CONFIG_CRYPTO_CFB=m 521CONFIG_CRYPTO_CFB=m
522CONFIG_CRYPTO_CTS=m
528CONFIG_CRYPTO_LRW=m 523CONFIG_CRYPTO_LRW=m
529CONFIG_CRYPTO_OFB=m 524CONFIG_CRYPTO_OFB=m
530CONFIG_CRYPTO_PCBC=m 525CONFIG_CRYPTO_PCBC=m
526CONFIG_CRYPTO_XTS=m
531CONFIG_CRYPTO_KEYWRAP=m 527CONFIG_CRYPTO_KEYWRAP=m
532CONFIG_CRYPTO_ADIANTUM=m 528CONFIG_CRYPTO_ADIANTUM=m
533CONFIG_CRYPTO_XCBC=m 529CONFIG_CRYPTO_XCBC=m
@@ -592,6 +588,7 @@ CONFIG_TEST_OVERFLOW=m
592CONFIG_TEST_RHASHTABLE=m 588CONFIG_TEST_RHASHTABLE=m
593CONFIG_TEST_HASH=m 589CONFIG_TEST_HASH=m
594CONFIG_TEST_IDA=m 590CONFIG_TEST_IDA=m
591CONFIG_TEST_VMALLOC=m
595CONFIG_TEST_USER_COPY=m 592CONFIG_TEST_USER_COPY=m
596CONFIG_TEST_BPF=m 593CONFIG_TEST_BPF=m
597CONFIG_FIND_BIT_BENCHMARK=m 594CONFIG_FIND_BIT_BENCHMARK=m
@@ -601,4 +598,5 @@ CONFIG_TEST_UDELAY=m
601CONFIG_TEST_STATIC_KEYS=m 598CONFIG_TEST_STATIC_KEYS=m
602CONFIG_TEST_KMOD=m 599CONFIG_TEST_KMOD=m
603CONFIG_TEST_MEMCAT_P=m 600CONFIG_TEST_MEMCAT_P=m
601CONFIG_TEST_STACKINIT=m
604CONFIG_EARLY_PRINTK=y 602CONFIG_EARLY_PRINTK=y
diff --git a/arch/m68k/configs/mvme16x_defconfig b/arch/m68k/configs/mvme16x_defconfig
index ea2ebd4241c0..d865592a423e 100644
--- a/arch/m68k/configs/mvme16x_defconfig
+++ b/arch/m68k/configs/mvme16x_defconfig
@@ -49,6 +49,7 @@ CONFIG_TLS=m
49CONFIG_XFRM_MIGRATE=y 49CONFIG_XFRM_MIGRATE=y
50CONFIG_NET_KEY=y 50CONFIG_NET_KEY=y
51CONFIG_XDP_SOCKETS=y 51CONFIG_XDP_SOCKETS=y
52CONFIG_XDP_SOCKETS_DIAG=m
52CONFIG_INET=y 53CONFIG_INET=y
53CONFIG_IP_PNP=y 54CONFIG_IP_PNP=y
54CONFIG_IP_PNP_DHCP=y 55CONFIG_IP_PNP_DHCP=y
@@ -203,9 +204,6 @@ CONFIG_NFT_FIB_IPV4=m
203CONFIG_NF_TABLES_ARP=y 204CONFIG_NF_TABLES_ARP=y
204CONFIG_NF_FLOW_TABLE_IPV4=m 205CONFIG_NF_FLOW_TABLE_IPV4=m
205CONFIG_NF_LOG_ARP=m 206CONFIG_NF_LOG_ARP=m
206CONFIG_NFT_CHAIN_NAT_IPV4=m
207CONFIG_NFT_MASQ_IPV4=m
208CONFIG_NFT_REDIR_IPV4=m
209CONFIG_IP_NF_IPTABLES=m 207CONFIG_IP_NF_IPTABLES=m
210CONFIG_IP_NF_MATCH_AH=m 208CONFIG_IP_NF_MATCH_AH=m
211CONFIG_IP_NF_MATCH_ECN=m 209CONFIG_IP_NF_MATCH_ECN=m
@@ -227,9 +225,6 @@ CONFIG_IP_NF_ARPTABLES=m
227CONFIG_IP_NF_ARPFILTER=m 225CONFIG_IP_NF_ARPFILTER=m
228CONFIG_IP_NF_ARP_MANGLE=m 226CONFIG_IP_NF_ARP_MANGLE=m
229CONFIG_NFT_CHAIN_ROUTE_IPV6=m 227CONFIG_NFT_CHAIN_ROUTE_IPV6=m
230CONFIG_NFT_CHAIN_NAT_IPV6=m
231CONFIG_NFT_MASQ_IPV6=m
232CONFIG_NFT_REDIR_IPV6=m
233CONFIG_NFT_DUP_IPV6=m 228CONFIG_NFT_DUP_IPV6=m
234CONFIG_NFT_FIB_IPV6=m 229CONFIG_NFT_FIB_IPV6=m
235CONFIG_NF_FLOW_TABLE_IPV6=m 230CONFIG_NF_FLOW_TABLE_IPV6=m
@@ -306,7 +301,6 @@ CONFIG_AF_KCM=m
306# CONFIG_WIRELESS is not set 301# CONFIG_WIRELESS is not set
307CONFIG_PSAMPLE=m 302CONFIG_PSAMPLE=m
308CONFIG_NET_IFE=m 303CONFIG_NET_IFE=m
309CONFIG_NET_DEVLINK=m
310# CONFIG_UEVENT_HELPER is not set 304# CONFIG_UEVENT_HELPER is not set
311CONFIG_DEVTMPFS=y 305CONFIG_DEVTMPFS=y
312CONFIG_DEVTMPFS_MOUNT=y 306CONFIG_DEVTMPFS_MOUNT=y
@@ -413,12 +407,12 @@ CONFIG_RTC_DRV_GENERIC=m
413# CONFIG_VIRTIO_MENU is not set 407# CONFIG_VIRTIO_MENU is not set
414# CONFIG_IOMMU_SUPPORT is not set 408# CONFIG_IOMMU_SUPPORT is not set
415CONFIG_DAX=m 409CONFIG_DAX=m
410# CONFIG_VALIDATE_FS_PARSER is not set
416CONFIG_EXT4_FS=y 411CONFIG_EXT4_FS=y
417CONFIG_REISERFS_FS=m 412CONFIG_REISERFS_FS=m
418CONFIG_JFS_FS=m 413CONFIG_JFS_FS=m
419CONFIG_OCFS2_FS=m 414CONFIG_OCFS2_FS=m
420# CONFIG_OCFS2_DEBUG_MASKLOG is not set 415# CONFIG_OCFS2_DEBUG_MASKLOG is not set
421CONFIG_FS_ENCRYPTION=m
422CONFIG_FANOTIFY=y 416CONFIG_FANOTIFY=y
423CONFIG_QUOTA_NETLINK_INTERFACE=y 417CONFIG_QUOTA_NETLINK_INTERFACE=y
424# CONFIG_PRINT_QUOTA_WARNING is not set 418# CONFIG_PRINT_QUOTA_WARNING is not set
@@ -526,9 +520,11 @@ CONFIG_CRYPTO_AEGIS256=m
526CONFIG_CRYPTO_MORUS640=m 520CONFIG_CRYPTO_MORUS640=m
527CONFIG_CRYPTO_MORUS1280=m 521CONFIG_CRYPTO_MORUS1280=m
528CONFIG_CRYPTO_CFB=m 522CONFIG_CRYPTO_CFB=m
523CONFIG_CRYPTO_CTS=m
529CONFIG_CRYPTO_LRW=m 524CONFIG_CRYPTO_LRW=m
530CONFIG_CRYPTO_OFB=m 525CONFIG_CRYPTO_OFB=m
531CONFIG_CRYPTO_PCBC=m 526CONFIG_CRYPTO_PCBC=m
527CONFIG_CRYPTO_XTS=m
532CONFIG_CRYPTO_KEYWRAP=m 528CONFIG_CRYPTO_KEYWRAP=m
533CONFIG_CRYPTO_ADIANTUM=m 529CONFIG_CRYPTO_ADIANTUM=m
534CONFIG_CRYPTO_XCBC=m 530CONFIG_CRYPTO_XCBC=m
@@ -593,6 +589,7 @@ CONFIG_TEST_OVERFLOW=m
593CONFIG_TEST_RHASHTABLE=m 589CONFIG_TEST_RHASHTABLE=m
594CONFIG_TEST_HASH=m 590CONFIG_TEST_HASH=m
595CONFIG_TEST_IDA=m 591CONFIG_TEST_IDA=m
592CONFIG_TEST_VMALLOC=m
596CONFIG_TEST_USER_COPY=m 593CONFIG_TEST_USER_COPY=m
597CONFIG_TEST_BPF=m 594CONFIG_TEST_BPF=m
598CONFIG_FIND_BIT_BENCHMARK=m 595CONFIG_FIND_BIT_BENCHMARK=m
@@ -602,4 +599,5 @@ CONFIG_TEST_UDELAY=m
602CONFIG_TEST_STATIC_KEYS=m 599CONFIG_TEST_STATIC_KEYS=m
603CONFIG_TEST_KMOD=m 600CONFIG_TEST_KMOD=m
604CONFIG_TEST_MEMCAT_P=m 601CONFIG_TEST_MEMCAT_P=m
602CONFIG_TEST_STACKINIT=m
605CONFIG_EARLY_PRINTK=y 603CONFIG_EARLY_PRINTK=y
diff --git a/arch/m68k/configs/q40_defconfig b/arch/m68k/configs/q40_defconfig
index cef6dc47c725..034a9de90484 100644
--- a/arch/m68k/configs/q40_defconfig
+++ b/arch/m68k/configs/q40_defconfig
@@ -50,6 +50,7 @@ CONFIG_TLS=m
50CONFIG_XFRM_MIGRATE=y 50CONFIG_XFRM_MIGRATE=y
51CONFIG_NET_KEY=y 51CONFIG_NET_KEY=y
52CONFIG_XDP_SOCKETS=y 52CONFIG_XDP_SOCKETS=y
53CONFIG_XDP_SOCKETS_DIAG=m
53CONFIG_INET=y 54CONFIG_INET=y
54CONFIG_IP_PNP=y 55CONFIG_IP_PNP=y
55CONFIG_IP_PNP_DHCP=y 56CONFIG_IP_PNP_DHCP=y
@@ -204,9 +205,6 @@ CONFIG_NFT_FIB_IPV4=m
204CONFIG_NF_TABLES_ARP=y 205CONFIG_NF_TABLES_ARP=y
205CONFIG_NF_FLOW_TABLE_IPV4=m 206CONFIG_NF_FLOW_TABLE_IPV4=m
206CONFIG_NF_LOG_ARP=m 207CONFIG_NF_LOG_ARP=m
207CONFIG_NFT_CHAIN_NAT_IPV4=m
208CONFIG_NFT_MASQ_IPV4=m
209CONFIG_NFT_REDIR_IPV4=m
210CONFIG_IP_NF_IPTABLES=m 208CONFIG_IP_NF_IPTABLES=m
211CONFIG_IP_NF_MATCH_AH=m 209CONFIG_IP_NF_MATCH_AH=m
212CONFIG_IP_NF_MATCH_ECN=m 210CONFIG_IP_NF_MATCH_ECN=m
@@ -228,9 +226,6 @@ CONFIG_IP_NF_ARPTABLES=m
228CONFIG_IP_NF_ARPFILTER=m 226CONFIG_IP_NF_ARPFILTER=m
229CONFIG_IP_NF_ARP_MANGLE=m 227CONFIG_IP_NF_ARP_MANGLE=m
230CONFIG_NFT_CHAIN_ROUTE_IPV6=m 228CONFIG_NFT_CHAIN_ROUTE_IPV6=m
231CONFIG_NFT_CHAIN_NAT_IPV6=m
232CONFIG_NFT_MASQ_IPV6=m
233CONFIG_NFT_REDIR_IPV6=m
234CONFIG_NFT_DUP_IPV6=m 229CONFIG_NFT_DUP_IPV6=m
235CONFIG_NFT_FIB_IPV6=m 230CONFIG_NFT_FIB_IPV6=m
236CONFIG_NF_FLOW_TABLE_IPV6=m 231CONFIG_NF_FLOW_TABLE_IPV6=m
@@ -307,7 +302,6 @@ CONFIG_AF_KCM=m
307# CONFIG_WIRELESS is not set 302# CONFIG_WIRELESS is not set
308CONFIG_PSAMPLE=m 303CONFIG_PSAMPLE=m
309CONFIG_NET_IFE=m 304CONFIG_NET_IFE=m
310CONFIG_NET_DEVLINK=m
311# CONFIG_UEVENT_HELPER is not set 305# CONFIG_UEVENT_HELPER is not set
312CONFIG_DEVTMPFS=y 306CONFIG_DEVTMPFS=y
313CONFIG_DEVTMPFS_MOUNT=y 307CONFIG_DEVTMPFS_MOUNT=y
@@ -431,12 +425,12 @@ CONFIG_RTC_DRV_GENERIC=m
431# CONFIG_VIRTIO_MENU is not set 425# CONFIG_VIRTIO_MENU is not set
432# CONFIG_IOMMU_SUPPORT is not set 426# CONFIG_IOMMU_SUPPORT is not set
433CONFIG_DAX=m 427CONFIG_DAX=m
428# CONFIG_VALIDATE_FS_PARSER is not set
434CONFIG_EXT4_FS=y 429CONFIG_EXT4_FS=y
435CONFIG_REISERFS_FS=m 430CONFIG_REISERFS_FS=m
436CONFIG_JFS_FS=m 431CONFIG_JFS_FS=m
437CONFIG_OCFS2_FS=m 432CONFIG_OCFS2_FS=m
438# CONFIG_OCFS2_DEBUG_MASKLOG is not set 433# CONFIG_OCFS2_DEBUG_MASKLOG is not set
439CONFIG_FS_ENCRYPTION=m
440CONFIG_FANOTIFY=y 434CONFIG_FANOTIFY=y
441CONFIG_QUOTA_NETLINK_INTERFACE=y 435CONFIG_QUOTA_NETLINK_INTERFACE=y
442# CONFIG_PRINT_QUOTA_WARNING is not set 436# CONFIG_PRINT_QUOTA_WARNING is not set
@@ -544,9 +538,11 @@ CONFIG_CRYPTO_AEGIS256=m
544CONFIG_CRYPTO_MORUS640=m 538CONFIG_CRYPTO_MORUS640=m
545CONFIG_CRYPTO_MORUS1280=m 539CONFIG_CRYPTO_MORUS1280=m
546CONFIG_CRYPTO_CFB=m 540CONFIG_CRYPTO_CFB=m
541CONFIG_CRYPTO_CTS=m
547CONFIG_CRYPTO_LRW=m 542CONFIG_CRYPTO_LRW=m
548CONFIG_CRYPTO_OFB=m 543CONFIG_CRYPTO_OFB=m
549CONFIG_CRYPTO_PCBC=m 544CONFIG_CRYPTO_PCBC=m
545CONFIG_CRYPTO_XTS=m
550CONFIG_CRYPTO_KEYWRAP=m 546CONFIG_CRYPTO_KEYWRAP=m
551CONFIG_CRYPTO_ADIANTUM=m 547CONFIG_CRYPTO_ADIANTUM=m
552CONFIG_CRYPTO_XCBC=m 548CONFIG_CRYPTO_XCBC=m
@@ -611,6 +607,7 @@ CONFIG_TEST_OVERFLOW=m
611CONFIG_TEST_RHASHTABLE=m 607CONFIG_TEST_RHASHTABLE=m
612CONFIG_TEST_HASH=m 608CONFIG_TEST_HASH=m
613CONFIG_TEST_IDA=m 609CONFIG_TEST_IDA=m
610CONFIG_TEST_VMALLOC=m
614CONFIG_TEST_USER_COPY=m 611CONFIG_TEST_USER_COPY=m
615CONFIG_TEST_BPF=m 612CONFIG_TEST_BPF=m
616CONFIG_FIND_BIT_BENCHMARK=m 613CONFIG_FIND_BIT_BENCHMARK=m
@@ -620,4 +617,5 @@ CONFIG_TEST_UDELAY=m
620CONFIG_TEST_STATIC_KEYS=m 617CONFIG_TEST_STATIC_KEYS=m
621CONFIG_TEST_KMOD=m 618CONFIG_TEST_KMOD=m
622CONFIG_TEST_MEMCAT_P=m 619CONFIG_TEST_MEMCAT_P=m
620CONFIG_TEST_STACKINIT=m
623CONFIG_EARLY_PRINTK=y 621CONFIG_EARLY_PRINTK=y
diff --git a/arch/m68k/configs/sun3_defconfig b/arch/m68k/configs/sun3_defconfig
index 69f2282dc4e9..49be0f9fcd8d 100644
--- a/arch/m68k/configs/sun3_defconfig
+++ b/arch/m68k/configs/sun3_defconfig
@@ -46,6 +46,7 @@ CONFIG_TLS=m
46CONFIG_XFRM_MIGRATE=y 46CONFIG_XFRM_MIGRATE=y
47CONFIG_NET_KEY=y 47CONFIG_NET_KEY=y
48CONFIG_XDP_SOCKETS=y 48CONFIG_XDP_SOCKETS=y
49CONFIG_XDP_SOCKETS_DIAG=m
49CONFIG_INET=y 50CONFIG_INET=y
50CONFIG_IP_PNP=y 51CONFIG_IP_PNP=y
51CONFIG_IP_PNP_DHCP=y 52CONFIG_IP_PNP_DHCP=y
@@ -200,9 +201,6 @@ CONFIG_NFT_FIB_IPV4=m
200CONFIG_NF_TABLES_ARP=y 201CONFIG_NF_TABLES_ARP=y
201CONFIG_NF_FLOW_TABLE_IPV4=m 202CONFIG_NF_FLOW_TABLE_IPV4=m
202CONFIG_NF_LOG_ARP=m 203CONFIG_NF_LOG_ARP=m
203CONFIG_NFT_CHAIN_NAT_IPV4=m
204CONFIG_NFT_MASQ_IPV4=m
205CONFIG_NFT_REDIR_IPV4=m
206CONFIG_IP_NF_IPTABLES=m 204CONFIG_IP_NF_IPTABLES=m
207CONFIG_IP_NF_MATCH_AH=m 205CONFIG_IP_NF_MATCH_AH=m
208CONFIG_IP_NF_MATCH_ECN=m 206CONFIG_IP_NF_MATCH_ECN=m
@@ -224,9 +222,6 @@ CONFIG_IP_NF_ARPTABLES=m
224CONFIG_IP_NF_ARPFILTER=m 222CONFIG_IP_NF_ARPFILTER=m
225CONFIG_IP_NF_ARP_MANGLE=m 223CONFIG_IP_NF_ARP_MANGLE=m
226CONFIG_NFT_CHAIN_ROUTE_IPV6=m 224CONFIG_NFT_CHAIN_ROUTE_IPV6=m
227CONFIG_NFT_CHAIN_NAT_IPV6=m
228CONFIG_NFT_MASQ_IPV6=m
229CONFIG_NFT_REDIR_IPV6=m
230CONFIG_NFT_DUP_IPV6=m 225CONFIG_NFT_DUP_IPV6=m
231CONFIG_NFT_FIB_IPV6=m 226CONFIG_NFT_FIB_IPV6=m
232CONFIG_NF_FLOW_TABLE_IPV6=m 227CONFIG_NF_FLOW_TABLE_IPV6=m
@@ -303,7 +298,6 @@ CONFIG_AF_KCM=m
303# CONFIG_WIRELESS is not set 298# CONFIG_WIRELESS is not set
304CONFIG_PSAMPLE=m 299CONFIG_PSAMPLE=m
305CONFIG_NET_IFE=m 300CONFIG_NET_IFE=m
306CONFIG_NET_DEVLINK=m
307# CONFIG_UEVENT_HELPER is not set 301# CONFIG_UEVENT_HELPER is not set
308CONFIG_DEVTMPFS=y 302CONFIG_DEVTMPFS=y
309CONFIG_DEVTMPFS_MOUNT=y 303CONFIG_DEVTMPFS_MOUNT=y
@@ -415,12 +409,12 @@ CONFIG_RTC_DRV_GENERIC=m
415# CONFIG_VIRTIO_MENU is not set 409# CONFIG_VIRTIO_MENU is not set
416# CONFIG_IOMMU_SUPPORT is not set 410# CONFIG_IOMMU_SUPPORT is not set
417CONFIG_DAX=m 411CONFIG_DAX=m
412# CONFIG_VALIDATE_FS_PARSER is not set
418CONFIG_EXT4_FS=y 413CONFIG_EXT4_FS=y
419CONFIG_REISERFS_FS=m 414CONFIG_REISERFS_FS=m
420CONFIG_JFS_FS=m 415CONFIG_JFS_FS=m
421CONFIG_OCFS2_FS=m 416CONFIG_OCFS2_FS=m
422# CONFIG_OCFS2_DEBUG_MASKLOG is not set 417# CONFIG_OCFS2_DEBUG_MASKLOG is not set
423CONFIG_FS_ENCRYPTION=m
424CONFIG_FANOTIFY=y 418CONFIG_FANOTIFY=y
425CONFIG_QUOTA_NETLINK_INTERFACE=y 419CONFIG_QUOTA_NETLINK_INTERFACE=y
426# CONFIG_PRINT_QUOTA_WARNING is not set 420# CONFIG_PRINT_QUOTA_WARNING is not set
@@ -528,9 +522,11 @@ CONFIG_CRYPTO_AEGIS256=m
528CONFIG_CRYPTO_MORUS640=m 522CONFIG_CRYPTO_MORUS640=m
529CONFIG_CRYPTO_MORUS1280=m 523CONFIG_CRYPTO_MORUS1280=m
530CONFIG_CRYPTO_CFB=m 524CONFIG_CRYPTO_CFB=m
525CONFIG_CRYPTO_CTS=m
531CONFIG_CRYPTO_LRW=m 526CONFIG_CRYPTO_LRW=m
532CONFIG_CRYPTO_OFB=m 527CONFIG_CRYPTO_OFB=m
533CONFIG_CRYPTO_PCBC=m 528CONFIG_CRYPTO_PCBC=m
529CONFIG_CRYPTO_XTS=m
534CONFIG_CRYPTO_KEYWRAP=m 530CONFIG_CRYPTO_KEYWRAP=m
535CONFIG_CRYPTO_ADIANTUM=m 531CONFIG_CRYPTO_ADIANTUM=m
536CONFIG_CRYPTO_XCBC=m 532CONFIG_CRYPTO_XCBC=m
@@ -595,6 +591,7 @@ CONFIG_TEST_OVERFLOW=m
595CONFIG_TEST_RHASHTABLE=m 591CONFIG_TEST_RHASHTABLE=m
596CONFIG_TEST_HASH=m 592CONFIG_TEST_HASH=m
597CONFIG_TEST_IDA=m 593CONFIG_TEST_IDA=m
594CONFIG_TEST_VMALLOC=m
598CONFIG_TEST_USER_COPY=m 595CONFIG_TEST_USER_COPY=m
599CONFIG_TEST_BPF=m 596CONFIG_TEST_BPF=m
600CONFIG_FIND_BIT_BENCHMARK=m 597CONFIG_FIND_BIT_BENCHMARK=m
@@ -604,3 +601,4 @@ CONFIG_TEST_UDELAY=m
604CONFIG_TEST_STATIC_KEYS=m 601CONFIG_TEST_STATIC_KEYS=m
605CONFIG_TEST_KMOD=m 602CONFIG_TEST_KMOD=m
606CONFIG_TEST_MEMCAT_P=m 603CONFIG_TEST_MEMCAT_P=m
604CONFIG_TEST_STACKINIT=m
diff --git a/arch/m68k/configs/sun3x_defconfig b/arch/m68k/configs/sun3x_defconfig
index e91267e868b2..a71acf4a6004 100644
--- a/arch/m68k/configs/sun3x_defconfig
+++ b/arch/m68k/configs/sun3x_defconfig
@@ -46,6 +46,7 @@ CONFIG_TLS=m
46CONFIG_XFRM_MIGRATE=y 46CONFIG_XFRM_MIGRATE=y
47CONFIG_NET_KEY=y 47CONFIG_NET_KEY=y
48CONFIG_XDP_SOCKETS=y 48CONFIG_XDP_SOCKETS=y
49CONFIG_XDP_SOCKETS_DIAG=m
49CONFIG_INET=y 50CONFIG_INET=y
50CONFIG_IP_PNP=y 51CONFIG_IP_PNP=y
51CONFIG_IP_PNP_DHCP=y 52CONFIG_IP_PNP_DHCP=y
@@ -200,9 +201,6 @@ CONFIG_NFT_FIB_IPV4=m
200CONFIG_NF_TABLES_ARP=y 201CONFIG_NF_TABLES_ARP=y
201CONFIG_NF_FLOW_TABLE_IPV4=m 202CONFIG_NF_FLOW_TABLE_IPV4=m
202CONFIG_NF_LOG_ARP=m 203CONFIG_NF_LOG_ARP=m
203CONFIG_NFT_CHAIN_NAT_IPV4=m
204CONFIG_NFT_MASQ_IPV4=m
205CONFIG_NFT_REDIR_IPV4=m
206CONFIG_IP_NF_IPTABLES=m 204CONFIG_IP_NF_IPTABLES=m
207CONFIG_IP_NF_MATCH_AH=m 205CONFIG_IP_NF_MATCH_AH=m
208CONFIG_IP_NF_MATCH_ECN=m 206CONFIG_IP_NF_MATCH_ECN=m
@@ -224,9 +222,6 @@ CONFIG_IP_NF_ARPTABLES=m
224CONFIG_IP_NF_ARPFILTER=m 222CONFIG_IP_NF_ARPFILTER=m
225CONFIG_IP_NF_ARP_MANGLE=m 223CONFIG_IP_NF_ARP_MANGLE=m
226CONFIG_NFT_CHAIN_ROUTE_IPV6=m 224CONFIG_NFT_CHAIN_ROUTE_IPV6=m
227CONFIG_NFT_CHAIN_NAT_IPV6=m
228CONFIG_NFT_MASQ_IPV6=m
229CONFIG_NFT_REDIR_IPV6=m
230CONFIG_NFT_DUP_IPV6=m 225CONFIG_NFT_DUP_IPV6=m
231CONFIG_NFT_FIB_IPV6=m 226CONFIG_NFT_FIB_IPV6=m
232CONFIG_NF_FLOW_TABLE_IPV6=m 227CONFIG_NF_FLOW_TABLE_IPV6=m
@@ -303,7 +298,6 @@ CONFIG_AF_KCM=m
303# CONFIG_WIRELESS is not set 298# CONFIG_WIRELESS is not set
304CONFIG_PSAMPLE=m 299CONFIG_PSAMPLE=m
305CONFIG_NET_IFE=m 300CONFIG_NET_IFE=m
306CONFIG_NET_DEVLINK=m
307# CONFIG_UEVENT_HELPER is not set 301# CONFIG_UEVENT_HELPER is not set
308CONFIG_DEVTMPFS=y 302CONFIG_DEVTMPFS=y
309CONFIG_DEVTMPFS_MOUNT=y 303CONFIG_DEVTMPFS_MOUNT=y
@@ -414,12 +408,12 @@ CONFIG_RTC_DRV_GENERIC=m
414# CONFIG_VIRTIO_MENU is not set 408# CONFIG_VIRTIO_MENU is not set
415# CONFIG_IOMMU_SUPPORT is not set 409# CONFIG_IOMMU_SUPPORT is not set
416CONFIG_DAX=m 410CONFIG_DAX=m
411# CONFIG_VALIDATE_FS_PARSER is not set
417CONFIG_EXT4_FS=y 412CONFIG_EXT4_FS=y
418CONFIG_REISERFS_FS=m 413CONFIG_REISERFS_FS=m
419CONFIG_JFS_FS=m 414CONFIG_JFS_FS=m
420CONFIG_OCFS2_FS=m 415CONFIG_OCFS2_FS=m
421# CONFIG_OCFS2_DEBUG_MASKLOG is not set 416# CONFIG_OCFS2_DEBUG_MASKLOG is not set
422CONFIG_FS_ENCRYPTION=m
423CONFIG_FANOTIFY=y 417CONFIG_FANOTIFY=y
424CONFIG_QUOTA_NETLINK_INTERFACE=y 418CONFIG_QUOTA_NETLINK_INTERFACE=y
425# CONFIG_PRINT_QUOTA_WARNING is not set 419# CONFIG_PRINT_QUOTA_WARNING is not set
@@ -527,9 +521,11 @@ CONFIG_CRYPTO_AEGIS256=m
527CONFIG_CRYPTO_MORUS640=m 521CONFIG_CRYPTO_MORUS640=m
528CONFIG_CRYPTO_MORUS1280=m 522CONFIG_CRYPTO_MORUS1280=m
529CONFIG_CRYPTO_CFB=m 523CONFIG_CRYPTO_CFB=m
524CONFIG_CRYPTO_CTS=m
530CONFIG_CRYPTO_LRW=m 525CONFIG_CRYPTO_LRW=m
531CONFIG_CRYPTO_OFB=m 526CONFIG_CRYPTO_OFB=m
532CONFIG_CRYPTO_PCBC=m 527CONFIG_CRYPTO_PCBC=m
528CONFIG_CRYPTO_XTS=m
533CONFIG_CRYPTO_KEYWRAP=m 529CONFIG_CRYPTO_KEYWRAP=m
534CONFIG_CRYPTO_ADIANTUM=m 530CONFIG_CRYPTO_ADIANTUM=m
535CONFIG_CRYPTO_XCBC=m 531CONFIG_CRYPTO_XCBC=m
@@ -594,6 +590,7 @@ CONFIG_TEST_OVERFLOW=m
594CONFIG_TEST_RHASHTABLE=m 590CONFIG_TEST_RHASHTABLE=m
595CONFIG_TEST_HASH=m 591CONFIG_TEST_HASH=m
596CONFIG_TEST_IDA=m 592CONFIG_TEST_IDA=m
593CONFIG_TEST_VMALLOC=m
597CONFIG_TEST_USER_COPY=m 594CONFIG_TEST_USER_COPY=m
598CONFIG_TEST_BPF=m 595CONFIG_TEST_BPF=m
599CONFIG_FIND_BIT_BENCHMARK=m 596CONFIG_FIND_BIT_BENCHMARK=m
@@ -603,4 +600,5 @@ CONFIG_TEST_UDELAY=m
603CONFIG_TEST_STATIC_KEYS=m 600CONFIG_TEST_STATIC_KEYS=m
604CONFIG_TEST_KMOD=m 601CONFIG_TEST_KMOD=m
605CONFIG_TEST_MEMCAT_P=m 602CONFIG_TEST_MEMCAT_P=m
603CONFIG_TEST_STACKINIT=m
606CONFIG_EARLY_PRINTK=y 604CONFIG_EARLY_PRINTK=y
diff --git a/arch/m68k/hp300/config.c b/arch/m68k/hp300/config.c
index a19bcd23f80b..a161d44fd20b 100644
--- a/arch/m68k/hp300/config.c
+++ b/arch/m68k/hp300/config.c
@@ -254,7 +254,6 @@ void __init config_hp300(void)
254 mach_sched_init = hp300_sched_init; 254 mach_sched_init = hp300_sched_init;
255 mach_init_IRQ = hp300_init_IRQ; 255 mach_init_IRQ = hp300_init_IRQ;
256 mach_get_model = hp300_get_model; 256 mach_get_model = hp300_get_model;
257 arch_gettimeoffset = hp300_gettimeoffset;
258 mach_hwclk = hp300_hwclk; 257 mach_hwclk = hp300_hwclk;
259 mach_get_ss = hp300_get_ss; 258 mach_get_ss = hp300_get_ss;
260 mach_reset = hp300_reset; 259 mach_reset = hp300_reset;
diff --git a/arch/m68k/hp300/time.c b/arch/m68k/hp300/time.c
index 289d928a46cb..bfee13e1d0fe 100644
--- a/arch/m68k/hp300/time.c
+++ b/arch/m68k/hp300/time.c
@@ -8,6 +8,7 @@
8 */ 8 */
9 9
10#include <asm/ptrace.h> 10#include <asm/ptrace.h>
11#include <linux/clocksource.h>
11#include <linux/types.h> 12#include <linux/types.h>
12#include <linux/init.h> 13#include <linux/init.h>
13#include <linux/sched.h> 14#include <linux/sched.h>
@@ -19,6 +20,18 @@
19#include <asm/traps.h> 20#include <asm/traps.h>
20#include <asm/blinken.h> 21#include <asm/blinken.h>
21 22
23static u64 hp300_read_clk(struct clocksource *cs);
24
25static struct clocksource hp300_clk = {
26 .name = "timer",
27 .rating = 250,
28 .read = hp300_read_clk,
29 .mask = CLOCKSOURCE_MASK(32),
30 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
31};
32
33static u32 clk_total, clk_offset;
34
22/* Clock hardware definitions */ 35/* Clock hardware definitions */
23 36
24#define CLOCKBASE 0xf05f8000 37#define CLOCKBASE 0xf05f8000
@@ -28,39 +41,61 @@
28#define CLKCR3 CLKCR1 41#define CLKCR3 CLKCR1
29#define CLKSR CLKCR2 42#define CLKSR CLKCR2
30#define CLKMSB1 0x5 43#define CLKMSB1 0x5
44#define CLKLSB1 0x7
31#define CLKMSB2 0x9 45#define CLKMSB2 0x9
32#define CLKMSB3 0xD 46#define CLKMSB3 0xD
33 47
48#define CLKSR_INT1 BIT(0)
49
34/* This is for machines which generate the exact clock. */ 50/* This is for machines which generate the exact clock. */
35#define USECS_PER_JIFFY (1000000/HZ)
36 51
37#define INTVAL ((10000 / 4) - 1) 52#define HP300_TIMER_CLOCK_FREQ 250000
53#define HP300_TIMER_CYCLES (HP300_TIMER_CLOCK_FREQ / HZ)
54#define INTVAL (HP300_TIMER_CYCLES - 1)
38 55
39static irqreturn_t hp300_tick(int irq, void *dev_id) 56static irqreturn_t hp300_tick(int irq, void *dev_id)
40{ 57{
58 irq_handler_t timer_routine = dev_id;
59 unsigned long flags;
41 unsigned long tmp; 60 unsigned long tmp;
42 irq_handler_t vector = dev_id; 61
62 local_irq_save(flags);
43 in_8(CLOCKBASE + CLKSR); 63 in_8(CLOCKBASE + CLKSR);
44 asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE)); 64 asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE));
65 clk_total += INTVAL;
66 clk_offset = 0;
67 timer_routine(0, NULL);
68 local_irq_restore(flags);
69
45 /* Turn off the network and SCSI leds */ 70 /* Turn off the network and SCSI leds */
46 blinken_leds(0, 0xe0); 71 blinken_leds(0, 0xe0);
47 return vector(irq, NULL); 72 return IRQ_HANDLED;
48} 73}
49 74
50u32 hp300_gettimeoffset(void) 75static u64 hp300_read_clk(struct clocksource *cs)
51{ 76{
52 /* Read current timer 1 value */ 77 unsigned long flags;
53 unsigned char lsb, msb1, msb2; 78 unsigned char lsb, msb, msb_new;
54 unsigned short ticks; 79 u32 ticks;
55 80
56 msb1 = in_8(CLOCKBASE + 5); 81 local_irq_save(flags);
57 lsb = in_8(CLOCKBASE + 7); 82 /* Read current timer 1 value */
58 msb2 = in_8(CLOCKBASE + 5); 83 msb = in_8(CLOCKBASE + CLKMSB1);
59 if (msb1 != msb2) 84again:
60 /* A carry happened while we were reading. Read it again */ 85 if ((in_8(CLOCKBASE + CLKSR) & CLKSR_INT1) && msb > 0)
61 lsb = in_8(CLOCKBASE + 7); 86 clk_offset = INTVAL;
62 ticks = INTVAL - ((msb2 << 8) | lsb); 87 lsb = in_8(CLOCKBASE + CLKLSB1);
63 return ((USECS_PER_JIFFY * ticks) / INTVAL) * 1000; 88 msb_new = in_8(CLOCKBASE + CLKMSB1);
89 if (msb_new != msb) {
90 msb = msb_new;
91 goto again;
92 }
93
94 ticks = INTVAL - ((msb << 8) | lsb);
95 ticks += clk_offset + clk_total;
96 local_irq_restore(flags);
97
98 return ticks;
64} 99}
65 100
66void __init hp300_sched_init(irq_handler_t vector) 101void __init hp300_sched_init(irq_handler_t vector)
@@ -70,9 +105,11 @@ void __init hp300_sched_init(irq_handler_t vector)
70 105
71 asm volatile(" movpw %0,%1@(5)" : : "d" (INTVAL), "a" (CLOCKBASE)); 106 asm volatile(" movpw %0,%1@(5)" : : "d" (INTVAL), "a" (CLOCKBASE));
72 107
73 if (request_irq(IRQ_AUTO_6, hp300_tick, 0, "timer tick", vector)) 108 if (request_irq(IRQ_AUTO_6, hp300_tick, IRQF_TIMER, "timer tick", vector))
74 pr_err("Couldn't register timer interrupt\n"); 109 pr_err("Couldn't register timer interrupt\n");
75 110
76 out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */ 111 out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
77 out_8(CLOCKBASE + CLKCR1, 0x40); /* enable irq */ 112 out_8(CLOCKBASE + CLKCR1, 0x40); /* enable irq */
113
114 clocksource_register_hz(&hp300_clk, HP300_TIMER_CLOCK_FREQ);
78} 115}
diff --git a/arch/m68k/hp300/time.h b/arch/m68k/hp300/time.h
index f5583ec4033d..1d77b55cc72a 100644
--- a/arch/m68k/hp300/time.h
+++ b/arch/m68k/hp300/time.h
@@ -1,2 +1 @@
1extern void hp300_sched_init(irq_handler_t vector); extern void hp300_sched_init(irq_handler_t vector);
2extern u32 hp300_gettimeoffset(void);
diff --git a/arch/m68k/include/asm/mvme147hw.h b/arch/m68k/include/asm/mvme147hw.h
index 9c7ff67c5ffd..257b29184af9 100644
--- a/arch/m68k/include/asm/mvme147hw.h
+++ b/arch/m68k/include/asm/mvme147hw.h
@@ -66,7 +66,7 @@ struct pcc_regs {
66#define PCC_INT_ENAB 0x08 66#define PCC_INT_ENAB 0x08
67 67
68#define PCC_TIMER_INT_CLR 0x80 68#define PCC_TIMER_INT_CLR 0x80
69#define PCC_TIMER_PRELOAD 63936l 69#define PCC_TIMER_CLR_OVF 0x04
70 70
71#define PCC_LEVEL_ABORT 0x07 71#define PCC_LEVEL_ABORT 0x07
72#define PCC_LEVEL_SERIAL 0x04 72#define PCC_LEVEL_SERIAL 0x04
diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
index cd9317d53276..11be08f4f750 100644
--- a/arch/m68k/mac/config.c
+++ b/arch/m68k/mac/config.c
@@ -54,8 +54,6 @@ struct mac_booter_data mac_bi_data;
54/* The phys. video addr. - might be bogus on some machines */ 54/* The phys. video addr. - might be bogus on some machines */
55static unsigned long mac_orig_videoaddr; 55static unsigned long mac_orig_videoaddr;
56 56
57/* Mac specific timer functions */
58extern u32 mac_gettimeoffset(void);
59extern int mac_hwclk(int, struct rtc_time *); 57extern int mac_hwclk(int, struct rtc_time *);
60extern void iop_preinit(void); 58extern void iop_preinit(void);
61extern void iop_init(void); 59extern void iop_init(void);
@@ -155,7 +153,6 @@ void __init config_mac(void)
155 mach_sched_init = mac_sched_init; 153 mach_sched_init = mac_sched_init;
156 mach_init_IRQ = mac_init_IRQ; 154 mach_init_IRQ = mac_init_IRQ;
157 mach_get_model = mac_get_model; 155 mach_get_model = mac_get_model;
158 arch_gettimeoffset = mac_gettimeoffset;
159 mach_hwclk = mac_hwclk; 156 mach_hwclk = mac_hwclk;
160 mach_reset = mac_reset; 157 mach_reset = mac_reset;
161 mach_halt = mac_poweroff; 158 mach_halt = mac_poweroff;
diff --git a/arch/m68k/mac/via.c b/arch/m68k/mac/via.c
index 0b0289459173..3c2cfcb74982 100644
--- a/arch/m68k/mac/via.c
+++ b/arch/m68k/mac/via.c
@@ -23,6 +23,7 @@
23 * 23 *
24 */ 24 */
25 25
26#include <linux/clocksource.h>
26#include <linux/types.h> 27#include <linux/types.h>
27#include <linux/kernel.h> 28#include <linux/kernel.h>
28#include <linux/mm.h> 29#include <linux/mm.h>
@@ -55,16 +56,6 @@ static __u8 rbv_clear;
55static int gIER,gIFR,gBufA,gBufB; 56static int gIER,gIFR,gBufA,gBufB;
56 57
57/* 58/*
58 * Timer defs.
59 */
60
61#define TICK_SIZE 10000
62#define MAC_CLOCK_TICK (783300/HZ) /* ticks per HZ */
63#define MAC_CLOCK_LOW (MAC_CLOCK_TICK&0xFF)
64#define MAC_CLOCK_HIGH (MAC_CLOCK_TICK>>8)
65
66
67/*
68 * On Macs with a genuine VIA chip there is no way to mask an individual slot 59 * On Macs with a genuine VIA chip there is no way to mask an individual slot
69 * interrupt. This limitation also seems to apply to VIA clone logic cores in 60 * interrupt. This limitation also seems to apply to VIA clone logic cores in
70 * Quadra-like ASICs. (RBV and OSS machines don't have this limitation.) 61 * Quadra-like ASICs. (RBV and OSS machines don't have this limitation.)
@@ -272,22 +263,6 @@ void __init via_init(void)
272} 263}
273 264
274/* 265/*
275 * Start the 100 Hz clock
276 */
277
278void __init via_init_clock(irq_handler_t func)
279{
280 via1[vACR] |= 0x40;
281 via1[vT1LL] = MAC_CLOCK_LOW;
282 via1[vT1LH] = MAC_CLOCK_HIGH;
283 via1[vT1CL] = MAC_CLOCK_LOW;
284 via1[vT1CH] = MAC_CLOCK_HIGH;
285
286 if (request_irq(IRQ_MAC_TIMER_1, func, 0, "timer", func))
287 pr_err("Couldn't register %s interrupt\n", "timer");
288}
289
290/*
291 * Debugging dump, used in various places to see what's going on. 266 * Debugging dump, used in various places to see what's going on.
292 */ 267 */
293 268
@@ -315,29 +290,6 @@ void via_debug_dump(void)
315} 290}
316 291
317/* 292/*
318 * This is always executed with interrupts disabled.
319 *
320 * TBI: get time offset between scheduling timer ticks
321 */
322
323u32 mac_gettimeoffset(void)
324{
325 unsigned long ticks, offset = 0;
326
327 /* read VIA1 timer 2 current value */
328 ticks = via1[vT1CL] | (via1[vT1CH] << 8);
329 /* The probability of underflow is less than 2% */
330 if (ticks > MAC_CLOCK_TICK - MAC_CLOCK_TICK / 50)
331 /* Check for pending timer interrupt in VIA1 IFR */
332 if (via1[vIFR] & 0x40) offset = TICK_SIZE;
333
334 ticks = MAC_CLOCK_TICK - ticks;
335 ticks = ticks * 10000L / MAC_CLOCK_TICK;
336
337 return (ticks + offset) * 1000;
338}
339
340/*
341 * Flush the L2 cache on Macs that have it by flipping 293 * Flush the L2 cache on Macs that have it by flipping
342 * the system into 24-bit mode for an instant. 294 * the system into 24-bit mode for an instant.
343 */ 295 */
@@ -440,6 +392,8 @@ void via_nubus_irq_shutdown(int irq)
440 * via6522.c :-), disable/pending masks added. 392 * via6522.c :-), disable/pending masks added.
441 */ 393 */
442 394
395#define VIA_TIMER_1_INT BIT(6)
396
443void via1_irq(struct irq_desc *desc) 397void via1_irq(struct irq_desc *desc)
444{ 398{
445 int irq_num; 399 int irq_num;
@@ -449,6 +403,21 @@ void via1_irq(struct irq_desc *desc)
449 if (!events) 403 if (!events)
450 return; 404 return;
451 405
406 irq_num = IRQ_MAC_TIMER_1;
407 irq_bit = VIA_TIMER_1_INT;
408 if (events & irq_bit) {
409 unsigned long flags;
410
411 local_irq_save(flags);
412 via1[vIFR] = irq_bit;
413 generic_handle_irq(irq_num);
414 local_irq_restore(flags);
415
416 events &= ~irq_bit;
417 if (!events)
418 return;
419 }
420
452 irq_num = VIA1_SOURCE_BASE; 421 irq_num = VIA1_SOURCE_BASE;
453 irq_bit = 1; 422 irq_bit = 1;
454 do { 423 do {
@@ -605,3 +574,82 @@ int via2_scsi_drq_pending(void)
605 return via2[gIFR] & (1 << IRQ_IDX(IRQ_MAC_SCSIDRQ)); 574 return via2[gIFR] & (1 << IRQ_IDX(IRQ_MAC_SCSIDRQ));
606} 575}
607EXPORT_SYMBOL(via2_scsi_drq_pending); 576EXPORT_SYMBOL(via2_scsi_drq_pending);
577
578/* timer and clock source */
579
580#define VIA_CLOCK_FREQ 783360 /* VIA "phase 2" clock in Hz */
581#define VIA_TIMER_CYCLES (VIA_CLOCK_FREQ / HZ) /* clock cycles per jiffy */
582
583#define VIA_TC (VIA_TIMER_CYCLES - 2) /* including 0 and -1 */
584#define VIA_TC_LOW (VIA_TC & 0xFF)
585#define VIA_TC_HIGH (VIA_TC >> 8)
586
587static u64 mac_read_clk(struct clocksource *cs);
588
589static struct clocksource mac_clk = {
590 .name = "via1",
591 .rating = 250,
592 .read = mac_read_clk,
593 .mask = CLOCKSOURCE_MASK(32),
594 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
595};
596
597static u32 clk_total, clk_offset;
598
599static irqreturn_t via_timer_handler(int irq, void *dev_id)
600{
601 irq_handler_t timer_routine = dev_id;
602
603 clk_total += VIA_TIMER_CYCLES;
604 clk_offset = 0;
605 timer_routine(0, NULL);
606
607 return IRQ_HANDLED;
608}
609
610void __init via_init_clock(irq_handler_t timer_routine)
611{
612 if (request_irq(IRQ_MAC_TIMER_1, via_timer_handler, IRQF_TIMER, "timer",
613 timer_routine)) {
614 pr_err("Couldn't register %s interrupt\n", "timer");
615 return;
616 }
617
618 via1[vT1LL] = VIA_TC_LOW;
619 via1[vT1LH] = VIA_TC_HIGH;
620 via1[vT1CL] = VIA_TC_LOW;
621 via1[vT1CH] = VIA_TC_HIGH;
622 via1[vACR] |= 0x40;
623
624 clocksource_register_hz(&mac_clk, VIA_CLOCK_FREQ);
625}
626
627static u64 mac_read_clk(struct clocksource *cs)
628{
629 unsigned long flags;
630 u8 count_high;
631 u16 count;
632 u32 ticks;
633
634 /*
635 * Timer counter wrap-around is detected with the timer interrupt flag
636 * but reading the counter low byte (vT1CL) would reset the flag.
637 * Also, accessing both counter registers is essentially a data race.
638 * These problems are avoided by ignoring the low byte. Clock accuracy
639 * is 256 times worse (error can reach 0.327 ms) but CPU overhead is
640 * reduced by avoiding slow VIA register accesses.
641 */
642
643 local_irq_save(flags);
644 count_high = via1[vT1CH];
645 if (count_high == 0xFF)
646 count_high = 0;
647 if (count_high > 0 && (via1[vIFR] & VIA_TIMER_1_INT))
648 clk_offset = VIA_TIMER_CYCLES;
649 count = count_high << 8;
650 ticks = VIA_TIMER_CYCLES - count;
651 ticks += clk_offset + clk_total;
652 local_irq_restore(flags);
653
654 return ticks;
655}
diff --git a/arch/m68k/mvme147/config.c b/arch/m68k/mvme147/config.c
index adea549d240e..545a1fe0e119 100644
--- a/arch/m68k/mvme147/config.c
+++ b/arch/m68k/mvme147/config.c
@@ -17,6 +17,7 @@
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/mm.h> 18#include <linux/mm.h>
19#include <linux/tty.h> 19#include <linux/tty.h>
20#include <linux/clocksource.h>
20#include <linux/console.h> 21#include <linux/console.h>
21#include <linux/linkage.h> 22#include <linux/linkage.h>
22#include <linux/init.h> 23#include <linux/init.h>
@@ -38,18 +39,12 @@
38 39
39static void mvme147_get_model(char *model); 40static void mvme147_get_model(char *model);
40extern void mvme147_sched_init(irq_handler_t handler); 41extern void mvme147_sched_init(irq_handler_t handler);
41extern u32 mvme147_gettimeoffset(void);
42extern int mvme147_hwclk (int, struct rtc_time *); 42extern int mvme147_hwclk (int, struct rtc_time *);
43extern void mvme147_reset (void); 43extern void mvme147_reset (void);
44 44
45 45
46static int bcd2int (unsigned char b); 46static int bcd2int (unsigned char b);
47 47
48/* Save tick handler routine pointer, will point to xtime_update() in
49 * kernel/time/timekeeping.c, called via mvme147_process_int() */
50
51irq_handler_t tick_handler;
52
53 48
54int __init mvme147_parse_bootinfo(const struct bi_record *bi) 49int __init mvme147_parse_bootinfo(const struct bi_record *bi)
55{ 50{
@@ -89,7 +84,6 @@ void __init config_mvme147(void)
89 mach_max_dma_address = 0x01000000; 84 mach_max_dma_address = 0x01000000;
90 mach_sched_init = mvme147_sched_init; 85 mach_sched_init = mvme147_sched_init;
91 mach_init_IRQ = mvme147_init_IRQ; 86 mach_init_IRQ = mvme147_init_IRQ;
92 arch_gettimeoffset = mvme147_gettimeoffset;
93 mach_hwclk = mvme147_hwclk; 87 mach_hwclk = mvme147_hwclk;
94 mach_reset = mvme147_reset; 88 mach_reset = mvme147_reset;
95 mach_get_model = mvme147_get_model; 89 mach_get_model = mvme147_get_model;
@@ -99,45 +93,76 @@ void __init config_mvme147(void)
99 vme_brdtype = VME_TYPE_MVME147; 93 vme_brdtype = VME_TYPE_MVME147;
100} 94}
101 95
96static u64 mvme147_read_clk(struct clocksource *cs);
97
98static struct clocksource mvme147_clk = {
99 .name = "pcc",
100 .rating = 250,
101 .read = mvme147_read_clk,
102 .mask = CLOCKSOURCE_MASK(32),
103 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
104};
105
106static u32 clk_total;
107
108#define PCC_TIMER_CLOCK_FREQ 160000
109#define PCC_TIMER_CYCLES (PCC_TIMER_CLOCK_FREQ / HZ)
110#define PCC_TIMER_PRELOAD (0x10000 - PCC_TIMER_CYCLES)
102 111
103/* Using pcc tick timer 1 */ 112/* Using pcc tick timer 1 */
104 113
105static irqreturn_t mvme147_timer_int (int irq, void *dev_id) 114static irqreturn_t mvme147_timer_int (int irq, void *dev_id)
106{ 115{
116 irq_handler_t timer_routine = dev_id;
117 unsigned long flags;
118
119 local_irq_save(flags);
107 m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR; 120 m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR;
108 m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1; 121 m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF;
109 return tick_handler(irq, dev_id); 122 clk_total += PCC_TIMER_CYCLES;
123 timer_routine(0, NULL);
124 local_irq_restore(flags);
125
126 return IRQ_HANDLED;
110} 127}
111 128
112 129
113void mvme147_sched_init (irq_handler_t timer_routine) 130void mvme147_sched_init (irq_handler_t timer_routine)
114{ 131{
115 tick_handler = timer_routine; 132 if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, IRQF_TIMER,
116 if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, 0, "timer 1", NULL)) 133 "timer 1", timer_routine))
117 pr_err("Couldn't register timer interrupt\n"); 134 pr_err("Couldn't register timer interrupt\n");
118 135
119 /* Init the clock with a value */ 136 /* Init the clock with a value */
120 /* our clock goes off every 6.25us */ 137 /* The clock counter increments until 0xFFFF then reloads */
121 m147_pcc->t1_preload = PCC_TIMER_PRELOAD; 138 m147_pcc->t1_preload = PCC_TIMER_PRELOAD;
122 m147_pcc->t1_cntrl = 0x0; /* clear timer */ 139 m147_pcc->t1_cntrl = 0x0; /* clear timer */
123 m147_pcc->t1_cntrl = 0x3; /* start timer */ 140 m147_pcc->t1_cntrl = 0x3; /* start timer */
124 m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR; /* clear pending ints */ 141 m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR; /* clear pending ints */
125 m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1; 142 m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1;
143
144 clocksource_register_hz(&mvme147_clk, PCC_TIMER_CLOCK_FREQ);
126} 145}
127 146
128/* This is always executed with interrupts disabled. */ 147static u64 mvme147_read_clk(struct clocksource *cs)
129/* XXX There are race hazards in this code XXX */
130u32 mvme147_gettimeoffset(void)
131{ 148{
132 volatile unsigned short *cp = (volatile unsigned short *)0xfffe1012; 149 unsigned long flags;
133 unsigned short n; 150 u8 overflow, tmp;
134 151 u16 count;
135 n = *cp; 152 u32 ticks;
136 while (n != *cp) 153
137 n = *cp; 154 local_irq_save(flags);
138 155 tmp = m147_pcc->t1_cntrl >> 4;
139 n -= PCC_TIMER_PRELOAD; 156 count = m147_pcc->t1_count;
140 return ((unsigned long)n * 25 / 4) * 1000; 157 overflow = m147_pcc->t1_cntrl >> 4;
158 if (overflow != tmp)
159 count = m147_pcc->t1_count;
160 count -= PCC_TIMER_PRELOAD;
161 ticks = count + overflow * PCC_TIMER_CYCLES;
162 ticks += clk_total;
163 local_irq_restore(flags);
164
165 return ticks;
141} 166}
142 167
143static int bcd2int (unsigned char b) 168static int bcd2int (unsigned char b)
diff --git a/arch/m68k/mvme16x/config.c b/arch/m68k/mvme16x/config.c
index 6ee36a5b528d..9bc2da69f80c 100644
--- a/arch/m68k/mvme16x/config.c
+++ b/arch/m68k/mvme16x/config.c
@@ -19,6 +19,7 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20#include <linux/seq_file.h> 20#include <linux/seq_file.h>
21#include <linux/tty.h> 21#include <linux/tty.h>
22#include <linux/clocksource.h>
22#include <linux/console.h> 23#include <linux/console.h>
23#include <linux/linkage.h> 24#include <linux/linkage.h>
24#include <linux/init.h> 25#include <linux/init.h>
@@ -44,17 +45,11 @@ static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
44 45
45static void mvme16x_get_model(char *model); 46static void mvme16x_get_model(char *model);
46extern void mvme16x_sched_init(irq_handler_t handler); 47extern void mvme16x_sched_init(irq_handler_t handler);
47extern u32 mvme16x_gettimeoffset(void);
48extern int mvme16x_hwclk (int, struct rtc_time *); 48extern int mvme16x_hwclk (int, struct rtc_time *);
49extern void mvme16x_reset (void); 49extern void mvme16x_reset (void);
50 50
51int bcd2int (unsigned char b); 51int bcd2int (unsigned char b);
52 52
53/* Save tick handler routine pointer, will point to xtime_update() in
54 * kernel/time/timekeeping.c, called via mvme16x_process_int() */
55
56static irq_handler_t tick_handler;
57
58 53
59unsigned short mvme16x_config; 54unsigned short mvme16x_config;
60EXPORT_SYMBOL(mvme16x_config); 55EXPORT_SYMBOL(mvme16x_config);
@@ -120,11 +115,11 @@ static void __init mvme16x_init_IRQ (void)
120 m68k_setup_user_interrupt(VEC_USER, 192); 115 m68k_setup_user_interrupt(VEC_USER, 192);
121} 116}
122 117
123#define pcc2chip ((volatile u_char *)0xfff42000) 118#define PCC2CHIP (0xfff42000)
124#define PccSCCMICR 0x1d 119#define PCCSCCMICR (PCC2CHIP + 0x1d)
125#define PccSCCTICR 0x1e 120#define PCCSCCTICR (PCC2CHIP + 0x1e)
126#define PccSCCRICR 0x1f 121#define PCCSCCRICR (PCC2CHIP + 0x1f)
127#define PccTPIACKR 0x25 122#define PCCTPIACKR (PCC2CHIP + 0x25)
128 123
129#ifdef CONFIG_EARLY_PRINTK 124#ifdef CONFIG_EARLY_PRINTK
130 125
@@ -232,10 +227,10 @@ void mvme16x_cons_write(struct console *co, const char *str, unsigned count)
232 base_addr[CyIER] = CyTxMpty; 227 base_addr[CyIER] = CyTxMpty;
233 228
234 while (1) { 229 while (1) {
235 if (pcc2chip[PccSCCTICR] & 0x20) 230 if (in_8(PCCSCCTICR) & 0x20)
236 { 231 {
237 /* We have a Tx int. Acknowledge it */ 232 /* We have a Tx int. Acknowledge it */
238 sink = pcc2chip[PccTPIACKR]; 233 sink = in_8(PCCTPIACKR);
239 if ((base_addr[CyLICR] >> 2) == port) { 234 if ((base_addr[CyLICR] >> 2) == port) {
240 if (i == count) { 235 if (i == count) {
241 /* Last char of string is now output */ 236 /* Last char of string is now output */
@@ -277,7 +272,6 @@ void __init config_mvme16x(void)
277 mach_max_dma_address = 0xffffffff; 272 mach_max_dma_address = 0xffffffff;
278 mach_sched_init = mvme16x_sched_init; 273 mach_sched_init = mvme16x_sched_init;
279 mach_init_IRQ = mvme16x_init_IRQ; 274 mach_init_IRQ = mvme16x_init_IRQ;
280 arch_gettimeoffset = mvme16x_gettimeoffset;
281 mach_hwclk = mvme16x_hwclk; 275 mach_hwclk = mvme16x_hwclk;
282 mach_reset = mvme16x_reset; 276 mach_reset = mvme16x_reset;
283 mach_get_model = mvme16x_get_model; 277 mach_get_model = mvme16x_get_model;
@@ -350,10 +344,46 @@ static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
350 return IRQ_HANDLED; 344 return IRQ_HANDLED;
351} 345}
352 346
347static u64 mvme16x_read_clk(struct clocksource *cs);
348
349static struct clocksource mvme16x_clk = {
350 .name = "pcc",
351 .rating = 250,
352 .read = mvme16x_read_clk,
353 .mask = CLOCKSOURCE_MASK(32),
354 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
355};
356
357static u32 clk_total;
358
359#define PCC_TIMER_CLOCK_FREQ 1000000
360#define PCC_TIMER_CYCLES (PCC_TIMER_CLOCK_FREQ / HZ)
361
362#define PCCTCMP1 (PCC2CHIP + 0x04)
363#define PCCTCNT1 (PCC2CHIP + 0x08)
364#define PCCTOVR1 (PCC2CHIP + 0x17)
365#define PCCTIC1 (PCC2CHIP + 0x1b)
366
367#define PCCTOVR1_TIC_EN 0x01
368#define PCCTOVR1_COC_EN 0x02
369#define PCCTOVR1_OVR_CLR 0x04
370
371#define PCCTIC1_INT_CLR 0x08
372#define PCCTIC1_INT_EN 0x10
373
353static irqreturn_t mvme16x_timer_int (int irq, void *dev_id) 374static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
354{ 375{
355 *(volatile unsigned char *)0xfff4201b |= 8; 376 irq_handler_t timer_routine = dev_id;
356 return tick_handler(irq, dev_id); 377 unsigned long flags;
378
379 local_irq_save(flags);
380 out_8(PCCTIC1, in_8(PCCTIC1) | PCCTIC1_INT_CLR);
381 out_8(PCCTOVR1, PCCTOVR1_OVR_CLR);
382 clk_total += PCC_TIMER_CYCLES;
383 timer_routine(0, NULL);
384 local_irq_restore(flags);
385
386 return IRQ_HANDLED;
357} 387}
358 388
359void mvme16x_sched_init (irq_handler_t timer_routine) 389void mvme16x_sched_init (irq_handler_t timer_routine)
@@ -361,16 +391,17 @@ void mvme16x_sched_init (irq_handler_t timer_routine)
361 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno); 391 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
362 int irq; 392 int irq;
363 393
364 tick_handler = timer_routine;
365 /* Using PCCchip2 or MC2 chip tick timer 1 */ 394 /* Using PCCchip2 or MC2 chip tick timer 1 */
366 *(volatile unsigned long *)0xfff42008 = 0; 395 out_be32(PCCTCNT1, 0);
367 *(volatile unsigned long *)0xfff42004 = 10000; /* 10ms */ 396 out_be32(PCCTCMP1, PCC_TIMER_CYCLES);
368 *(volatile unsigned char *)0xfff42017 |= 3; 397 out_8(PCCTOVR1, in_8(PCCTOVR1) | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN);
369 *(volatile unsigned char *)0xfff4201b = 0x16; 398 out_8(PCCTIC1, PCCTIC1_INT_EN | 6);
370 if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, 0, 399 if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, IRQF_TIMER, "timer",
371 "timer", mvme16x_timer_int)) 400 timer_routine))
372 panic ("Couldn't register timer int"); 401 panic ("Couldn't register timer int");
373 402
403 clocksource_register_hz(&mvme16x_clk, PCC_TIMER_CLOCK_FREQ);
404
374 if (brdno == 0x0162 || brdno == 0x172) 405 if (brdno == 0x0162 || brdno == 0x172)
375 irq = MVME162_IRQ_ABORT; 406 irq = MVME162_IRQ_ABORT;
376 else 407 else
@@ -380,11 +411,23 @@ void mvme16x_sched_init (irq_handler_t timer_routine)
380 panic ("Couldn't register abort int"); 411 panic ("Couldn't register abort int");
381} 412}
382 413
383 414static u64 mvme16x_read_clk(struct clocksource *cs)
384/* This is always executed with interrupts disabled. */
385u32 mvme16x_gettimeoffset(void)
386{ 415{
387 return (*(volatile u32 *)0xfff42008) * 1000; 416 unsigned long flags;
417 u8 overflow, tmp;
418 u32 ticks;
419
420 local_irq_save(flags);
421 tmp = in_8(PCCTOVR1) >> 4;
422 ticks = in_be32(PCCTCNT1);
423 overflow = in_8(PCCTOVR1) >> 4;
424 if (overflow != tmp)
425 ticks = in_be32(PCCTCNT1);
426 ticks += overflow * PCC_TIMER_CYCLES;
427 ticks += clk_total;
428 local_irq_restore(flags);
429
430 return ticks;
388} 431}
389 432
390int bcd2int (unsigned char b) 433int bcd2int (unsigned char b)
diff --git a/arch/m68k/q40/config.c b/arch/m68k/q40/config.c
index 96810d91da2b..e63eb5f06999 100644
--- a/arch/m68k/q40/config.c
+++ b/arch/m68k/q40/config.c
@@ -40,7 +40,6 @@ extern void q40_init_IRQ(void);
40static void q40_get_model(char *model); 40static void q40_get_model(char *model);
41extern void q40_sched_init(irq_handler_t handler); 41extern void q40_sched_init(irq_handler_t handler);
42 42
43static u32 q40_gettimeoffset(void);
44static int q40_hwclk(int, struct rtc_time *); 43static int q40_hwclk(int, struct rtc_time *);
45static unsigned int q40_get_ss(void); 44static unsigned int q40_get_ss(void);
46static int q40_get_rtc_pll(struct rtc_pll_info *pll); 45static int q40_get_rtc_pll(struct rtc_pll_info *pll);
@@ -169,7 +168,6 @@ void __init config_q40(void)
169 mach_sched_init = q40_sched_init; 168 mach_sched_init = q40_sched_init;
170 169
171 mach_init_IRQ = q40_init_IRQ; 170 mach_init_IRQ = q40_init_IRQ;
172 arch_gettimeoffset = q40_gettimeoffset;
173 mach_hwclk = q40_hwclk; 171 mach_hwclk = q40_hwclk;
174 mach_get_ss = q40_get_ss; 172 mach_get_ss = q40_get_ss;
175 mach_get_rtc_pll = q40_get_rtc_pll; 173 mach_get_rtc_pll = q40_get_rtc_pll;
@@ -201,13 +199,6 @@ int __init q40_parse_bootinfo(const struct bi_record *rec)
201 return 1; 199 return 1;
202} 200}
203 201
204
205static u32 q40_gettimeoffset(void)
206{
207 return 5000 * (ql_ticks != 0) * 1000;
208}
209
210
211/* 202/*
212 * Looks like op is non-zero for setting the clock, and zero for 203 * Looks like op is non-zero for setting the clock, and zero for
213 * reading the clock. 204 * reading the clock.
diff --git a/arch/m68k/q40/q40ints.c b/arch/m68k/q40/q40ints.c
index 3e7603202977..1c696906c159 100644
--- a/arch/m68k/q40/q40ints.c
+++ b/arch/m68k/q40/q40ints.c
@@ -127,10 +127,10 @@ void q40_mksound(unsigned int hz, unsigned int ticks)
127 sound_ticks = ticks << 1; 127 sound_ticks = ticks << 1;
128} 128}
129 129
130static irq_handler_t q40_timer_routine; 130static irqreturn_t q40_timer_int(int irq, void *dev_id)
131
132static irqreturn_t q40_timer_int (int irq, void * dev)
133{ 131{
132 irq_handler_t timer_routine = dev_id;
133
134 ql_ticks = ql_ticks ? 0 : 1; 134 ql_ticks = ql_ticks ? 0 : 1;
135 if (sound_ticks) { 135 if (sound_ticks) {
136 unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL; 136 unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL;
@@ -139,8 +139,13 @@ static irqreturn_t q40_timer_int (int irq, void * dev)
139 *DAC_RIGHT=sval; 139 *DAC_RIGHT=sval;
140 } 140 }
141 141
142 if (!ql_ticks) 142 if (!ql_ticks) {
143 q40_timer_routine(irq, dev); 143 unsigned long flags;
144
145 local_irq_save(flags);
146 timer_routine(0, NULL);
147 local_irq_restore(flags);
148 }
144 return IRQ_HANDLED; 149 return IRQ_HANDLED;
145} 150}
146 151
@@ -148,11 +153,9 @@ void q40_sched_init (irq_handler_t timer_routine)
148{ 153{
149 int timer_irq; 154 int timer_irq;
150 155
151 q40_timer_routine = timer_routine;
152 timer_irq = Q40_IRQ_FRAME; 156 timer_irq = Q40_IRQ_FRAME;
153 157
154 if (request_irq(timer_irq, q40_timer_int, 0, 158 if (request_irq(timer_irq, q40_timer_int, 0, "timer", timer_routine))
155 "timer", q40_timer_int))
156 panic("Couldn't register timer int"); 159 panic("Couldn't register timer int");
157 160
158 master_outb(-1, FRAME_CLEAR_REG); 161 master_outb(-1, FRAME_CLEAR_REG);
diff --git a/arch/m68k/sun3/config.c b/arch/m68k/sun3/config.c
index 542c4404861c..229ea37dfe1b 100644
--- a/arch/m68k/sun3/config.c
+++ b/arch/m68k/sun3/config.c
@@ -37,7 +37,6 @@
37 37
38char sun3_reserved_pmeg[SUN3_PMEGS_NUM]; 38char sun3_reserved_pmeg[SUN3_PMEGS_NUM];
39 39
40extern u32 sun3_gettimeoffset(void);
41static void sun3_sched_init(irq_handler_t handler); 40static void sun3_sched_init(irq_handler_t handler);
42extern void sun3_get_model (char* model); 41extern void sun3_get_model (char* model);
43extern int sun3_hwclk(int set, struct rtc_time *t); 42extern int sun3_hwclk(int set, struct rtc_time *t);
@@ -138,7 +137,6 @@ void __init config_sun3(void)
138 mach_sched_init = sun3_sched_init; 137 mach_sched_init = sun3_sched_init;
139 mach_init_IRQ = sun3_init_IRQ; 138 mach_init_IRQ = sun3_init_IRQ;
140 mach_reset = sun3_reboot; 139 mach_reset = sun3_reboot;
141 arch_gettimeoffset = sun3_gettimeoffset;
142 mach_get_model = sun3_get_model; 140 mach_get_model = sun3_get_model;
143 mach_hwclk = sun3_hwclk; 141 mach_hwclk = sun3_hwclk;
144 mach_halt = sun3_halt; 142 mach_halt = sun3_halt;
diff --git a/arch/m68k/sun3/intersil.c b/arch/m68k/sun3/intersil.c
index d911070af02a..8fc74864de81 100644
--- a/arch/m68k/sun3/intersil.c
+++ b/arch/m68k/sun3/intersil.c
@@ -22,13 +22,6 @@
22#define STOP_VAL (INTERSIL_STOP | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE) 22#define STOP_VAL (INTERSIL_STOP | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE)
23#define START_VAL (INTERSIL_RUN | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE) 23#define START_VAL (INTERSIL_RUN | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE)
24 24
25/* does this need to be implemented? */
26u32 sun3_gettimeoffset(void)
27{
28 return 1000;
29}
30
31
32/* get/set hwclock */ 25/* get/set hwclock */
33 26
34int sun3_hwclk(int set, struct rtc_time *t) 27int sun3_hwclk(int set, struct rtc_time *t)
diff --git a/arch/m68k/sun3/sun3ints.c b/arch/m68k/sun3/sun3ints.c
index 6bbca30c9188..a5824abb4a39 100644
--- a/arch/m68k/sun3/sun3ints.c
+++ b/arch/m68k/sun3/sun3ints.c
@@ -61,8 +61,10 @@ static irqreturn_t sun3_int7(int irq, void *dev_id)
61 61
62static irqreturn_t sun3_int5(int irq, void *dev_id) 62static irqreturn_t sun3_int5(int irq, void *dev_id)
63{ 63{
64 unsigned long flags;
64 unsigned int cnt; 65 unsigned int cnt;
65 66
67 local_irq_save(flags);
66#ifdef CONFIG_SUN3 68#ifdef CONFIG_SUN3
67 intersil_clear(); 69 intersil_clear();
68#endif 70#endif
@@ -76,6 +78,7 @@ static irqreturn_t sun3_int5(int irq, void *dev_id)
76 cnt = kstat_irqs_cpu(irq, 0); 78 cnt = kstat_irqs_cpu(irq, 0);
77 if (!(cnt % 20)) 79 if (!(cnt % 20))
78 sun3_leds(led_pattern[cnt % 160 / 20]); 80 sun3_leds(led_pattern[cnt % 160 / 20]);
81 local_irq_restore(flags);
79 return IRQ_HANDLED; 82 return IRQ_HANDLED;
80} 83}
81 84
diff --git a/arch/m68k/sun3x/config.c b/arch/m68k/sun3x/config.c
index 33d3a1c6fba0..03ce7f9facfe 100644
--- a/arch/m68k/sun3x/config.c
+++ b/arch/m68k/sun3x/config.c
@@ -49,7 +49,6 @@ void __init config_sun3x(void)
49 mach_sched_init = sun3x_sched_init; 49 mach_sched_init = sun3x_sched_init;
50 mach_init_IRQ = sun3_init_IRQ; 50 mach_init_IRQ = sun3_init_IRQ;
51 51
52 arch_gettimeoffset = sun3x_gettimeoffset;
53 mach_reset = sun3x_reboot; 52 mach_reset = sun3x_reboot;
54 53
55 mach_hwclk = sun3x_hwclk; 54 mach_hwclk = sun3x_hwclk;
diff --git a/arch/m68k/sun3x/time.c b/arch/m68k/sun3x/time.c
index 047e2bcee3d7..9163294b0fb6 100644
--- a/arch/m68k/sun3x/time.c
+++ b/arch/m68k/sun3x/time.c
@@ -73,22 +73,21 @@ int sun3x_hwclk(int set, struct rtc_time *t)
73 73
74 return 0; 74 return 0;
75} 75}
76/* Not much we can do here */
77u32 sun3x_gettimeoffset(void)
78{
79 return 0L;
80}
81 76
82#if 0 77#if 0
83static void sun3x_timer_tick(int irq, void *dev_id, struct pt_regs *regs) 78static irqreturn_t sun3x_timer_tick(int irq, void *dev_id)
84{ 79{
85 void (*vector)(int, void *, struct pt_regs *) = dev_id; 80 irq_handler_t timer_routine = dev_id;
81 unsigned long flags;
86 82
87 /* Clear the pending interrupt - pulse the enable line low */ 83 local_irq_save(flags);
88 disable_irq(5); 84 /* Clear the pending interrupt - pulse the enable line low */
89 enable_irq(5); 85 disable_irq(5);
86 enable_irq(5);
87 timer_routine(0, NULL);
88 local_irq_restore(flags);
90 89
91 vector(irq, NULL, regs); 90 return IRQ_HANDLED;
92} 91}
93#endif 92#endif
94 93
diff --git a/arch/m68k/sun3x/time.h b/arch/m68k/sun3x/time.h
index 496f406412ad..86ce78bb3c28 100644
--- a/arch/m68k/sun3x/time.h
+++ b/arch/m68k/sun3x/time.h
@@ -3,7 +3,6 @@
3#define SUN3X_TIME_H 3#define SUN3X_TIME_H
4 4
5extern int sun3x_hwclk(int set, struct rtc_time *t); 5extern int sun3x_hwclk(int set, struct rtc_time *t);
6u32 sun3x_gettimeoffset(void);
7void sun3x_sched_init(irq_handler_t vector); 6void sun3x_sched_init(irq_handler_t vector);
8 7
9struct mostek_dt { 8struct mostek_dt {
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-02 13:52:03 -0500