diff options
| -rw-r--r-- | drivers/clk/meson/gxbb-aoclk.h | 2 | ||||
| -rw-r--r-- | drivers/clk/meson/meson8b.c | 5 |
2 files changed, 3 insertions, 4 deletions
diff --git a/drivers/clk/meson/gxbb-aoclk.h b/drivers/clk/meson/gxbb-aoclk.h index 0be78383f257..badc4c22b4ee 100644 --- a/drivers/clk/meson/gxbb-aoclk.h +++ b/drivers/clk/meson/gxbb-aoclk.h | |||
| @@ -17,8 +17,6 @@ | |||
| 17 | #define AO_RTC_ALT_CLK_CNTL0 0x94 | 17 | #define AO_RTC_ALT_CLK_CNTL0 0x94 |
| 18 | #define AO_RTC_ALT_CLK_CNTL1 0x98 | 18 | #define AO_RTC_ALT_CLK_CNTL1 0x98 |
| 19 | 19 | ||
| 20 | extern const struct clk_ops meson_aoclk_gate_regmap_ops; | ||
| 21 | |||
| 22 | struct aoclk_cec_32k { | 20 | struct aoclk_cec_32k { |
| 23 | struct clk_hw hw; | 21 | struct clk_hw hw; |
| 24 | struct regmap *regmap; | 22 | struct regmap *regmap; |
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c index cc2992493e0b..d0524ec71aad 100644 --- a/drivers/clk/meson/meson8b.c +++ b/drivers/clk/meson/meson8b.c | |||
| @@ -253,7 +253,7 @@ static struct clk_fixed_factor meson8b_fclk_div3_div = { | |||
| 253 | .mult = 1, | 253 | .mult = 1, |
| 254 | .div = 3, | 254 | .div = 3, |
| 255 | .hw.init = &(struct clk_init_data){ | 255 | .hw.init = &(struct clk_init_data){ |
| 256 | .name = "fclk_div_div3", | 256 | .name = "fclk_div3_div", |
| 257 | .ops = &clk_fixed_factor_ops, | 257 | .ops = &clk_fixed_factor_ops, |
| 258 | .parent_names = (const char *[]){ "fixed_pll" }, | 258 | .parent_names = (const char *[]){ "fixed_pll" }, |
| 259 | .num_parents = 1, | 259 | .num_parents = 1, |
| @@ -632,7 +632,8 @@ static struct clk_regmap meson8b_cpu_clk = { | |||
| 632 | .hw.init = &(struct clk_init_data){ | 632 | .hw.init = &(struct clk_init_data){ |
| 633 | .name = "cpu_clk", | 633 | .name = "cpu_clk", |
| 634 | .ops = &clk_regmap_mux_ro_ops, | 634 | .ops = &clk_regmap_mux_ro_ops, |
| 635 | .parent_names = (const char *[]){ "xtal", "cpu_out_sel" }, | 635 | .parent_names = (const char *[]){ "xtal", |
| 636 | "cpu_scale_out_sel" }, | ||
| 636 | .num_parents = 2, | 637 | .num_parents = 2, |
| 637 | .flags = (CLK_SET_RATE_PARENT | | 638 | .flags = (CLK_SET_RATE_PARENT | |
| 638 | CLK_SET_RATE_NO_REPARENT), | 639 | CLK_SET_RATE_NO_REPARENT), |
