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-rw-r--r--drivers/clk/samsung/clk-exynos4.c33
1 files changed, 4 insertions, 29 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index e40b77583c47..9a51ce9a658f 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -1401,24 +1401,6 @@ static const struct exynos_cpuclk_cfg_data e4210_armclk_d[] __initconst = {
1401 { 0 }, 1401 { 0 },
1402}; 1402};
1403 1403
1404static const struct exynos_cpuclk_cfg_data e4212_armclk_d[] __initconst = {
1405 { 1500000, E4210_CPU_DIV0(2, 1, 6, 0, 7, 3), E4210_CPU_DIV1(2, 6), },
1406 { 1400000, E4210_CPU_DIV0(2, 1, 6, 0, 7, 3), E4210_CPU_DIV1(2, 6), },
1407 { 1300000, E4210_CPU_DIV0(2, 1, 5, 0, 7, 3), E4210_CPU_DIV1(2, 5), },
1408 { 1200000, E4210_CPU_DIV0(2, 1, 5, 0, 7, 3), E4210_CPU_DIV1(2, 5), },
1409 { 1100000, E4210_CPU_DIV0(2, 1, 4, 0, 6, 3), E4210_CPU_DIV1(2, 4), },
1410 { 1000000, E4210_CPU_DIV0(1, 1, 4, 0, 5, 2), E4210_CPU_DIV1(2, 4), },
1411 { 900000, E4210_CPU_DIV0(1, 1, 3, 0, 5, 2), E4210_CPU_DIV1(2, 3), },
1412 { 800000, E4210_CPU_DIV0(1, 1, 3, 0, 5, 2), E4210_CPU_DIV1(2, 3), },
1413 { 700000, E4210_CPU_DIV0(1, 1, 3, 0, 4, 2), E4210_CPU_DIV1(2, 3), },
1414 { 600000, E4210_CPU_DIV0(1, 1, 3, 0, 4, 2), E4210_CPU_DIV1(2, 3), },
1415 { 500000, E4210_CPU_DIV0(1, 1, 3, 0, 4, 2), E4210_CPU_DIV1(2, 3), },
1416 { 400000, E4210_CPU_DIV0(1, 1, 3, 0, 4, 2), E4210_CPU_DIV1(2, 3), },
1417 { 300000, E4210_CPU_DIV0(1, 1, 2, 0, 4, 2), E4210_CPU_DIV1(2, 3), },
1418 { 200000, E4210_CPU_DIV0(1, 1, 1, 0, 3, 1), E4210_CPU_DIV1(2, 3), },
1419 { 0 },
1420};
1421
1422#define E4412_CPU_DIV1(cores, hpm, copy) \ 1404#define E4412_CPU_DIV1(cores, hpm, copy) \
1423 (((cores) << 8) | ((hpm) << 4) | ((copy) << 0)) 1405 (((cores) << 8) | ((hpm) << 4) | ((copy) << 0))
1424 1406
@@ -1533,17 +1515,10 @@ static void __init exynos4_clk_init(struct device_node *np,
1533 samsung_clk_register_fixed_factor(ctx, 1515 samsung_clk_register_fixed_factor(ctx,
1534 exynos4x12_fixed_factor_clks, 1516 exynos4x12_fixed_factor_clks,
1535 ARRAY_SIZE(exynos4x12_fixed_factor_clks)); 1517 ARRAY_SIZE(exynos4x12_fixed_factor_clks));
1536 if (of_machine_is_compatible("samsung,exynos4412")) { 1518 exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
1537 exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk", 1519 mout_core_p4x12[0], mout_core_p4x12[1], 0x14200,
1538 mout_core_p4x12[0], mout_core_p4x12[1], 0x14200, 1520 e4412_armclk_d, ARRAY_SIZE(e4412_armclk_d),
1539 e4412_armclk_d, ARRAY_SIZE(e4412_armclk_d), 1521 CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1);
1540 CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1);
1541 } else {
1542 exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
1543 mout_core_p4x12[0], mout_core_p4x12[1], 0x14200,
1544 e4212_armclk_d, ARRAY_SIZE(e4212_armclk_d),
1545 CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1);
1546 }
1547 } 1522 }
1548 1523
1549 samsung_clk_register_alias(ctx, exynos4_aliases, 1524 samsung_clk_register_alias(ctx, exynos4_aliases,