diff options
| -rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 40 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 5 |
2 files changed, 20 insertions, 25 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 54338cf72feb..c04fbbf0acf7 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
| @@ -1749,6 +1749,7 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg) | |||
| 1749 | u32 master_ctl; | 1749 | u32 master_ctl; |
| 1750 | irqreturn_t ret = IRQ_NONE; | 1750 | irqreturn_t ret = IRQ_NONE; |
| 1751 | uint32_t tmp = 0; | 1751 | uint32_t tmp = 0; |
| 1752 | enum pipe pipe; | ||
| 1752 | 1753 | ||
| 1753 | atomic_inc(&dev_priv->irq_received); | 1754 | atomic_inc(&dev_priv->irq_received); |
| 1754 | 1755 | ||
| @@ -1777,31 +1778,28 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg) | |||
| 1777 | } | 1778 | } |
| 1778 | } | 1779 | } |
| 1779 | 1780 | ||
| 1780 | if (master_ctl & GEN8_DE_IRQS) { | 1781 | for_each_pipe(pipe) { |
| 1781 | int de_ret = 0; | 1782 | uint32_t pipe_iir; |
| 1782 | int pipe; | ||
| 1783 | for_each_pipe(pipe) { | ||
| 1784 | uint32_t pipe_iir; | ||
| 1785 | |||
| 1786 | pipe_iir = I915_READ(GEN8_DE_PIPE_IIR(pipe)); | ||
| 1787 | if (pipe_iir & GEN8_PIPE_VBLANK) | ||
| 1788 | drm_handle_vblank(dev, pipe); | ||
| 1789 | 1783 | ||
| 1790 | if (pipe_iir & GEN8_PIPE_FLIP_DONE) { | 1784 | if (!(master_ctl & GEN8_DE_PIPE_IRQ(pipe))) |
| 1791 | intel_prepare_page_flip(dev, pipe); | 1785 | continue; |
| 1792 | intel_finish_page_flip_plane(dev, pipe); | ||
| 1793 | } | ||
| 1794 | 1786 | ||
| 1795 | if (pipe_iir & GEN8_DE_PIPE_IRQ_ERRORS) | 1787 | pipe_iir = I915_READ(GEN8_DE_PIPE_IIR(pipe)); |
| 1796 | DRM_ERROR("Errors on pipe %c\n", 'A' + pipe); | 1788 | if (pipe_iir & GEN8_PIPE_VBLANK) |
| 1789 | drm_handle_vblank(dev, pipe); | ||
| 1797 | 1790 | ||
| 1798 | if (pipe_iir) { | 1791 | if (pipe_iir & GEN8_PIPE_FLIP_DONE) { |
| 1799 | de_ret++; | 1792 | intel_prepare_page_flip(dev, pipe); |
| 1800 | ret = IRQ_HANDLED; | 1793 | intel_finish_page_flip_plane(dev, pipe); |
| 1801 | I915_WRITE(GEN8_DE_PIPE_IIR(pipe), pipe_iir); | ||
| 1802 | } | ||
| 1803 | } | 1794 | } |
| 1804 | if (!de_ret) | 1795 | |
| 1796 | if (pipe_iir & GEN8_DE_PIPE_IRQ_ERRORS) | ||
| 1797 | DRM_ERROR("Errors on pipe %c\n", 'A' + pipe); | ||
| 1798 | |||
| 1799 | if (pipe_iir) { | ||
| 1800 | ret = IRQ_HANDLED; | ||
| 1801 | I915_WRITE(GEN8_DE_PIPE_IIR(pipe), pipe_iir); | ||
| 1802 | } else | ||
| 1805 | DRM_ERROR("The master control interrupt lied (DE PIPE)!\n"); | 1803 | DRM_ERROR("The master control interrupt lied (DE PIPE)!\n"); |
| 1806 | } | 1804 | } |
| 1807 | 1805 | ||
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 2b9e66c0c6cf..f150edaa64ca 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
| @@ -4031,15 +4031,12 @@ | |||
| 4031 | #define GEN8_DE_PIPE_C_IRQ (1<<18) | 4031 | #define GEN8_DE_PIPE_C_IRQ (1<<18) |
| 4032 | #define GEN8_DE_PIPE_B_IRQ (1<<17) | 4032 | #define GEN8_DE_PIPE_B_IRQ (1<<17) |
| 4033 | #define GEN8_DE_PIPE_A_IRQ (1<<16) | 4033 | #define GEN8_DE_PIPE_A_IRQ (1<<16) |
| 4034 | #define GEN8_DE_PIPE_IRQ(pipe) (1<<(16+pipe)) | ||
| 4034 | #define GEN8_GT_VECS_IRQ (1<<6) | 4035 | #define GEN8_GT_VECS_IRQ (1<<6) |
| 4035 | #define GEN8_GT_VCS2_IRQ (1<<3) | 4036 | #define GEN8_GT_VCS2_IRQ (1<<3) |
| 4036 | #define GEN8_GT_VCS1_IRQ (1<<2) | 4037 | #define GEN8_GT_VCS1_IRQ (1<<2) |
| 4037 | #define GEN8_GT_BCS_IRQ (1<<1) | 4038 | #define GEN8_GT_BCS_IRQ (1<<1) |
| 4038 | #define GEN8_GT_RCS_IRQ (1<<0) | 4039 | #define GEN8_GT_RCS_IRQ (1<<0) |
| 4039 | /* Lazy definition */ | ||
| 4040 | #define GEN8_GT_IRQS 0x000000ff | ||
| 4041 | #define GEN8_DE_IRQS 0x01ff0000 | ||
| 4042 | #define GEN8_RSVD_IRQS 0xB700ff00 | ||
| 4043 | 4040 | ||
| 4044 | #define GEN8_GT_ISR(which) (0x44300 + (0x10 * (which))) | 4041 | #define GEN8_GT_ISR(which) (0x44300 + (0x10 * (which))) |
| 4045 | #define GEN8_GT_IMR(which) (0x44304 + (0x10 * (which))) | 4042 | #define GEN8_GT_IMR(which) (0x44304 + (0x10 * (which))) |
