diff options
| -rw-r--r-- | Documentation/devicetree/bindings/arm/arch_timer.txt | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt index 52478c83d0cc..20746e5abe6f 100644 --- a/Documentation/devicetree/bindings/arm/arch_timer.txt +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt | |||
| @@ -1,13 +1,14 @@ | |||
| 1 | * ARM architected timer | 1 | * ARM architected timer |
| 2 | 2 | ||
| 3 | ARM Cortex-A7 and Cortex-A15 have a per-core architected timer, which | 3 | ARM cores may have a per-core architected timer, which provides per-cpu timers. |
| 4 | provides per-cpu timers. | ||
| 5 | 4 | ||
| 6 | The timer is attached to a GIC to deliver its per-processor interrupts. | 5 | The timer is attached to a GIC to deliver its per-processor interrupts. |
| 7 | 6 | ||
| 8 | ** Timer node properties: | 7 | ** Timer node properties: |
| 9 | 8 | ||
| 10 | - compatible : Should at least contain "arm,armv7-timer". | 9 | - compatible : Should at least contain one of |
| 10 | "arm,armv7-timer" | ||
| 11 | "arm,armv8-timer" | ||
| 11 | 12 | ||
| 12 | - interrupts : Interrupt list for secure, non-secure, virtual and | 13 | - interrupts : Interrupt list for secure, non-secure, virtual and |
| 13 | hypervisor timers, in that order. | 14 | hypervisor timers, in that order. |