2 files changed, 10 insertions, 8 deletions

diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c
index 9621ed5d3f98..fdc34ad4ca62 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -1204,12 +1204,13 @@ static int armada_drm_primary_update(struct drm_plane *plane,
                 .crtc = crtc,
                 .enable = crtc->enabled,
         };
-        const struct drm_rect clip = {
-                .x2 = crtc->mode.hdisplay,
-                .y2 = crtc->mode.vdisplay,
-        };
+        struct drm_rect clip = {};
         int ret;
 
+        if (crtc->enabled)
+                drm_mode_get_hv_timing(&crtc->mode,
+                                       &clip.x2, &clip.y2);
+
         ret = drm_atomic_helper_check_plane_state(&state, &crtc_state, &clip, 0,
                                                   INT_MAX, true, false);
         if (ret)
diff --git a/drivers/gpu/drm/armada/armada_overlay.c b/drivers/gpu/drm/armada/armada_overlay.c
index 825cb642b55e..4f2a7a6e0fd3 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -209,16 +209,17 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
                 .crtc = crtc,
                 .enable = crtc->enabled,
         };
-        const struct drm_rect clip = {
-                .x2 = crtc->mode.hdisplay,
-                .y2 = crtc->mode.vdisplay,
-        };
+        struct drm_rect clip = {};
         int ret;
 
         trace_armada_ovl_plane_update(plane, crtc, fb,
                                  crtc_x, crtc_y, crtc_w, crtc_h,
                                  src_x, src_y, src_w, src_h);
 
+        if (crtc->enabled)
+                drm_mode_get_hv_timing(&crtc->mode,
+                                       &clip.x2, &clip.y2);
+
         ret = drm_atomic_helper_check_plane_state(&state, &crtc_state, &clip, 0,
                                                   INT_MAX, true, false);
         if (ret)