diff options
-rw-r--r-- | drivers/misc/cxl/cxl.h | 40 | ||||
-rw-r--r-- | drivers/misc/cxl/debugfs.c | 16 | ||||
-rw-r--r-- | drivers/misc/cxl/guest.c | 2 | ||||
-rw-r--r-- | drivers/misc/cxl/irq.c | 2 | ||||
-rw-r--r-- | drivers/misc/cxl/native.c | 54 | ||||
-rw-r--r-- | drivers/misc/cxl/pci.c | 55 |
6 files changed, 110 insertions, 59 deletions
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h index 4bcbf7a9bba6..626073d1786c 100644 --- a/drivers/misc/cxl/cxl.h +++ b/drivers/misc/cxl/cxl.h | |||
@@ -553,13 +553,23 @@ struct cxl_context { | |||
553 | struct mm_struct *mm; | 553 | struct mm_struct *mm; |
554 | }; | 554 | }; |
555 | 555 | ||
556 | struct cxl_irq_info; | ||
557 | |||
556 | struct cxl_service_layer_ops { | 558 | struct cxl_service_layer_ops { |
557 | int (*adapter_regs_init)(struct cxl *adapter, struct pci_dev *dev); | 559 | int (*adapter_regs_init)(struct cxl *adapter, struct pci_dev *dev); |
560 | int (*invalidate_all)(struct cxl *adapter); | ||
558 | int (*afu_regs_init)(struct cxl_afu *afu); | 561 | int (*afu_regs_init)(struct cxl_afu *afu); |
562 | int (*sanitise_afu_regs)(struct cxl_afu *afu); | ||
559 | int (*register_serr_irq)(struct cxl_afu *afu); | 563 | int (*register_serr_irq)(struct cxl_afu *afu); |
560 | void (*release_serr_irq)(struct cxl_afu *afu); | 564 | void (*release_serr_irq)(struct cxl_afu *afu); |
561 | void (*debugfs_add_adapter_sl_regs)(struct cxl *adapter, struct dentry *dir); | 565 | irqreturn_t (*handle_interrupt)(int irq, struct cxl_context *ctx, struct cxl_irq_info *irq_info); |
562 | void (*debugfs_add_afu_sl_regs)(struct cxl_afu *afu, struct dentry *dir); | 566 | irqreturn_t (*fail_irq)(struct cxl_afu *afu, struct cxl_irq_info *irq_info); |
567 | int (*activate_dedicated_process)(struct cxl_afu *afu); | ||
568 | int (*attach_afu_directed)(struct cxl_context *ctx, u64 wed, u64 amr); | ||
569 | int (*attach_dedicated_process)(struct cxl_context *ctx, u64 wed, u64 amr); | ||
570 | void (*update_dedicated_ivtes)(struct cxl_context *ctx); | ||
571 | void (*debugfs_add_adapter_regs)(struct cxl *adapter, struct dentry *dir); | ||
572 | void (*debugfs_add_afu_regs)(struct cxl_afu *afu, struct dentry *dir); | ||
563 | void (*psl_irq_dump_registers)(struct cxl_context *ctx); | 573 | void (*psl_irq_dump_registers)(struct cxl_context *ctx); |
564 | void (*err_irq_dump_registers)(struct cxl *adapter); | 574 | void (*err_irq_dump_registers)(struct cxl *adapter); |
565 | void (*debugfs_stop_trace)(struct cxl *adapter); | 575 | void (*debugfs_stop_trace)(struct cxl *adapter); |
@@ -803,6 +813,11 @@ int afu_register_irqs(struct cxl_context *ctx, u32 count); | |||
803 | void afu_release_irqs(struct cxl_context *ctx, void *cookie); | 813 | void afu_release_irqs(struct cxl_context *ctx, void *cookie); |
804 | void afu_irq_name_free(struct cxl_context *ctx); | 814 | void afu_irq_name_free(struct cxl_context *ctx); |
805 | 815 | ||
816 | int cxl_attach_afu_directed_psl(struct cxl_context *ctx, u64 wed, u64 amr); | ||
817 | int cxl_activate_dedicated_process_psl(struct cxl_afu *afu); | ||
818 | int cxl_attach_dedicated_process_psl(struct cxl_context *ctx, u64 wed, u64 amr); | ||
819 | void cxl_update_dedicated_ivtes_psl(struct cxl_context *ctx); | ||
820 | |||
806 | #ifdef CONFIG_DEBUG_FS | 821 | #ifdef CONFIG_DEBUG_FS |
807 | 822 | ||
808 | int cxl_debugfs_init(void); | 823 | int cxl_debugfs_init(void); |
@@ -811,10 +826,10 @@ int cxl_debugfs_adapter_add(struct cxl *adapter); | |||
811 | void cxl_debugfs_adapter_remove(struct cxl *adapter); | 826 | void cxl_debugfs_adapter_remove(struct cxl *adapter); |
812 | int cxl_debugfs_afu_add(struct cxl_afu *afu); | 827 | int cxl_debugfs_afu_add(struct cxl_afu *afu); |
813 | void cxl_debugfs_afu_remove(struct cxl_afu *afu); | 828 | void cxl_debugfs_afu_remove(struct cxl_afu *afu); |
814 | void cxl_stop_trace(struct cxl *cxl); | 829 | void cxl_stop_trace_psl(struct cxl *cxl); |
815 | void cxl_debugfs_add_adapter_psl_regs(struct cxl *adapter, struct dentry *dir); | 830 | void cxl_debugfs_add_adapter_regs_psl(struct cxl *adapter, struct dentry *dir); |
816 | void cxl_debugfs_add_adapter_xsl_regs(struct cxl *adapter, struct dentry *dir); | 831 | void cxl_debugfs_add_adapter_regs_xsl(struct cxl *adapter, struct dentry *dir); |
817 | void cxl_debugfs_add_afu_psl_regs(struct cxl_afu *afu, struct dentry *dir); | 832 | void cxl_debugfs_add_afu_regs_psl(struct cxl_afu *afu, struct dentry *dir); |
818 | 833 | ||
819 | #else /* CONFIG_DEBUG_FS */ | 834 | #else /* CONFIG_DEBUG_FS */ |
820 | 835 | ||
@@ -849,17 +864,17 @@ static inline void cxl_stop_trace(struct cxl *cxl) | |||
849 | { | 864 | { |
850 | } | 865 | } |
851 | 866 | ||
852 | static inline void cxl_debugfs_add_adapter_psl_regs(struct cxl *adapter, | 867 | static inline void cxl_debugfs_add_adapter_regs_psl(struct cxl *adapter, |
853 | struct dentry *dir) | 868 | struct dentry *dir) |
854 | { | 869 | { |
855 | } | 870 | } |
856 | 871 | ||
857 | static inline void cxl_debugfs_add_adapter_xsl_regs(struct cxl *adapter, | 872 | static inline void cxl_debugfs_add_adapter_regs_xsl(struct cxl *adapter, |
858 | struct dentry *dir) | 873 | struct dentry *dir) |
859 | { | 874 | { |
860 | } | 875 | } |
861 | 876 | ||
862 | static inline void cxl_debugfs_add_afu_psl_regs(struct cxl_afu *afu, struct dentry *dir) | 877 | static inline void cxl_debugfs_add_afu_regs_psl(struct cxl_afu *afu, struct dentry *dir) |
863 | { | 878 | { |
864 | } | 879 | } |
865 | 880 | ||
@@ -904,19 +919,20 @@ struct cxl_irq_info { | |||
904 | }; | 919 | }; |
905 | 920 | ||
906 | void cxl_assign_psn_space(struct cxl_context *ctx); | 921 | void cxl_assign_psn_space(struct cxl_context *ctx); |
907 | irqreturn_t cxl_irq(int irq, struct cxl_context *ctx, struct cxl_irq_info *irq_info); | 922 | int cxl_invalidate_all_psl(struct cxl *adapter); |
923 | irqreturn_t cxl_irq_psl(int irq, struct cxl_context *ctx, struct cxl_irq_info *irq_info); | ||
924 | irqreturn_t cxl_fail_irq_psl(struct cxl_afu *afu, struct cxl_irq_info *irq_info); | ||
908 | int cxl_register_one_irq(struct cxl *adapter, irq_handler_t handler, | 925 | int cxl_register_one_irq(struct cxl *adapter, irq_handler_t handler, |
909 | void *cookie, irq_hw_number_t *dest_hwirq, | 926 | void *cookie, irq_hw_number_t *dest_hwirq, |
910 | unsigned int *dest_virq, const char *name); | 927 | unsigned int *dest_virq, const char *name); |
911 | 928 | ||
912 | int cxl_check_error(struct cxl_afu *afu); | 929 | int cxl_check_error(struct cxl_afu *afu); |
913 | int cxl_afu_slbia(struct cxl_afu *afu); | 930 | int cxl_afu_slbia(struct cxl_afu *afu); |
914 | int cxl_tlb_slb_invalidate(struct cxl *adapter); | ||
915 | int cxl_data_cache_flush(struct cxl *adapter); | 931 | int cxl_data_cache_flush(struct cxl *adapter); |
916 | int cxl_afu_disable(struct cxl_afu *afu); | 932 | int cxl_afu_disable(struct cxl_afu *afu); |
917 | int cxl_psl_purge(struct cxl_afu *afu); | 933 | int cxl_psl_purge(struct cxl_afu *afu); |
918 | 934 | ||
919 | void cxl_native_psl_irq_dump_regs(struct cxl_context *ctx); | 935 | void cxl_native_irq_dump_regs_psl(struct cxl_context *ctx); |
920 | void cxl_native_err_irq_dump_regs(struct cxl *adapter); | 936 | void cxl_native_err_irq_dump_regs(struct cxl *adapter); |
921 | int cxl_pci_vphb_add(struct cxl_afu *afu); | 937 | int cxl_pci_vphb_add(struct cxl_afu *afu); |
922 | void cxl_pci_vphb_remove(struct cxl_afu *afu); | 938 | void cxl_pci_vphb_remove(struct cxl_afu *afu); |
diff --git a/drivers/misc/cxl/debugfs.c b/drivers/misc/cxl/debugfs.c index 9c06ac8fa5ac..4848ebf84664 100644 --- a/drivers/misc/cxl/debugfs.c +++ b/drivers/misc/cxl/debugfs.c | |||
@@ -15,7 +15,7 @@ | |||
15 | 15 | ||
16 | static struct dentry *cxl_debugfs; | 16 | static struct dentry *cxl_debugfs; |
17 | 17 | ||
18 | void cxl_stop_trace(struct cxl *adapter) | 18 | void cxl_stop_trace_psl(struct cxl *adapter) |
19 | { | 19 | { |
20 | int slice; | 20 | int slice; |
21 | 21 | ||
@@ -53,7 +53,7 @@ static struct dentry *debugfs_create_io_x64(const char *name, umode_t mode, | |||
53 | (void __force *)value, &fops_io_x64); | 53 | (void __force *)value, &fops_io_x64); |
54 | } | 54 | } |
55 | 55 | ||
56 | void cxl_debugfs_add_adapter_psl_regs(struct cxl *adapter, struct dentry *dir) | 56 | void cxl_debugfs_add_adapter_regs_psl(struct cxl *adapter, struct dentry *dir) |
57 | { | 57 | { |
58 | debugfs_create_io_x64("fir1", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_FIR1)); | 58 | debugfs_create_io_x64("fir1", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_FIR1)); |
59 | debugfs_create_io_x64("fir2", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_FIR2)); | 59 | debugfs_create_io_x64("fir2", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_FIR2)); |
@@ -61,7 +61,7 @@ void cxl_debugfs_add_adapter_psl_regs(struct cxl *adapter, struct dentry *dir) | |||
61 | debugfs_create_io_x64("trace", S_IRUSR | S_IWUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_TRACE)); | 61 | debugfs_create_io_x64("trace", S_IRUSR | S_IWUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_TRACE)); |
62 | } | 62 | } |
63 | 63 | ||
64 | void cxl_debugfs_add_adapter_xsl_regs(struct cxl *adapter, struct dentry *dir) | 64 | void cxl_debugfs_add_adapter_regs_xsl(struct cxl *adapter, struct dentry *dir) |
65 | { | 65 | { |
66 | debugfs_create_io_x64("fec", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_XSL_FEC)); | 66 | debugfs_create_io_x64("fec", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_XSL_FEC)); |
67 | } | 67 | } |
@@ -82,8 +82,8 @@ int cxl_debugfs_adapter_add(struct cxl *adapter) | |||
82 | 82 | ||
83 | debugfs_create_io_x64("err_ivte", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_ErrIVTE)); | 83 | debugfs_create_io_x64("err_ivte", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_ErrIVTE)); |
84 | 84 | ||
85 | if (adapter->native->sl_ops->debugfs_add_adapter_sl_regs) | 85 | if (adapter->native->sl_ops->debugfs_add_adapter_regs) |
86 | adapter->native->sl_ops->debugfs_add_adapter_sl_regs(adapter, dir); | 86 | adapter->native->sl_ops->debugfs_add_adapter_regs(adapter, dir); |
87 | return 0; | 87 | return 0; |
88 | } | 88 | } |
89 | 89 | ||
@@ -92,7 +92,7 @@ void cxl_debugfs_adapter_remove(struct cxl *adapter) | |||
92 | debugfs_remove_recursive(adapter->debugfs); | 92 | debugfs_remove_recursive(adapter->debugfs); |
93 | } | 93 | } |
94 | 94 | ||
95 | void cxl_debugfs_add_afu_psl_regs(struct cxl_afu *afu, struct dentry *dir) | 95 | void cxl_debugfs_add_afu_regs_psl(struct cxl_afu *afu, struct dentry *dir) |
96 | { | 96 | { |
97 | debugfs_create_io_x64("fir", S_IRUSR, dir, _cxl_p1n_addr(afu, CXL_PSL_FIR_SLICE_An)); | 97 | debugfs_create_io_x64("fir", S_IRUSR, dir, _cxl_p1n_addr(afu, CXL_PSL_FIR_SLICE_An)); |
98 | debugfs_create_io_x64("serr", S_IRUSR, dir, _cxl_p1n_addr(afu, CXL_PSL_SERR_An)); | 98 | debugfs_create_io_x64("serr", S_IRUSR, dir, _cxl_p1n_addr(afu, CXL_PSL_SERR_An)); |
@@ -121,8 +121,8 @@ int cxl_debugfs_afu_add(struct cxl_afu *afu) | |||
121 | debugfs_create_io_x64("sstp1", S_IRUSR, dir, _cxl_p2n_addr(afu, CXL_SSTP1_An)); | 121 | debugfs_create_io_x64("sstp1", S_IRUSR, dir, _cxl_p2n_addr(afu, CXL_SSTP1_An)); |
122 | debugfs_create_io_x64("err_status", S_IRUSR, dir, _cxl_p2n_addr(afu, CXL_PSL_ErrStat_An)); | 122 | debugfs_create_io_x64("err_status", S_IRUSR, dir, _cxl_p2n_addr(afu, CXL_PSL_ErrStat_An)); |
123 | 123 | ||
124 | if (afu->adapter->native->sl_ops->debugfs_add_afu_sl_regs) | 124 | if (afu->adapter->native->sl_ops->debugfs_add_afu_regs) |
125 | afu->adapter->native->sl_ops->debugfs_add_afu_sl_regs(afu, dir); | 125 | afu->adapter->native->sl_ops->debugfs_add_afu_regs(afu, dir); |
126 | 126 | ||
127 | return 0; | 127 | return 0; |
128 | } | 128 | } |
diff --git a/drivers/misc/cxl/guest.c b/drivers/misc/cxl/guest.c index e04bc4ddfd74..f6ba69889e40 100644 --- a/drivers/misc/cxl/guest.c +++ b/drivers/misc/cxl/guest.c | |||
@@ -169,7 +169,7 @@ static irqreturn_t guest_psl_irq(int irq, void *data) | |||
169 | return IRQ_HANDLED; | 169 | return IRQ_HANDLED; |
170 | } | 170 | } |
171 | 171 | ||
172 | rc = cxl_irq(irq, ctx, &irq_info); | 172 | rc = cxl_irq_psl(irq, ctx, &irq_info); |
173 | return rc; | 173 | return rc; |
174 | } | 174 | } |
175 | 175 | ||
diff --git a/drivers/misc/cxl/irq.c b/drivers/misc/cxl/irq.c index 1a402bbed687..2fa119edb27d 100644 --- a/drivers/misc/cxl/irq.c +++ b/drivers/misc/cxl/irq.c | |||
@@ -34,7 +34,7 @@ static irqreturn_t schedule_cxl_fault(struct cxl_context *ctx, u64 dsisr, u64 da | |||
34 | return IRQ_HANDLED; | 34 | return IRQ_HANDLED; |
35 | } | 35 | } |
36 | 36 | ||
37 | irqreturn_t cxl_irq(int irq, struct cxl_context *ctx, struct cxl_irq_info *irq_info) | 37 | irqreturn_t cxl_irq_psl(int irq, struct cxl_context *ctx, struct cxl_irq_info *irq_info) |
38 | { | 38 | { |
39 | u64 dsisr, dar; | 39 | u64 dsisr, dar; |
40 | 40 | ||
diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c index 7257e8b8b52d..c147863e149d 100644 --- a/drivers/misc/cxl/native.c +++ b/drivers/misc/cxl/native.c | |||
@@ -258,7 +258,7 @@ void cxl_release_spa(struct cxl_afu *afu) | |||
258 | } | 258 | } |
259 | } | 259 | } |
260 | 260 | ||
261 | int cxl_tlb_slb_invalidate(struct cxl *adapter) | 261 | int cxl_invalidate_all_psl(struct cxl *adapter) |
262 | { | 262 | { |
263 | unsigned long timeout = jiffies + (HZ * CXL_TIMEOUT); | 263 | unsigned long timeout = jiffies + (HZ * CXL_TIMEOUT); |
264 | 264 | ||
@@ -578,7 +578,7 @@ static void update_ivtes_directed(struct cxl_context *ctx) | |||
578 | WARN_ON(add_process_element(ctx)); | 578 | WARN_ON(add_process_element(ctx)); |
579 | } | 579 | } |
580 | 580 | ||
581 | static int attach_afu_directed(struct cxl_context *ctx, u64 wed, u64 amr) | 581 | int cxl_attach_afu_directed_psl(struct cxl_context *ctx, u64 wed, u64 amr) |
582 | { | 582 | { |
583 | u32 pid; | 583 | u32 pid; |
584 | int result; | 584 | int result; |
@@ -671,7 +671,7 @@ static int deactivate_afu_directed(struct cxl_afu *afu) | |||
671 | return 0; | 671 | return 0; |
672 | } | 672 | } |
673 | 673 | ||
674 | static int activate_dedicated_process(struct cxl_afu *afu) | 674 | int cxl_activate_dedicated_process_psl(struct cxl_afu *afu) |
675 | { | 675 | { |
676 | dev_info(&afu->dev, "Activating dedicated process mode\n"); | 676 | dev_info(&afu->dev, "Activating dedicated process mode\n"); |
677 | 677 | ||
@@ -694,7 +694,7 @@ static int activate_dedicated_process(struct cxl_afu *afu) | |||
694 | return cxl_chardev_d_afu_add(afu); | 694 | return cxl_chardev_d_afu_add(afu); |
695 | } | 695 | } |
696 | 696 | ||
697 | static void update_ivtes_dedicated(struct cxl_context *ctx) | 697 | void cxl_update_dedicated_ivtes_psl(struct cxl_context *ctx) |
698 | { | 698 | { |
699 | struct cxl_afu *afu = ctx->afu; | 699 | struct cxl_afu *afu = ctx->afu; |
700 | 700 | ||
@@ -710,7 +710,7 @@ static void update_ivtes_dedicated(struct cxl_context *ctx) | |||
710 | ((u64)ctx->irqs.range[3] & 0xffff)); | 710 | ((u64)ctx->irqs.range[3] & 0xffff)); |
711 | } | 711 | } |
712 | 712 | ||
713 | static int attach_dedicated(struct cxl_context *ctx, u64 wed, u64 amr) | 713 | int cxl_attach_dedicated_process_psl(struct cxl_context *ctx, u64 wed, u64 amr) |
714 | { | 714 | { |
715 | struct cxl_afu *afu = ctx->afu; | 715 | struct cxl_afu *afu = ctx->afu; |
716 | u64 pid; | 716 | u64 pid; |
@@ -728,7 +728,8 @@ static int attach_dedicated(struct cxl_context *ctx, u64 wed, u64 amr) | |||
728 | 728 | ||
729 | cxl_prefault(ctx, wed); | 729 | cxl_prefault(ctx, wed); |
730 | 730 | ||
731 | update_ivtes_dedicated(ctx); | 731 | if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes) |
732 | afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx); | ||
732 | 733 | ||
733 | cxl_p2n_write(afu, CXL_PSL_AMR_An, amr); | 734 | cxl_p2n_write(afu, CXL_PSL_AMR_An, amr); |
734 | 735 | ||
@@ -778,8 +779,9 @@ static int native_afu_activate_mode(struct cxl_afu *afu, int mode) | |||
778 | 779 | ||
779 | if (mode == CXL_MODE_DIRECTED) | 780 | if (mode == CXL_MODE_DIRECTED) |
780 | return activate_afu_directed(afu); | 781 | return activate_afu_directed(afu); |
781 | if (mode == CXL_MODE_DEDICATED) | 782 | if ((mode == CXL_MODE_DEDICATED) && |
782 | return activate_dedicated_process(afu); | 783 | (afu->adapter->native->sl_ops->activate_dedicated_process)) |
784 | return afu->adapter->native->sl_ops->activate_dedicated_process(afu); | ||
783 | 785 | ||
784 | return -EINVAL; | 786 | return -EINVAL; |
785 | } | 787 | } |
@@ -793,11 +795,13 @@ static int native_attach_process(struct cxl_context *ctx, bool kernel, | |||
793 | } | 795 | } |
794 | 796 | ||
795 | ctx->kernel = kernel; | 797 | ctx->kernel = kernel; |
796 | if (ctx->afu->current_mode == CXL_MODE_DIRECTED) | 798 | if ((ctx->afu->current_mode == CXL_MODE_DIRECTED) && |
797 | return attach_afu_directed(ctx, wed, amr); | 799 | (ctx->afu->adapter->native->sl_ops->attach_afu_directed)) |
800 | return ctx->afu->adapter->native->sl_ops->attach_afu_directed(ctx, wed, amr); | ||
798 | 801 | ||
799 | if (ctx->afu->current_mode == CXL_MODE_DEDICATED) | 802 | if ((ctx->afu->current_mode == CXL_MODE_DEDICATED) && |
800 | return attach_dedicated(ctx, wed, amr); | 803 | (ctx->afu->adapter->native->sl_ops->attach_dedicated_process)) |
804 | return ctx->afu->adapter->native->sl_ops->attach_dedicated_process(ctx, wed, amr); | ||
801 | 805 | ||
802 | return -EINVAL; | 806 | return -EINVAL; |
803 | } | 807 | } |
@@ -830,8 +834,9 @@ static void native_update_ivtes(struct cxl_context *ctx) | |||
830 | { | 834 | { |
831 | if (ctx->afu->current_mode == CXL_MODE_DIRECTED) | 835 | if (ctx->afu->current_mode == CXL_MODE_DIRECTED) |
832 | return update_ivtes_directed(ctx); | 836 | return update_ivtes_directed(ctx); |
833 | if (ctx->afu->current_mode == CXL_MODE_DEDICATED) | 837 | if ((ctx->afu->current_mode == CXL_MODE_DEDICATED) && |
834 | return update_ivtes_dedicated(ctx); | 838 | (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)) |
839 | return ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx); | ||
835 | WARN(1, "native_update_ivtes: Bad mode\n"); | 840 | WARN(1, "native_update_ivtes: Bad mode\n"); |
836 | } | 841 | } |
837 | 842 | ||
@@ -875,7 +880,7 @@ static int native_get_irq_info(struct cxl_afu *afu, struct cxl_irq_info *info) | |||
875 | return 0; | 880 | return 0; |
876 | } | 881 | } |
877 | 882 | ||
878 | void cxl_native_psl_irq_dump_regs(struct cxl_context *ctx) | 883 | void cxl_native_irq_dump_regs_psl(struct cxl_context *ctx) |
879 | { | 884 | { |
880 | u64 fir1, fir2, fir_slice, serr, afu_debug; | 885 | u64 fir1, fir2, fir_slice, serr, afu_debug; |
881 | 886 | ||
@@ -911,7 +916,7 @@ static irqreturn_t native_handle_psl_slice_error(struct cxl_context *ctx, | |||
911 | return cxl_ops->ack_irq(ctx, 0, errstat); | 916 | return cxl_ops->ack_irq(ctx, 0, errstat); |
912 | } | 917 | } |
913 | 918 | ||
914 | static irqreturn_t fail_psl_irq(struct cxl_afu *afu, struct cxl_irq_info *irq_info) | 919 | irqreturn_t cxl_fail_irq_psl(struct cxl_afu *afu, struct cxl_irq_info *irq_info) |
915 | { | 920 | { |
916 | if (irq_info->dsisr & CXL_PSL_DSISR_TRANS) | 921 | if (irq_info->dsisr & CXL_PSL_DSISR_TRANS) |
917 | cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_AE); | 922 | cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_AE); |
@@ -927,7 +932,7 @@ static irqreturn_t native_irq_multiplexed(int irq, void *data) | |||
927 | struct cxl_context *ctx; | 932 | struct cxl_context *ctx; |
928 | struct cxl_irq_info irq_info; | 933 | struct cxl_irq_info irq_info; |
929 | u64 phreg = cxl_p2n_read(afu, CXL_PSL_PEHandle_An); | 934 | u64 phreg = cxl_p2n_read(afu, CXL_PSL_PEHandle_An); |
930 | int ph, ret; | 935 | int ph, ret = IRQ_HANDLED, res; |
931 | 936 | ||
932 | /* check if eeh kicked in while the interrupt was in flight */ | 937 | /* check if eeh kicked in while the interrupt was in flight */ |
933 | if (unlikely(phreg == ~0ULL)) { | 938 | if (unlikely(phreg == ~0ULL)) { |
@@ -938,15 +943,18 @@ static irqreturn_t native_irq_multiplexed(int irq, void *data) | |||
938 | } | 943 | } |
939 | /* Mask the pe-handle from register value */ | 944 | /* Mask the pe-handle from register value */ |
940 | ph = phreg & 0xffff; | 945 | ph = phreg & 0xffff; |
941 | if ((ret = native_get_irq_info(afu, &irq_info))) { | 946 | if ((res = native_get_irq_info(afu, &irq_info))) { |
942 | WARN(1, "Unable to get CXL IRQ Info: %i\n", ret); | 947 | WARN(1, "Unable to get CXL IRQ Info: %i\n", res); |
943 | return fail_psl_irq(afu, &irq_info); | 948 | if (afu->adapter->native->sl_ops->fail_irq) |
949 | return afu->adapter->native->sl_ops->fail_irq(afu, &irq_info); | ||
950 | return ret; | ||
944 | } | 951 | } |
945 | 952 | ||
946 | rcu_read_lock(); | 953 | rcu_read_lock(); |
947 | ctx = idr_find(&afu->contexts_idr, ph); | 954 | ctx = idr_find(&afu->contexts_idr, ph); |
948 | if (ctx) { | 955 | if (ctx) { |
949 | ret = cxl_irq(irq, ctx, &irq_info); | 956 | if (afu->adapter->native->sl_ops->handle_interrupt) |
957 | ret = afu->adapter->native->sl_ops->handle_interrupt(irq, ctx, &irq_info); | ||
950 | rcu_read_unlock(); | 958 | rcu_read_unlock(); |
951 | return ret; | 959 | return ret; |
952 | } | 960 | } |
@@ -956,7 +964,9 @@ static irqreturn_t native_irq_multiplexed(int irq, void *data) | |||
956 | " %016llx\n(Possible AFU HW issue - was a term/remove acked" | 964 | " %016llx\n(Possible AFU HW issue - was a term/remove acked" |
957 | " with outstanding transactions?)\n", ph, irq_info.dsisr, | 965 | " with outstanding transactions?)\n", ph, irq_info.dsisr, |
958 | irq_info.dar); | 966 | irq_info.dar); |
959 | return fail_psl_irq(afu, &irq_info); | 967 | if (afu->adapter->native->sl_ops->fail_irq) |
968 | ret = afu->adapter->native->sl_ops->fail_irq(afu, &irq_info); | ||
969 | return ret; | ||
960 | } | 970 | } |
961 | 971 | ||
962 | static void native_irq_wait(struct cxl_context *ctx) | 972 | static void native_irq_wait(struct cxl_context *ctx) |
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c index e82a2070b668..9a092f6cd8d4 100644 --- a/drivers/misc/cxl/pci.c +++ b/drivers/misc/cxl/pci.c | |||
@@ -377,7 +377,7 @@ static int calc_capp_routing(struct pci_dev *dev, u64 *chipid, u64 *capp_unit_id | |||
377 | return 0; | 377 | return 0; |
378 | } | 378 | } |
379 | 379 | ||
380 | static int init_implementation_adapter_psl_regs(struct cxl *adapter, struct pci_dev *dev) | 380 | static int init_implementation_adapter_regs_psl(struct cxl *adapter, struct pci_dev *dev) |
381 | { | 381 | { |
382 | u64 psl_dsnctl, psl_fircntl; | 382 | u64 psl_dsnctl, psl_fircntl; |
383 | u64 chipid; | 383 | u64 chipid; |
@@ -409,7 +409,7 @@ static int init_implementation_adapter_psl_regs(struct cxl *adapter, struct pci_ | |||
409 | return 0; | 409 | return 0; |
410 | } | 410 | } |
411 | 411 | ||
412 | static int init_implementation_adapter_xsl_regs(struct cxl *adapter, struct pci_dev *dev) | 412 | static int init_implementation_adapter_regs_xsl(struct cxl *adapter, struct pci_dev *dev) |
413 | { | 413 | { |
414 | u64 xsl_dsnctl; | 414 | u64 xsl_dsnctl; |
415 | u64 chipid; | 415 | u64 chipid; |
@@ -513,7 +513,7 @@ static void cxl_setup_psl_timebase(struct cxl *adapter, struct pci_dev *dev) | |||
513 | return; | 513 | return; |
514 | } | 514 | } |
515 | 515 | ||
516 | static int init_implementation_afu_psl_regs(struct cxl_afu *afu) | 516 | static int init_implementation_afu_regs_psl(struct cxl_afu *afu) |
517 | { | 517 | { |
518 | /* read/write masks for this slice */ | 518 | /* read/write masks for this slice */ |
519 | cxl_p1n_write(afu, CXL_PSL_APCALLOC_A, 0xFFFFFFFEFEFEFEFEULL); | 519 | cxl_p1n_write(afu, CXL_PSL_APCALLOC_A, 0xFFFFFFFEFEFEFEFEULL); |
@@ -996,7 +996,7 @@ static int cxl_afu_descriptor_looks_ok(struct cxl_afu *afu) | |||
996 | return 0; | 996 | return 0; |
997 | } | 997 | } |
998 | 998 | ||
999 | static int sanitise_afu_regs(struct cxl_afu *afu) | 999 | static int sanitise_afu_regs_psl(struct cxl_afu *afu) |
1000 | { | 1000 | { |
1001 | u64 reg; | 1001 | u64 reg; |
1002 | 1002 | ||
@@ -1102,8 +1102,11 @@ static int pci_configure_afu(struct cxl_afu *afu, struct cxl *adapter, struct pc | |||
1102 | if ((rc = pci_map_slice_regs(afu, adapter, dev))) | 1102 | if ((rc = pci_map_slice_regs(afu, adapter, dev))) |
1103 | return rc; | 1103 | return rc; |
1104 | 1104 | ||
1105 | if ((rc = sanitise_afu_regs(afu))) | 1105 | if (adapter->native->sl_ops->sanitise_afu_regs) { |
1106 | goto err1; | 1106 | rc = adapter->native->sl_ops->sanitise_afu_regs(afu); |
1107 | if (rc) | ||
1108 | goto err1; | ||
1109 | } | ||
1107 | 1110 | ||
1108 | /* We need to reset the AFU before we can read the AFU descriptor */ | 1111 | /* We need to reset the AFU before we can read the AFU descriptor */ |
1109 | if ((rc = cxl_ops->afu_reset(afu))) | 1112 | if ((rc = cxl_ops->afu_reset(afu))) |
@@ -1432,9 +1435,15 @@ static void cxl_release_adapter(struct device *dev) | |||
1432 | 1435 | ||
1433 | static int sanitise_adapter_regs(struct cxl *adapter) | 1436 | static int sanitise_adapter_regs(struct cxl *adapter) |
1434 | { | 1437 | { |
1438 | int rc = 0; | ||
1439 | |||
1435 | /* Clear PSL tberror bit by writing 1 to it */ | 1440 | /* Clear PSL tberror bit by writing 1 to it */ |
1436 | cxl_p1_write(adapter, CXL_PSL_ErrIVTE, CXL_PSL_ErrIVTE_tberror); | 1441 | cxl_p1_write(adapter, CXL_PSL_ErrIVTE, CXL_PSL_ErrIVTE_tberror); |
1437 | return cxl_tlb_slb_invalidate(adapter); | 1442 | |
1443 | if (adapter->native->sl_ops->invalidate_all) | ||
1444 | rc = adapter->native->sl_ops->invalidate_all(adapter); | ||
1445 | |||
1446 | return rc; | ||
1438 | } | 1447 | } |
1439 | 1448 | ||
1440 | /* This should contain *only* operations that can safely be done in | 1449 | /* This should contain *only* operations that can safely be done in |
@@ -1518,15 +1527,23 @@ static void cxl_deconfigure_adapter(struct cxl *adapter) | |||
1518 | } | 1527 | } |
1519 | 1528 | ||
1520 | static const struct cxl_service_layer_ops psl_ops = { | 1529 | static const struct cxl_service_layer_ops psl_ops = { |
1521 | .adapter_regs_init = init_implementation_adapter_psl_regs, | 1530 | .adapter_regs_init = init_implementation_adapter_regs_psl, |
1522 | .afu_regs_init = init_implementation_afu_psl_regs, | 1531 | .invalidate_all = cxl_invalidate_all_psl, |
1532 | .afu_regs_init = init_implementation_afu_regs_psl, | ||
1533 | .sanitise_afu_regs = sanitise_afu_regs_psl, | ||
1523 | .register_serr_irq = cxl_native_register_serr_irq, | 1534 | .register_serr_irq = cxl_native_register_serr_irq, |
1524 | .release_serr_irq = cxl_native_release_serr_irq, | 1535 | .release_serr_irq = cxl_native_release_serr_irq, |
1525 | .debugfs_add_adapter_sl_regs = cxl_debugfs_add_adapter_psl_regs, | 1536 | .handle_interrupt = cxl_irq_psl, |
1526 | .debugfs_add_afu_sl_regs = cxl_debugfs_add_afu_psl_regs, | 1537 | .fail_irq = cxl_fail_irq_psl, |
1527 | .psl_irq_dump_registers = cxl_native_psl_irq_dump_regs, | 1538 | .activate_dedicated_process = cxl_activate_dedicated_process_psl, |
1539 | .attach_afu_directed = cxl_attach_afu_directed_psl, | ||
1540 | .attach_dedicated_process = cxl_attach_dedicated_process_psl, | ||
1541 | .update_dedicated_ivtes = cxl_update_dedicated_ivtes_psl, | ||
1542 | .debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_psl, | ||
1543 | .debugfs_add_afu_regs = cxl_debugfs_add_afu_regs_psl, | ||
1544 | .psl_irq_dump_registers = cxl_native_irq_dump_regs_psl, | ||
1528 | .err_irq_dump_registers = cxl_native_err_irq_dump_regs, | 1545 | .err_irq_dump_registers = cxl_native_err_irq_dump_regs, |
1529 | .debugfs_stop_trace = cxl_stop_trace, | 1546 | .debugfs_stop_trace = cxl_stop_trace_psl, |
1530 | .write_timebase_ctrl = write_timebase_ctrl_psl, | 1547 | .write_timebase_ctrl = write_timebase_ctrl_psl, |
1531 | .timebase_read = timebase_read_psl, | 1548 | .timebase_read = timebase_read_psl, |
1532 | .capi_mode = OPAL_PHB_CAPI_MODE_CAPI, | 1549 | .capi_mode = OPAL_PHB_CAPI_MODE_CAPI, |
@@ -1534,8 +1551,16 @@ static const struct cxl_service_layer_ops psl_ops = { | |||
1534 | }; | 1551 | }; |
1535 | 1552 | ||
1536 | static const struct cxl_service_layer_ops xsl_ops = { | 1553 | static const struct cxl_service_layer_ops xsl_ops = { |
1537 | .adapter_regs_init = init_implementation_adapter_xsl_regs, | 1554 | .adapter_regs_init = init_implementation_adapter_regs_xsl, |
1538 | .debugfs_add_adapter_sl_regs = cxl_debugfs_add_adapter_xsl_regs, | 1555 | .invalidate_all = cxl_invalidate_all_psl, |
1556 | .sanitise_afu_regs = sanitise_afu_regs_psl, | ||
1557 | .handle_interrupt = cxl_irq_psl, | ||
1558 | .fail_irq = cxl_fail_irq_psl, | ||
1559 | .activate_dedicated_process = cxl_activate_dedicated_process_psl, | ||
1560 | .attach_afu_directed = cxl_attach_afu_directed_psl, | ||
1561 | .attach_dedicated_process = cxl_attach_dedicated_process_psl, | ||
1562 | .update_dedicated_ivtes = cxl_update_dedicated_ivtes_psl, | ||
1563 | .debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_xsl, | ||
1539 | .write_timebase_ctrl = write_timebase_ctrl_xsl, | 1564 | .write_timebase_ctrl = write_timebase_ctrl_xsl, |
1540 | .timebase_read = timebase_read_xsl, | 1565 | .timebase_read = timebase_read_xsl, |
1541 | .capi_mode = OPAL_PHB_CAPI_MODE_DMA, | 1566 | .capi_mode = OPAL_PHB_CAPI_MODE_DMA, |