2 files changed, 38 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
index 928affae1885..ed8f064d0895 100644
--- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
@@ -242,6 +242,15 @@
                         };
                 };
 
+                i2c3_pins: i2c3 {
+                        mux {
+                                pins = "gpio10", "gpio11";
+                                function = "blsp_i2c3";
+                                drive-strength = <2>;
+                                bias-disable;
+                        };
+                };
+
                 i2c12_pins: i2c12 {
                         mux {
                                 pins = "gpio87", "gpio88";
@@ -333,6 +342,24 @@
                         };
                 };
         };
+
+        i2c@f9925000 {
+                status = "ok";
+                pinctrl-names = "default";
+                pinctrl-0 = <&i2c3_pins>;
+                clock-frequency = <100000>;
+                qcom,src-freq = <50000000>;
+
+                avago_apds993@39 {
+                        compatible = "avago,apds9930";
+                        reg = <0x39>;
+                        interrupts-extended = <&msmgpio 61 IRQ_TYPE_EDGE_FALLING>;
+                        vdd-supply = <&pm8941_l17>;
+                        vddio-supply = <&pm8941_lvs1>;
+                        led-max-microamp = <100000>;
+                        amstaos,proximity-diodes = <0>;
+                };
+        };
 };
 
 &spmi_bus {
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 439ca8c3a8b4..84e1fee1bf1a 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -715,6 +715,17 @@
                         #size-cells = <0>;
                 };
 
+                blsp_i2c3: i2c@f9925000 {
+                        status = "disabled";
+                        compatible = "qcom,i2c-qup-v2.1.1";
+                        reg = <0xf9925000 0x1000>;
+                        interrupts = <0 97 IRQ_TYPE_NONE>;
+                        clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
+                        clock-names = "core", "iface";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
                 blsp_i2c8: i2c@f9964000 {
                         status = "disabled";
                         compatible = "qcom,i2c-qup-v2.1.1";