diff options
| -rw-r--r-- | include/drm/drm_dp_helper.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index d4803224028f..98fefe45d158 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h | |||
| @@ -92,9 +92,6 @@ | |||
| 92 | # define DP_MSA_TIMING_PAR_IGNORED (1 << 6) /* eDP */ | 92 | # define DP_MSA_TIMING_PAR_IGNORED (1 << 6) /* eDP */ |
| 93 | # define DP_OUI_SUPPORT (1 << 7) | 93 | # define DP_OUI_SUPPORT (1 << 7) |
| 94 | 94 | ||
| 95 | #define DP_SUPPORTED_LINK_RATES 0x010 /*eDP 1.4*/ | ||
| 96 | #define DP_MAX_SUPPORTED_RATES 0x8 | ||
| 97 | |||
| 98 | #define DP_I2C_SPEED_CAP 0x00c /* DPI */ | 95 | #define DP_I2C_SPEED_CAP 0x00c /* DPI */ |
| 99 | # define DP_I2C_SPEED_1K 0x01 | 96 | # define DP_I2C_SPEED_1K 0x01 |
| 100 | # define DP_I2C_SPEED_5K 0x02 | 97 | # define DP_I2C_SPEED_5K 0x02 |
| @@ -105,8 +102,12 @@ | |||
| 105 | 102 | ||
| 106 | #define DP_EDP_CONFIGURATION_CAP 0x00d /* XXX 1.2? */ | 103 | #define DP_EDP_CONFIGURATION_CAP 0x00d /* XXX 1.2? */ |
| 107 | # define DP_DPCD_DISPLAY_CONTROL_CAPABLE (1 << 3) /* edp v1.2 or higher */ | 104 | # define DP_DPCD_DISPLAY_CONTROL_CAPABLE (1 << 3) /* edp v1.2 or higher */ |
| 105 | |||
| 108 | #define DP_TRAINING_AUX_RD_INTERVAL 0x00e /* XXX 1.2? */ | 106 | #define DP_TRAINING_AUX_RD_INTERVAL 0x00e /* XXX 1.2? */ |
| 109 | 107 | ||
| 108 | #define DP_SUPPORTED_LINK_RATES 0x010 /* eDP 1.4 */ | ||
| 109 | # define DP_MAX_SUPPORTED_RATES 8 /* 16-bit little-endian */ | ||
| 110 | |||
| 110 | /* Multiple stream transport */ | 111 | /* Multiple stream transport */ |
| 111 | #define DP_FAUX_CAP 0x020 /* 1.2 */ | 112 | #define DP_FAUX_CAP 0x020 /* 1.2 */ |
| 112 | # define DP_FAUX_CAP_1 (1 << 0) | 113 | # define DP_FAUX_CAP_1 (1 << 0) |
| @@ -225,7 +226,7 @@ | |||
| 225 | # define DP_UP_REQ_EN (1 << 1) | 226 | # define DP_UP_REQ_EN (1 << 1) |
| 226 | # define DP_UPSTREAM_IS_SRC (1 << 2) | 227 | # define DP_UPSTREAM_IS_SRC (1 << 2) |
| 227 | 228 | ||
| 228 | #define DP_LINK_RATE_SET 0x115 | 229 | #define DP_LINK_RATE_SET 0x115 /* eDP 1.4 */ |
| 229 | 230 | ||
| 230 | #define DP_PSR_EN_CFG 0x170 /* XXX 1.2? */ | 231 | #define DP_PSR_EN_CFG 0x170 /* XXX 1.2? */ |
| 231 | # define DP_PSR_ENABLE (1 << 0) | 232 | # define DP_PSR_ENABLE (1 << 0) |
| @@ -338,7 +339,7 @@ | |||
| 338 | # define DP_SET_POWER_D3 0x2 | 339 | # define DP_SET_POWER_D3 0x2 |
| 339 | # define DP_SET_POWER_MASK 0x3 | 340 | # define DP_SET_POWER_MASK 0x3 |
| 340 | 341 | ||
| 341 | #define DP_EDP_DPCD_REV 0x700 | 342 | #define DP_EDP_DPCD_REV 0x700 /* eDP 1.2 */ |
| 342 | 343 | ||
| 343 | #define DP_SIDEBAND_MSG_DOWN_REQ_BASE 0x1000 /* 1.2 MST */ | 344 | #define DP_SIDEBAND_MSG_DOWN_REQ_BASE 0x1000 /* 1.2 MST */ |
| 344 | #define DP_SIDEBAND_MSG_UP_REP_BASE 0x1200 /* 1.2 MST */ | 345 | #define DP_SIDEBAND_MSG_UP_REP_BASE 0x1200 /* 1.2 MST */ |
