10 files changed, 44 insertions, 29 deletions

diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
index 031e5f305a3c..6bab816ed8e7 100644
--- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
+++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
@@ -245,7 +245,7 @@ static void d71_layer_dump(struct komeda_component *c, struct seq_file *sf)
         seq_printf(sf, "%sAD_V_CROP:\t\t0x%X\n", prefix, v[2]);
 }
 
-static struct komeda_component_funcs d71_layer_funcs = {
+static const struct komeda_component_funcs d71_layer_funcs = {
         .update         = d71_layer_update,
         .disable        = d71_layer_disable,
         .dump_register  = d71_layer_dump,
@@ -391,7 +391,7 @@ static void d71_compiz_dump(struct komeda_component *c, struct seq_file *sf)
         seq_printf(sf, "CU_USER_HIGH:\t\t0x%X\n", v[1]);
 }
 
-static struct komeda_component_funcs d71_compiz_funcs = {
+static const struct komeda_component_funcs d71_compiz_funcs = {
         .update         = d71_compiz_update,
         .disable        = d71_component_disable,
         .dump_register  = d71_compiz_dump,
@@ -467,7 +467,7 @@ static void d71_improc_dump(struct komeda_component *c, struct seq_file *sf)
                 seq_printf(sf, "IPS_RGB_YUV_COEFF%u:\t0x%X\n", i, v[i]);
 }
 
-static struct komeda_component_funcs d71_improc_funcs = {
+static const struct komeda_component_funcs d71_improc_funcs = {
         .update         = d71_improc_update,
         .disable        = d71_component_disable,
         .dump_register  = d71_improc_dump,
@@ -580,7 +580,7 @@ static void d71_timing_ctrlr_dump(struct komeda_component *c,
         seq_printf(sf, "BS_USER:\t\t0x%X\n", v[4]);
 }
 
-static struct komeda_component_funcs d71_timing_ctrlr_funcs = {
+static const struct komeda_component_funcs d71_timing_ctrlr_funcs = {
         .update         = d71_timing_ctrlr_update,
         .disable        = d71_timing_ctrlr_disable,
         .dump_register  = d71_timing_ctrlr_dump,
diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
index 34506ef7ad40..3a7248d42376 100644
--- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
+++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
@@ -502,7 +502,7 @@ static void d71_init_fmt_tbl(struct komeda_dev *mdev)
         table->n_formats = ARRAY_SIZE(d71_format_caps_table);
 }
 
-static struct komeda_dev_funcs d71_chip_funcs = {
+static const struct komeda_dev_funcs d71_chip_funcs = {
         .init_format_table = d71_init_fmt_tbl,
         .enum_resources = d71_enum_resources,
         .cleanup        = d71_cleanup,
@@ -514,7 +514,7 @@ static struct komeda_dev_funcs d71_chip_funcs = {
         .flush          = d71_flush,
 };
 
-struct komeda_dev_funcs *
+const struct komeda_dev_funcs *
 d71_identify(u32 __iomem *reg_base, struct komeda_chip_info *chip)
 {
         chip->arch_id   = malidp_read32(reg_base, GLB_ARCH_ID);
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
index 62fad59f5a6a..284ce079d8c4 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
@@ -350,7 +350,7 @@ static bool komeda_crtc_mode_fixup(struct drm_crtc *crtc,
         return true;
 }
 
-static struct drm_crtc_helper_funcs komeda_crtc_helper_funcs = {
+static const struct drm_crtc_helper_funcs komeda_crtc_helper_funcs = {
         .atomic_check   = komeda_crtc_atomic_check,
         .atomic_flush   = komeda_crtc_atomic_flush,
         .atomic_enable  = komeda_crtc_atomic_enable,
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
index ca3599e4a4d3..b67030a9f056 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
@@ -8,6 +8,7 @@
 #include <linux/of_device.h>
 #include <linux/of_graph.h>
 #include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
 #ifdef CONFIG_DEBUG_FS
 #include <linux/debugfs.h>
 #include <linux/seq_file.h>
@@ -249,6 +250,9 @@ struct komeda_dev *komeda_dev_create(struct device *dev)
                 goto err_cleanup;
         }
 
+        dev->dma_parms = &mdev->dma_parms;
+        dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
+
         err = sysfs_create_group(&dev->kobj, &komeda_sysfs_attr_group);
         if (err) {
                 DRM_ERROR("create sysfs group failed.\n");
@@ -269,7 +273,7 @@ err_cleanup:
 void komeda_dev_destroy(struct komeda_dev *mdev)
 {
         struct device *dev = mdev->dev;
-        struct komeda_dev_funcs *funcs = mdev->funcs;
+        const struct komeda_dev_funcs *funcs = mdev->funcs;
         int i;
 
         sysfs_remove_group(&dev->kobj, &komeda_sysfs_attr_group);
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.h b/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
index 29e03c4e1ffc..973fd5e0eb98 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
@@ -60,7 +60,7 @@ struct komeda_chip_info {
 
 struct komeda_product_data {
         u32 product_id;
-        struct komeda_dev_funcs *(*identify)(u32 __iomem *reg,
+        const struct komeda_dev_funcs *(*identify)(u32 __iomem *reg,
                                              struct komeda_chip_info *info);
 };
 
@@ -149,6 +149,8 @@ struct komeda_dev {
         struct device *dev;
         /** @reg_base: the base address of komeda io space */
         u32 __iomem   *reg_base;
+        /** @dma_parms: the dma parameters of komeda */
+        struct device_dma_parameters dma_parms;
 
         /** @chip: the basic chip information */
         struct komeda_chip_info chip;
@@ -173,7 +175,7 @@ struct komeda_dev {
         struct komeda_pipeline *pipelines[KOMEDA_MAX_PIPELINES];
 
         /** @funcs: chip funcs to access to HW */
-        struct komeda_dev_funcs *funcs;
+        const struct komeda_dev_funcs *funcs;
         /**
          * @chip_data:
          *
@@ -192,7 +194,7 @@ komeda_product_match(struct komeda_dev *mdev, u32 target)
         return MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id) == target;
 }
 
-struct komeda_dev_funcs *
+const struct komeda_dev_funcs *
 d71_identify(u32 __iomem *reg, struct komeda_chip_info *chip);
 
 struct komeda_dev *komeda_dev_create(struct device *dev);
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c
index c379439c6194..a130b62fa6d1 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c
@@ -12,7 +12,7 @@
 /** komeda_pipeline_add - Add a pipeline to &komeda_dev */
 struct komeda_pipeline *
 komeda_pipeline_add(struct komeda_dev *mdev, size_t size,
-                    struct komeda_pipeline_funcs *funcs)
+                    const struct komeda_pipeline_funcs *funcs)
 {
         struct komeda_pipeline *pipe;
 
@@ -130,7 +130,7 @@ komeda_pipeline_get_component(struct komeda_pipeline *pipe, int id)
 struct komeda_component *
 komeda_component_add(struct komeda_pipeline *pipe,
                      size_t comp_sz, u32 id, u32 hw_id,
-                     struct komeda_component_funcs *funcs,
+                     const struct komeda_component_funcs *funcs,
                      u8 max_active_inputs, u32 supported_inputs,
                      u8 max_active_outputs, u32 __iomem *reg,
                      const char *name_fmt, ...)
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
index b1f813a349a4..bae8a32b81a6 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
@@ -124,7 +124,7 @@ struct komeda_component {
         /**
          * @funcs: chip functions to access HW
          */
-        struct komeda_component_funcs *funcs;
+        const struct komeda_component_funcs *funcs;
 };
 
 /**
@@ -346,8 +346,8 @@ struct komeda_pipeline {
         struct komeda_improc *improc;
         /** @ctrlr: timing controller */
         struct komeda_timing_ctrlr *ctrlr;
-        /** @funcs: chip pipeline functions */
-        struct komeda_pipeline_funcs *funcs; /* private pipeline functions */
+        /** @funcs: chip private pipeline functions */
+        const struct komeda_pipeline_funcs *funcs;
 
         /** @of_node: pipeline dt node */
         struct device_node *of_node;
@@ -397,7 +397,7 @@ struct komeda_pipeline_state {
 /* pipeline APIs */
 struct komeda_pipeline *
 komeda_pipeline_add(struct komeda_dev *mdev, size_t size,
-                    struct komeda_pipeline_funcs *funcs);
+                    const struct komeda_pipeline_funcs *funcs);
 void komeda_pipeline_destroy(struct komeda_dev *mdev,
                              struct komeda_pipeline *pipe);
 int komeda_assemble_pipelines(struct komeda_dev *mdev);
@@ -411,7 +411,7 @@ void komeda_pipeline_dump_register(struct komeda_pipeline *pipe,
 struct komeda_component *
 komeda_component_add(struct komeda_pipeline *pipe,
                      size_t comp_sz, u32 id, u32 hw_id,
-                     struct komeda_component_funcs *funcs,
+                     const struct komeda_component_funcs *funcs,
                      u8 max_active_inputs, u32 supported_inputs,
                      u8 max_active_outputs, u32 __iomem *reg,
                      const char *name_fmt, ...);
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c
index 07ed0cc1bc44..c97062bdd69b 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c
@@ -55,7 +55,6 @@ komeda_plane_atomic_check(struct drm_plane *plane,
         struct komeda_plane_state *kplane_st = to_kplane_st(state);
         struct komeda_layer *layer = kplane->layer;
         struct drm_crtc_state *crtc_st;
-        struct komeda_crtc *kcrtc;
         struct komeda_crtc_state *kcrtc_st;
         struct komeda_data_flow_cfg dflow;
         int err;
@@ -64,7 +63,7 @@ komeda_plane_atomic_check(struct drm_plane *plane,
                 return 0;
 
         crtc_st = drm_atomic_get_crtc_state(state->state, state->crtc);
-        if (!crtc_st->enable) {
+        if (IS_ERR(crtc_st) || !crtc_st->enable) {
                 DRM_DEBUG_ATOMIC("Cannot update plane on a disabled CRTC.\n");
                 return -EINVAL;
         }
@@ -73,7 +72,6 @@ komeda_plane_atomic_check(struct drm_plane *plane,
         if (!crtc_st->active)
                 return 0;
 
-        kcrtc = to_kcrtc(state->crtc);
         kcrtc_st = to_kcrtc_st(crtc_st);
 
         err = komeda_plane_init_data_flow(state, &dflow);
diff --git a/drivers/gpu/drm/arm/hdlcd_crtc.c b/drivers/gpu/drm/arm/hdlcd_crtc.c
index 0b2b62f8fa3c..a3efa28436ea 100644
--- a/drivers/gpu/drm/arm/hdlcd_crtc.c
+++ b/drivers/gpu/drm/arm/hdlcd_crtc.c
@@ -186,20 +186,20 @@ static void hdlcd_crtc_atomic_disable(struct drm_crtc *crtc,
         clk_disable_unprepare(hdlcd->clk);
 }
 
-static int hdlcd_crtc_atomic_check(struct drm_crtc *crtc,
-                                   struct drm_crtc_state *state)
+static enum drm_mode_status hdlcd_crtc_mode_valid(struct drm_crtc *crtc,
+                const struct drm_display_mode *mode)
 {
         struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);
-        struct drm_display_mode *mode = &state->adjusted_mode;
         long rate, clk_rate = mode->clock * 1000;
 
         rate = clk_round_rate(hdlcd->clk, clk_rate);
-        if (rate != clk_rate) {
+        /* 0.1% seems a close enough tolerance for the TDA19988 on Juno */
+        if (abs(rate - clk_rate) * 1000 > clk_rate) {
                 /* clock required by mode not supported by hardware */
-                return -EINVAL;
+                return MODE_NOCLOCK;
         }
 
-        return 0;
+        return MODE_OK;
 }
 
 static void hdlcd_crtc_atomic_begin(struct drm_crtc *crtc,
@@ -220,7 +220,7 @@ static void hdlcd_crtc_atomic_begin(struct drm_crtc *crtc,
 }
 
 static const struct drm_crtc_helper_funcs hdlcd_crtc_helper_funcs = {
-        .atomic_check   = hdlcd_crtc_atomic_check,
+        .mode_valid     = hdlcd_crtc_mode_valid,
         .atomic_begin   = hdlcd_crtc_atomic_begin,
         .atomic_enable  = hdlcd_crtc_atomic_enable,
         .atomic_disable = hdlcd_crtc_atomic_disable,
diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c
index 21725c9b9f5e..18cb7f134f4e 100644
--- a/drivers/gpu/drm/arm/malidp_drv.c
+++ b/drivers/gpu/drm/arm/malidp_drv.c
@@ -192,6 +192,7 @@ static void malidp_atomic_commit_hw_done(struct drm_atomic_state *state)
 {
         struct drm_device *drm = state->dev;
         struct malidp_drm *malidp = drm->dev_private;
+        int loop = 5;
 
         malidp->event = malidp->crtc.state->event;
         malidp->crtc.state->event = NULL;
@@ -206,8 +207,18 @@ static void malidp_atomic_commit_hw_done(struct drm_atomic_state *state)
                         drm_crtc_vblank_get(&malidp->crtc);
 
                 /* only set config_valid if the CRTC is enabled */
-                if (malidp_set_and_wait_config_valid(drm) < 0)
+                if (malidp_set_and_wait_config_valid(drm) < 0) {
+                        /*
+                         * make a loop around the second CVAL setting and
+                         * try 5 times before giving up.
+                         */
+                        while (loop--) {
+                                if (!malidp_set_and_wait_config_valid(drm))
+                                        break;
+                        }
                         DRM_DEBUG_DRIVER("timed out waiting for updated configuration\n");
+                }
+
         } else if (malidp->event) {
                 /* CRTC inactive means vblank IRQ is disabled, send event directly */
                 spin_lock_irq(&drm->event_lock);