diff options
-rw-r--r-- | drivers/gpu/drm/i915/gvt/cmd_parser.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/display.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/dmabuf.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/fb_decoder.c | 27 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/gtt.c | 52 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/gtt.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/handlers.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/kvmgt.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 27 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_pmu.c | 37 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_audio.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_bios.c | 13 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_lrc.c | 9 |
14 files changed, 131 insertions, 55 deletions
diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c index db6b94dda5df..d85939bd7b47 100644 --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c | |||
@@ -1080,6 +1080,7 @@ static int cmd_handler_mi_user_interrupt(struct parser_exec_state *s) | |||
1080 | { | 1080 | { |
1081 | set_bit(cmd_interrupt_events[s->ring_id].mi_user_interrupt, | 1081 | set_bit(cmd_interrupt_events[s->ring_id].mi_user_interrupt, |
1082 | s->workload->pending_events); | 1082 | s->workload->pending_events); |
1083 | patch_value(s, cmd_ptr(s, 0), MI_NOOP); | ||
1083 | return 0; | 1084 | return 0; |
1084 | } | 1085 | } |
1085 | 1086 | ||
diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c index dd96ffc878ac..6d8180e8d1e2 100644 --- a/drivers/gpu/drm/i915/gvt/display.c +++ b/drivers/gpu/drm/i915/gvt/display.c | |||
@@ -169,6 +169,8 @@ static u8 dpcd_fix_data[DPCD_HEADER_SIZE] = { | |||
169 | static void emulate_monitor_status_change(struct intel_vgpu *vgpu) | 169 | static void emulate_monitor_status_change(struct intel_vgpu *vgpu) |
170 | { | 170 | { |
171 | struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; | 171 | struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; |
172 | int pipe; | ||
173 | |||
172 | vgpu_vreg_t(vgpu, SDEISR) &= ~(SDE_PORTB_HOTPLUG_CPT | | 174 | vgpu_vreg_t(vgpu, SDEISR) &= ~(SDE_PORTB_HOTPLUG_CPT | |
173 | SDE_PORTC_HOTPLUG_CPT | | 175 | SDE_PORTC_HOTPLUG_CPT | |
174 | SDE_PORTD_HOTPLUG_CPT); | 176 | SDE_PORTD_HOTPLUG_CPT); |
@@ -267,6 +269,14 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) | |||
267 | if (IS_BROADWELL(dev_priv)) | 269 | if (IS_BROADWELL(dev_priv)) |
268 | vgpu_vreg_t(vgpu, PCH_ADPA) &= ~ADPA_CRT_HOTPLUG_MONITOR_MASK; | 270 | vgpu_vreg_t(vgpu, PCH_ADPA) &= ~ADPA_CRT_HOTPLUG_MONITOR_MASK; |
269 | 271 | ||
272 | /* Disable Primary/Sprite/Cursor plane */ | ||
273 | for_each_pipe(dev_priv, pipe) { | ||
274 | vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISPLAY_PLANE_ENABLE; | ||
275 | vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE; | ||
276 | vgpu_vreg_t(vgpu, CURCNTR(pipe)) &= ~CURSOR_MODE; | ||
277 | vgpu_vreg_t(vgpu, CURCNTR(pipe)) |= CURSOR_MODE_DISABLE; | ||
278 | } | ||
279 | |||
270 | vgpu_vreg_t(vgpu, PIPECONF(PIPE_A)) |= PIPECONF_ENABLE; | 280 | vgpu_vreg_t(vgpu, PIPECONF(PIPE_A)) |= PIPECONF_ENABLE; |
271 | } | 281 | } |
272 | 282 | ||
diff --git a/drivers/gpu/drm/i915/gvt/dmabuf.c b/drivers/gpu/drm/i915/gvt/dmabuf.c index b555eb26f9ce..6f4f8e941fc2 100644 --- a/drivers/gpu/drm/i915/gvt/dmabuf.c +++ b/drivers/gpu/drm/i915/gvt/dmabuf.c | |||
@@ -323,6 +323,7 @@ static void update_fb_info(struct vfio_device_gfx_plane_info *gvt_dmabuf, | |||
323 | struct intel_vgpu_fb_info *fb_info) | 323 | struct intel_vgpu_fb_info *fb_info) |
324 | { | 324 | { |
325 | gvt_dmabuf->drm_format = fb_info->drm_format; | 325 | gvt_dmabuf->drm_format = fb_info->drm_format; |
326 | gvt_dmabuf->drm_format_mod = fb_info->drm_format_mod; | ||
326 | gvt_dmabuf->width = fb_info->width; | 327 | gvt_dmabuf->width = fb_info->width; |
327 | gvt_dmabuf->height = fb_info->height; | 328 | gvt_dmabuf->height = fb_info->height; |
328 | gvt_dmabuf->stride = fb_info->stride; | 329 | gvt_dmabuf->stride = fb_info->stride; |
diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c index 6b50fe78dc1b..1c120683e958 100644 --- a/drivers/gpu/drm/i915/gvt/fb_decoder.c +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c | |||
@@ -245,16 +245,13 @@ int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu, | |||
245 | plane->hw_format = fmt; | 245 | plane->hw_format = fmt; |
246 | 246 | ||
247 | plane->base = vgpu_vreg_t(vgpu, DSPSURF(pipe)) & I915_GTT_PAGE_MASK; | 247 | plane->base = vgpu_vreg_t(vgpu, DSPSURF(pipe)) & I915_GTT_PAGE_MASK; |
248 | if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0)) { | 248 | if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0)) |
249 | gvt_vgpu_err("invalid gma address: %lx\n", | ||
250 | (unsigned long)plane->base); | ||
251 | return -EINVAL; | 249 | return -EINVAL; |
252 | } | ||
253 | 250 | ||
254 | plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base); | 251 | plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base); |
255 | if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) { | 252 | if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) { |
256 | gvt_vgpu_err("invalid gma address: %lx\n", | 253 | gvt_vgpu_err("Translate primary plane gma 0x%x to gpa fail\n", |
257 | (unsigned long)plane->base); | 254 | plane->base); |
258 | return -EINVAL; | 255 | return -EINVAL; |
259 | } | 256 | } |
260 | 257 | ||
@@ -371,16 +368,13 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu, | |||
371 | alpha_plane, alpha_force); | 368 | alpha_plane, alpha_force); |
372 | 369 | ||
373 | plane->base = vgpu_vreg_t(vgpu, CURBASE(pipe)) & I915_GTT_PAGE_MASK; | 370 | plane->base = vgpu_vreg_t(vgpu, CURBASE(pipe)) & I915_GTT_PAGE_MASK; |
374 | if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0)) { | 371 | if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0)) |
375 | gvt_vgpu_err("invalid gma address: %lx\n", | ||
376 | (unsigned long)plane->base); | ||
377 | return -EINVAL; | 372 | return -EINVAL; |
378 | } | ||
379 | 373 | ||
380 | plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base); | 374 | plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base); |
381 | if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) { | 375 | if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) { |
382 | gvt_vgpu_err("invalid gma address: %lx\n", | 376 | gvt_vgpu_err("Translate cursor plane gma 0x%x to gpa fail\n", |
383 | (unsigned long)plane->base); | 377 | plane->base); |
384 | return -EINVAL; | 378 | return -EINVAL; |
385 | } | 379 | } |
386 | 380 | ||
@@ -476,16 +470,13 @@ int intel_vgpu_decode_sprite_plane(struct intel_vgpu *vgpu, | |||
476 | plane->drm_format = drm_format; | 470 | plane->drm_format = drm_format; |
477 | 471 | ||
478 | plane->base = vgpu_vreg_t(vgpu, SPRSURF(pipe)) & I915_GTT_PAGE_MASK; | 472 | plane->base = vgpu_vreg_t(vgpu, SPRSURF(pipe)) & I915_GTT_PAGE_MASK; |
479 | if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0)) { | 473 | if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0)) |
480 | gvt_vgpu_err("invalid gma address: %lx\n", | ||
481 | (unsigned long)plane->base); | ||
482 | return -EINVAL; | 474 | return -EINVAL; |
483 | } | ||
484 | 475 | ||
485 | plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base); | 476 | plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base); |
486 | if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) { | 477 | if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) { |
487 | gvt_vgpu_err("invalid gma address: %lx\n", | 478 | gvt_vgpu_err("Translate sprite plane gma 0x%x to gpa fail\n", |
488 | (unsigned long)plane->base); | 479 | plane->base); |
489 | return -EINVAL; | 480 | return -EINVAL; |
490 | } | 481 | } |
491 | 482 | ||
diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c index d29281231507..78e55aafc8bc 100644 --- a/drivers/gpu/drm/i915/gvt/gtt.c +++ b/drivers/gpu/drm/i915/gvt/gtt.c | |||
@@ -530,6 +530,16 @@ static void ggtt_set_guest_entry(struct intel_vgpu_mm *mm, | |||
530 | false, 0, mm->vgpu); | 530 | false, 0, mm->vgpu); |
531 | } | 531 | } |
532 | 532 | ||
533 | static void ggtt_get_host_entry(struct intel_vgpu_mm *mm, | ||
534 | struct intel_gvt_gtt_entry *entry, unsigned long index) | ||
535 | { | ||
536 | struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; | ||
537 | |||
538 | GEM_BUG_ON(mm->type != INTEL_GVT_MM_GGTT); | ||
539 | |||
540 | pte_ops->get_entry(NULL, entry, index, false, 0, mm->vgpu); | ||
541 | } | ||
542 | |||
533 | static void ggtt_set_host_entry(struct intel_vgpu_mm *mm, | 543 | static void ggtt_set_host_entry(struct intel_vgpu_mm *mm, |
534 | struct intel_gvt_gtt_entry *entry, unsigned long index) | 544 | struct intel_gvt_gtt_entry *entry, unsigned long index) |
535 | { | 545 | { |
@@ -1818,6 +1828,18 @@ int intel_vgpu_emulate_ggtt_mmio_read(struct intel_vgpu *vgpu, unsigned int off, | |||
1818 | return ret; | 1828 | return ret; |
1819 | } | 1829 | } |
1820 | 1830 | ||
1831 | static void ggtt_invalidate_pte(struct intel_vgpu *vgpu, | ||
1832 | struct intel_gvt_gtt_entry *entry) | ||
1833 | { | ||
1834 | struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops; | ||
1835 | unsigned long pfn; | ||
1836 | |||
1837 | pfn = pte_ops->get_pfn(entry); | ||
1838 | if (pfn != vgpu->gvt->gtt.scratch_mfn) | ||
1839 | intel_gvt_hypervisor_dma_unmap_guest_page(vgpu, | ||
1840 | pfn << PAGE_SHIFT); | ||
1841 | } | ||
1842 | |||
1821 | static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, | 1843 | static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, |
1822 | void *p_data, unsigned int bytes) | 1844 | void *p_data, unsigned int bytes) |
1823 | { | 1845 | { |
@@ -1844,10 +1866,10 @@ static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, | |||
1844 | 1866 | ||
1845 | memcpy((void *)&e.val64 + (off & (info->gtt_entry_size - 1)), p_data, | 1867 | memcpy((void *)&e.val64 + (off & (info->gtt_entry_size - 1)), p_data, |
1846 | bytes); | 1868 | bytes); |
1847 | m = e; | ||
1848 | 1869 | ||
1849 | if (ops->test_present(&e)) { | 1870 | if (ops->test_present(&e)) { |
1850 | gfn = ops->get_pfn(&e); | 1871 | gfn = ops->get_pfn(&e); |
1872 | m = e; | ||
1851 | 1873 | ||
1852 | /* one PTE update may be issued in multiple writes and the | 1874 | /* one PTE update may be issued in multiple writes and the |
1853 | * first write may not construct a valid gfn | 1875 | * first write may not construct a valid gfn |
@@ -1868,8 +1890,12 @@ static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, | |||
1868 | ops->set_pfn(&m, gvt->gtt.scratch_mfn); | 1890 | ops->set_pfn(&m, gvt->gtt.scratch_mfn); |
1869 | } else | 1891 | } else |
1870 | ops->set_pfn(&m, dma_addr >> PAGE_SHIFT); | 1892 | ops->set_pfn(&m, dma_addr >> PAGE_SHIFT); |
1871 | } else | 1893 | } else { |
1894 | ggtt_get_host_entry(ggtt_mm, &m, g_gtt_index); | ||
1895 | ggtt_invalidate_pte(vgpu, &m); | ||
1872 | ops->set_pfn(&m, gvt->gtt.scratch_mfn); | 1896 | ops->set_pfn(&m, gvt->gtt.scratch_mfn); |
1897 | ops->clear_present(&m); | ||
1898 | } | ||
1873 | 1899 | ||
1874 | out: | 1900 | out: |
1875 | ggtt_set_host_entry(ggtt_mm, &m, g_gtt_index); | 1901 | ggtt_set_host_entry(ggtt_mm, &m, g_gtt_index); |
@@ -2030,7 +2056,7 @@ int intel_vgpu_init_gtt(struct intel_vgpu *vgpu) | |||
2030 | return PTR_ERR(gtt->ggtt_mm); | 2056 | return PTR_ERR(gtt->ggtt_mm); |
2031 | } | 2057 | } |
2032 | 2058 | ||
2033 | intel_vgpu_reset_ggtt(vgpu); | 2059 | intel_vgpu_reset_ggtt(vgpu, false); |
2034 | 2060 | ||
2035 | return create_scratch_page_tree(vgpu); | 2061 | return create_scratch_page_tree(vgpu); |
2036 | } | 2062 | } |
@@ -2315,17 +2341,19 @@ void intel_vgpu_invalidate_ppgtt(struct intel_vgpu *vgpu) | |||
2315 | /** | 2341 | /** |
2316 | * intel_vgpu_reset_ggtt - reset the GGTT entry | 2342 | * intel_vgpu_reset_ggtt - reset the GGTT entry |
2317 | * @vgpu: a vGPU | 2343 | * @vgpu: a vGPU |
2344 | * @invalidate_old: invalidate old entries | ||
2318 | * | 2345 | * |
2319 | * This function is called at the vGPU create stage | 2346 | * This function is called at the vGPU create stage |
2320 | * to reset all the GGTT entries. | 2347 | * to reset all the GGTT entries. |
2321 | * | 2348 | * |
2322 | */ | 2349 | */ |
2323 | void intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu) | 2350 | void intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu, bool invalidate_old) |
2324 | { | 2351 | { |
2325 | struct intel_gvt *gvt = vgpu->gvt; | 2352 | struct intel_gvt *gvt = vgpu->gvt; |
2326 | struct drm_i915_private *dev_priv = gvt->dev_priv; | 2353 | struct drm_i915_private *dev_priv = gvt->dev_priv; |
2327 | struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops; | 2354 | struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops; |
2328 | struct intel_gvt_gtt_entry entry = {.type = GTT_TYPE_GGTT_PTE}; | 2355 | struct intel_gvt_gtt_entry entry = {.type = GTT_TYPE_GGTT_PTE}; |
2356 | struct intel_gvt_gtt_entry old_entry; | ||
2329 | u32 index; | 2357 | u32 index; |
2330 | u32 num_entries; | 2358 | u32 num_entries; |
2331 | 2359 | ||
@@ -2334,13 +2362,23 @@ void intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu) | |||
2334 | 2362 | ||
2335 | index = vgpu_aperture_gmadr_base(vgpu) >> PAGE_SHIFT; | 2363 | index = vgpu_aperture_gmadr_base(vgpu) >> PAGE_SHIFT; |
2336 | num_entries = vgpu_aperture_sz(vgpu) >> PAGE_SHIFT; | 2364 | num_entries = vgpu_aperture_sz(vgpu) >> PAGE_SHIFT; |
2337 | while (num_entries--) | 2365 | while (num_entries--) { |
2366 | if (invalidate_old) { | ||
2367 | ggtt_get_host_entry(vgpu->gtt.ggtt_mm, &old_entry, index); | ||
2368 | ggtt_invalidate_pte(vgpu, &old_entry); | ||
2369 | } | ||
2338 | ggtt_set_host_entry(vgpu->gtt.ggtt_mm, &entry, index++); | 2370 | ggtt_set_host_entry(vgpu->gtt.ggtt_mm, &entry, index++); |
2371 | } | ||
2339 | 2372 | ||
2340 | index = vgpu_hidden_gmadr_base(vgpu) >> PAGE_SHIFT; | 2373 | index = vgpu_hidden_gmadr_base(vgpu) >> PAGE_SHIFT; |
2341 | num_entries = vgpu_hidden_sz(vgpu) >> PAGE_SHIFT; | 2374 | num_entries = vgpu_hidden_sz(vgpu) >> PAGE_SHIFT; |
2342 | while (num_entries--) | 2375 | while (num_entries--) { |
2376 | if (invalidate_old) { | ||
2377 | ggtt_get_host_entry(vgpu->gtt.ggtt_mm, &old_entry, index); | ||
2378 | ggtt_invalidate_pte(vgpu, &old_entry); | ||
2379 | } | ||
2343 | ggtt_set_host_entry(vgpu->gtt.ggtt_mm, &entry, index++); | 2380 | ggtt_set_host_entry(vgpu->gtt.ggtt_mm, &entry, index++); |
2381 | } | ||
2344 | 2382 | ||
2345 | ggtt_invalidate(dev_priv); | 2383 | ggtt_invalidate(dev_priv); |
2346 | } | 2384 | } |
@@ -2360,5 +2398,5 @@ void intel_vgpu_reset_gtt(struct intel_vgpu *vgpu) | |||
2360 | * removing the shadow pages. | 2398 | * removing the shadow pages. |
2361 | */ | 2399 | */ |
2362 | intel_vgpu_destroy_all_ppgtt_mm(vgpu); | 2400 | intel_vgpu_destroy_all_ppgtt_mm(vgpu); |
2363 | intel_vgpu_reset_ggtt(vgpu); | 2401 | intel_vgpu_reset_ggtt(vgpu, true); |
2364 | } | 2402 | } |
diff --git a/drivers/gpu/drm/i915/gvt/gtt.h b/drivers/gpu/drm/i915/gvt/gtt.h index a8b369cd352b..3792f2b7f4ff 100644 --- a/drivers/gpu/drm/i915/gvt/gtt.h +++ b/drivers/gpu/drm/i915/gvt/gtt.h | |||
@@ -193,7 +193,7 @@ struct intel_vgpu_gtt { | |||
193 | 193 | ||
194 | extern int intel_vgpu_init_gtt(struct intel_vgpu *vgpu); | 194 | extern int intel_vgpu_init_gtt(struct intel_vgpu *vgpu); |
195 | extern void intel_vgpu_clean_gtt(struct intel_vgpu *vgpu); | 195 | extern void intel_vgpu_clean_gtt(struct intel_vgpu *vgpu); |
196 | void intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu); | 196 | void intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu, bool invalidate_old); |
197 | void intel_vgpu_invalidate_ppgtt(struct intel_vgpu *vgpu); | 197 | void intel_vgpu_invalidate_ppgtt(struct intel_vgpu *vgpu); |
198 | 198 | ||
199 | extern int intel_gvt_init_gtt(struct intel_gvt *gvt); | 199 | extern int intel_gvt_init_gtt(struct intel_gvt *gvt); |
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index 8c5d5d005854..a33c1c3e4a21 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c | |||
@@ -1150,6 +1150,7 @@ static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification) | |||
1150 | switch (notification) { | 1150 | switch (notification) { |
1151 | case VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE: | 1151 | case VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE: |
1152 | root_entry_type = GTT_TYPE_PPGTT_ROOT_L3_ENTRY; | 1152 | root_entry_type = GTT_TYPE_PPGTT_ROOT_L3_ENTRY; |
1153 | /* fall through */ | ||
1153 | case VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE: | 1154 | case VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE: |
1154 | mm = intel_vgpu_get_ppgtt_mm(vgpu, root_entry_type, pdps); | 1155 | mm = intel_vgpu_get_ppgtt_mm(vgpu, root_entry_type, pdps); |
1155 | return PTR_ERR_OR_ZERO(mm); | 1156 | return PTR_ERR_OR_ZERO(mm); |
diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c index c16a492449d7..1466d8769ec9 100644 --- a/drivers/gpu/drm/i915/gvt/kvmgt.c +++ b/drivers/gpu/drm/i915/gvt/kvmgt.c | |||
@@ -1301,7 +1301,7 @@ static long intel_vgpu_ioctl(struct mdev_device *mdev, unsigned int cmd, | |||
1301 | 1301 | ||
1302 | } | 1302 | } |
1303 | 1303 | ||
1304 | return 0; | 1304 | return -ENOTTY; |
1305 | } | 1305 | } |
1306 | 1306 | ||
1307 | static ssize_t | 1307 | static ssize_t |
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 07c07d55398b..be8555049c93 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -1102,30 +1102,32 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv) | |||
1102 | 1102 | ||
1103 | ret = i915_ggtt_probe_hw(dev_priv); | 1103 | ret = i915_ggtt_probe_hw(dev_priv); |
1104 | if (ret) | 1104 | if (ret) |
1105 | return ret; | 1105 | goto err_perf; |
1106 | 1106 | ||
1107 | /* WARNING: Apparently we must kick fbdev drivers before vgacon, | 1107 | /* |
1108 | * otherwise the vga fbdev driver falls over. */ | 1108 | * WARNING: Apparently we must kick fbdev drivers before vgacon, |
1109 | * otherwise the vga fbdev driver falls over. | ||
1110 | */ | ||
1109 | ret = i915_kick_out_firmware_fb(dev_priv); | 1111 | ret = i915_kick_out_firmware_fb(dev_priv); |
1110 | if (ret) { | 1112 | if (ret) { |
1111 | DRM_ERROR("failed to remove conflicting framebuffer drivers\n"); | 1113 | DRM_ERROR("failed to remove conflicting framebuffer drivers\n"); |
1112 | goto out_ggtt; | 1114 | goto err_ggtt; |
1113 | } | 1115 | } |
1114 | 1116 | ||
1115 | ret = i915_kick_out_vgacon(dev_priv); | 1117 | ret = i915_kick_out_vgacon(dev_priv); |
1116 | if (ret) { | 1118 | if (ret) { |
1117 | DRM_ERROR("failed to remove conflicting VGA console\n"); | 1119 | DRM_ERROR("failed to remove conflicting VGA console\n"); |
1118 | goto out_ggtt; | 1120 | goto err_ggtt; |
1119 | } | 1121 | } |
1120 | 1122 | ||
1121 | ret = i915_ggtt_init_hw(dev_priv); | 1123 | ret = i915_ggtt_init_hw(dev_priv); |
1122 | if (ret) | 1124 | if (ret) |
1123 | return ret; | 1125 | goto err_ggtt; |
1124 | 1126 | ||
1125 | ret = i915_ggtt_enable_hw(dev_priv); | 1127 | ret = i915_ggtt_enable_hw(dev_priv); |
1126 | if (ret) { | 1128 | if (ret) { |
1127 | DRM_ERROR("failed to enable GGTT\n"); | 1129 | DRM_ERROR("failed to enable GGTT\n"); |
1128 | goto out_ggtt; | 1130 | goto err_ggtt; |
1129 | } | 1131 | } |
1130 | 1132 | ||
1131 | pci_set_master(pdev); | 1133 | pci_set_master(pdev); |
@@ -1136,7 +1138,7 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv) | |||
1136 | if (ret) { | 1138 | if (ret) { |
1137 | DRM_ERROR("failed to set DMA mask\n"); | 1139 | DRM_ERROR("failed to set DMA mask\n"); |
1138 | 1140 | ||
1139 | goto out_ggtt; | 1141 | goto err_ggtt; |
1140 | } | 1142 | } |
1141 | } | 1143 | } |
1142 | 1144 | ||
@@ -1154,7 +1156,7 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv) | |||
1154 | if (ret) { | 1156 | if (ret) { |
1155 | DRM_ERROR("failed to set DMA mask\n"); | 1157 | DRM_ERROR("failed to set DMA mask\n"); |
1156 | 1158 | ||
1157 | goto out_ggtt; | 1159 | goto err_ggtt; |
1158 | } | 1160 | } |
1159 | } | 1161 | } |
1160 | 1162 | ||
@@ -1187,13 +1189,14 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv) | |||
1187 | 1189 | ||
1188 | ret = intel_gvt_init(dev_priv); | 1190 | ret = intel_gvt_init(dev_priv); |
1189 | if (ret) | 1191 | if (ret) |
1190 | goto out_ggtt; | 1192 | goto err_ggtt; |
1191 | 1193 | ||
1192 | return 0; | 1194 | return 0; |
1193 | 1195 | ||
1194 | out_ggtt: | 1196 | err_ggtt: |
1195 | i915_ggtt_cleanup_hw(dev_priv); | 1197 | i915_ggtt_cleanup_hw(dev_priv); |
1196 | 1198 | err_perf: | |
1199 | i915_perf_fini(dev_priv); | ||
1197 | return ret; | 1200 | return ret; |
1198 | } | 1201 | } |
1199 | 1202 | ||
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 8c170db8495d..0414228cd2b5 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c | |||
@@ -728,7 +728,7 @@ static int eb_lookup_vmas(struct i915_execbuffer *eb) | |||
728 | 728 | ||
729 | err = radix_tree_insert(handles_vma, handle, vma); | 729 | err = radix_tree_insert(handles_vma, handle, vma); |
730 | if (unlikely(err)) { | 730 | if (unlikely(err)) { |
731 | kfree(lut); | 731 | kmem_cache_free(eb->i915->luts, lut); |
732 | goto err_obj; | 732 | goto err_obj; |
733 | } | 733 | } |
734 | 734 | ||
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c index d8feb9053e0c..f0519e31543a 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c | |||
@@ -473,20 +473,37 @@ static u64 get_rc6(struct drm_i915_private *i915) | |||
473 | spin_lock_irqsave(&i915->pmu.lock, flags); | 473 | spin_lock_irqsave(&i915->pmu.lock, flags); |
474 | spin_lock(&kdev->power.lock); | 474 | spin_lock(&kdev->power.lock); |
475 | 475 | ||
476 | if (!i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur) | 476 | /* |
477 | i915->pmu.suspended_jiffies_last = | 477 | * After the above branch intel_runtime_pm_get_if_in_use failed |
478 | kdev->power.suspended_jiffies; | 478 | * to get the runtime PM reference we cannot assume we are in |
479 | * runtime suspend since we can either: a) race with coming out | ||
480 | * of it before we took the power.lock, or b) there are other | ||
481 | * states than suspended which can bring us here. | ||
482 | * | ||
483 | * We need to double-check that we are indeed currently runtime | ||
484 | * suspended and if not we cannot do better than report the last | ||
485 | * known RC6 value. | ||
486 | */ | ||
487 | if (kdev->power.runtime_status == RPM_SUSPENDED) { | ||
488 | if (!i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur) | ||
489 | i915->pmu.suspended_jiffies_last = | ||
490 | kdev->power.suspended_jiffies; | ||
479 | 491 | ||
480 | val = kdev->power.suspended_jiffies - | 492 | val = kdev->power.suspended_jiffies - |
481 | i915->pmu.suspended_jiffies_last; | 493 | i915->pmu.suspended_jiffies_last; |
482 | val += jiffies - kdev->power.accounting_timestamp; | 494 | val += jiffies - kdev->power.accounting_timestamp; |
483 | 495 | ||
484 | spin_unlock(&kdev->power.lock); | 496 | val = jiffies_to_nsecs(val); |
497 | val += i915->pmu.sample[__I915_SAMPLE_RC6].cur; | ||
485 | 498 | ||
486 | val = jiffies_to_nsecs(val); | 499 | i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur = val; |
487 | val += i915->pmu.sample[__I915_SAMPLE_RC6].cur; | 500 | } else if (i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur) { |
488 | i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur = val; | 501 | val = i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur; |
502 | } else { | ||
503 | val = i915->pmu.sample[__I915_SAMPLE_RC6].cur; | ||
504 | } | ||
489 | 505 | ||
506 | spin_unlock(&kdev->power.lock); | ||
490 | spin_unlock_irqrestore(&i915->pmu.lock, flags); | 507 | spin_unlock_irqrestore(&i915->pmu.lock, flags); |
491 | } | 508 | } |
492 | 509 | ||
diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c index 709d6ca68074..3ea566f99450 100644 --- a/drivers/gpu/drm/i915/intel_audio.c +++ b/drivers/gpu/drm/i915/intel_audio.c | |||
@@ -729,7 +729,7 @@ static void i915_audio_component_codec_wake_override(struct device *kdev, | |||
729 | struct drm_i915_private *dev_priv = kdev_to_i915(kdev); | 729 | struct drm_i915_private *dev_priv = kdev_to_i915(kdev); |
730 | u32 tmp; | 730 | u32 tmp; |
731 | 731 | ||
732 | if (!IS_GEN9_BC(dev_priv)) | 732 | if (!IS_GEN9(dev_priv)) |
733 | return; | 733 | return; |
734 | 734 | ||
735 | i915_audio_component_get_power(kdev); | 735 | i915_audio_component_get_power(kdev); |
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index c5c7530ba157..447b721c3be9 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c | |||
@@ -1256,7 +1256,6 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, | |||
1256 | return; | 1256 | return; |
1257 | 1257 | ||
1258 | aux_channel = child->aux_channel; | 1258 | aux_channel = child->aux_channel; |
1259 | ddc_pin = child->ddc_pin; | ||
1260 | 1259 | ||
1261 | is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; | 1260 | is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; |
1262 | is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; | 1261 | is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; |
@@ -1303,9 +1302,15 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, | |||
1303 | DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port)); | 1302 | DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port)); |
1304 | 1303 | ||
1305 | if (is_dvi) { | 1304 | if (is_dvi) { |
1306 | info->alternate_ddc_pin = map_ddc_pin(dev_priv, ddc_pin); | 1305 | ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin); |
1307 | 1306 | if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) { | |
1308 | sanitize_ddc_pin(dev_priv, port); | 1307 | info->alternate_ddc_pin = ddc_pin; |
1308 | sanitize_ddc_pin(dev_priv, port); | ||
1309 | } else { | ||
1310 | DRM_DEBUG_KMS("Port %c has invalid DDC pin %d, " | ||
1311 | "sticking to defaults\n", | ||
1312 | port_name(port), ddc_pin); | ||
1313 | } | ||
1309 | } | 1314 | } |
1310 | 1315 | ||
1311 | if (is_dp) { | 1316 | if (is_dp) { |
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 697af5add78b..e3a5f673ff67 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c | |||
@@ -577,6 +577,8 @@ static void execlists_dequeue(struct intel_engine_cs *engine) | |||
577 | * know the next preemption status we see corresponds | 577 | * know the next preemption status we see corresponds |
578 | * to this ELSP update. | 578 | * to this ELSP update. |
579 | */ | 579 | */ |
580 | GEM_BUG_ON(!execlists_is_active(execlists, | ||
581 | EXECLISTS_ACTIVE_USER)); | ||
580 | GEM_BUG_ON(!port_count(&port[0])); | 582 | GEM_BUG_ON(!port_count(&port[0])); |
581 | if (port_count(&port[0]) > 1) | 583 | if (port_count(&port[0]) > 1) |
582 | goto unlock; | 584 | goto unlock; |
@@ -738,6 +740,8 @@ execlists_cancel_port_requests(struct intel_engine_execlists * const execlists) | |||
738 | memset(port, 0, sizeof(*port)); | 740 | memset(port, 0, sizeof(*port)); |
739 | port++; | 741 | port++; |
740 | } | 742 | } |
743 | |||
744 | execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER); | ||
741 | } | 745 | } |
742 | 746 | ||
743 | static void execlists_cancel_requests(struct intel_engine_cs *engine) | 747 | static void execlists_cancel_requests(struct intel_engine_cs *engine) |
@@ -1001,6 +1005,11 @@ static void execlists_submission_tasklet(unsigned long data) | |||
1001 | 1005 | ||
1002 | if (fw) | 1006 | if (fw) |
1003 | intel_uncore_forcewake_put(dev_priv, execlists->fw_domains); | 1007 | intel_uncore_forcewake_put(dev_priv, execlists->fw_domains); |
1008 | |||
1009 | /* If the engine is now idle, so should be the flag; and vice versa. */ | ||
1010 | GEM_BUG_ON(execlists_is_active(&engine->execlists, | ||
1011 | EXECLISTS_ACTIVE_USER) == | ||
1012 | !port_isset(engine->execlists.port)); | ||
1004 | } | 1013 | } |
1005 | 1014 | ||
1006 | static void queue_request(struct intel_engine_cs *engine, | 1015 | static void queue_request(struct intel_engine_cs *engine, |