diff options
| -rw-r--r-- | arch/arm64/boot/dts/hisilicon/hip07.dtsi | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi index 5144eb1c179d..6077def65bec 100644 --- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi | |||
| @@ -1014,6 +1014,34 @@ | |||
| 1014 | compatible = "hisilicon,mbigen-v2"; | 1014 | compatible = "hisilicon,mbigen-v2"; |
| 1015 | reg = <0x0 0xa0080000 0x0 0x10000>; | 1015 | reg = <0x0 0xa0080000 0x0 0x10000>; |
| 1016 | 1016 | ||
| 1017 | mbigen_pcie2_a: intc_pcie2_a { | ||
| 1018 | msi-parent = <&p0_its_dsa_a 0x40087>; | ||
| 1019 | interrupt-controller; | ||
| 1020 | #interrupt-cells = <2>; | ||
| 1021 | num-pins = <10>; | ||
| 1022 | }; | ||
| 1023 | |||
| 1024 | mbigen_sas1: intc_sas1 { | ||
| 1025 | msi-parent = <&p0_its_dsa_a 0x40000>; | ||
| 1026 | interrupt-controller; | ||
| 1027 | #interrupt-cells = <2>; | ||
| 1028 | num-pins = <128>; | ||
| 1029 | }; | ||
| 1030 | |||
| 1031 | mbigen_sas2: intc_sas2 { | ||
| 1032 | msi-parent = <&p0_its_dsa_a 0x40040>; | ||
| 1033 | interrupt-controller; | ||
| 1034 | #interrupt-cells = <2>; | ||
| 1035 | num-pins = <128>; | ||
| 1036 | }; | ||
| 1037 | |||
| 1038 | mbigen_smmu_pcie: intc_smmu_pcie { | ||
| 1039 | msi-parent = <&p0_its_dsa_a 0x40b0c>; | ||
| 1040 | interrupt-controller; | ||
| 1041 | #interrupt-cells = <2>; | ||
| 1042 | num-pins = <3>; | ||
| 1043 | }; | ||
| 1044 | |||
| 1017 | mbigen_usb: intc_usb { | 1045 | mbigen_usb: intc_usb { |
| 1018 | msi-parent = <&p0_its_dsa_a 0x40080>; | 1046 | msi-parent = <&p0_its_dsa_a 0x40080>; |
| 1019 | interrupt-controller; | 1047 | interrupt-controller; |
| @@ -1022,6 +1050,39 @@ | |||
| 1022 | }; | 1050 | }; |
| 1023 | }; | 1051 | }; |
| 1024 | 1052 | ||
| 1053 | p0_mbigen_dsa_a: interrupt-controller@c0080000 { | ||
| 1054 | compatible = "hisilicon,mbigen-v2"; | ||
| 1055 | reg = <0x0 0xc0080000 0x0 0x10000>; | ||
| 1056 | |||
| 1057 | mbigen_dsaf0: intc_dsaf0 { | ||
| 1058 | msi-parent = <&p0_its_dsa_a 0x40800>; | ||
| 1059 | interrupt-controller; | ||
| 1060 | #interrupt-cells = <2>; | ||
| 1061 | num-pins = <409>; | ||
| 1062 | }; | ||
| 1063 | |||
| 1064 | mbigen_dsa_roce: intc-roce { | ||
| 1065 | msi-parent = <&p0_its_dsa_a 0x40B1E>; | ||
| 1066 | interrupt-controller; | ||
| 1067 | #interrupt-cells = <2>; | ||
| 1068 | num-pins = <34>; | ||
| 1069 | }; | ||
| 1070 | |||
| 1071 | mbigen_sas0: intc-sas0 { | ||
| 1072 | msi-parent = <&p0_its_dsa_a 0x40900>; | ||
| 1073 | interrupt-controller; | ||
| 1074 | #interrupt-cells = <2>; | ||
| 1075 | num-pins = <128>; | ||
| 1076 | }; | ||
| 1077 | |||
| 1078 | mbigen_smmu_dsa: intc_smmu_dsa { | ||
| 1079 | msi-parent = <&p0_its_dsa_a 0x40b20>; | ||
| 1080 | interrupt-controller; | ||
| 1081 | #interrupt-cells = <2>; | ||
| 1082 | num-pins = <3>; | ||
| 1083 | }; | ||
| 1084 | }; | ||
| 1085 | |||
| 1025 | soc { | 1086 | soc { |
| 1026 | compatible = "simple-bus"; | 1087 | compatible = "simple-bus"; |
| 1027 | #address-cells = <2>; | 1088 | #address-cells = <2>; |
