aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c13
1 files changed, 0 insertions, 13 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 550e3bd923b2..3bc314872304 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1787,8 +1787,6 @@ static int fill_plane_attributes_from_fb(struct amdgpu_device *adev,
1787 const struct amdgpu_framebuffer *amdgpu_fb) 1787 const struct amdgpu_framebuffer *amdgpu_fb)
1788{ 1788{
1789 uint64_t tiling_flags; 1789 uint64_t tiling_flags;
1790 uint64_t fb_location = 0;
1791 uint64_t chroma_addr = 0;
1792 unsigned int awidth; 1790 unsigned int awidth;
1793 const struct drm_framebuffer *fb = &amdgpu_fb->base; 1791 const struct drm_framebuffer *fb = &amdgpu_fb->base;
1794 int ret = 0; 1792 int ret = 0;
@@ -1834,8 +1832,6 @@ static int fill_plane_attributes_from_fb(struct amdgpu_device *adev,
1834 1832
1835 if (plane_state->format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) { 1833 if (plane_state->format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) {
1836 plane_state->address.type = PLN_ADDR_TYPE_GRAPHICS; 1834 plane_state->address.type = PLN_ADDR_TYPE_GRAPHICS;
1837 plane_state->address.grph.addr.low_part = lower_32_bits(fb_location);
1838 plane_state->address.grph.addr.high_part = upper_32_bits(fb_location);
1839 plane_state->plane_size.grph.surface_size.x = 0; 1835 plane_state->plane_size.grph.surface_size.x = 0;
1840 plane_state->plane_size.grph.surface_size.y = 0; 1836 plane_state->plane_size.grph.surface_size.y = 0;
1841 plane_state->plane_size.grph.surface_size.width = fb->width; 1837 plane_state->plane_size.grph.surface_size.width = fb->width;
@@ -1848,15 +1844,6 @@ static int fill_plane_attributes_from_fb(struct amdgpu_device *adev,
1848 } else { 1844 } else {
1849 awidth = ALIGN(fb->width, 64); 1845 awidth = ALIGN(fb->width, 64);
1850 plane_state->address.type = PLN_ADDR_TYPE_VIDEO_PROGRESSIVE; 1846 plane_state->address.type = PLN_ADDR_TYPE_VIDEO_PROGRESSIVE;
1851 plane_state->address.video_progressive.luma_addr.low_part
1852 = lower_32_bits(fb_location);
1853 plane_state->address.video_progressive.luma_addr.high_part
1854 = upper_32_bits(fb_location);
1855 chroma_addr = fb_location + (u64)(awidth * fb->height);
1856 plane_state->address.video_progressive.chroma_addr.low_part
1857 = lower_32_bits(chroma_addr);
1858 plane_state->address.video_progressive.chroma_addr.high_part
1859 = upper_32_bits(chroma_addr);
1860 plane_state->plane_size.video.luma_size.x = 0; 1847 plane_state->plane_size.video.luma_size.x = 0;
1861 plane_state->plane_size.video.luma_size.y = 0; 1848 plane_state->plane_size.video.luma_size.y = 0;
1862 plane_state->plane_size.video.luma_size.width = awidth; 1849 plane_state->plane_size.video.luma_size.width = awidth;