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-rw-r--r--arch/x86/ras/mce_amd_inj.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/x86/ras/mce_amd_inj.c b/arch/x86/ras/mce_amd_inj.c
index 1104515d5ad2..ff8eb1a9ce6d 100644
--- a/arch/x86/ras/mce_amd_inj.c
+++ b/arch/x86/ras/mce_amd_inj.c
@@ -68,6 +68,7 @@ static int inj_##reg##_set(void *data, u64 val) \
68MCE_INJECT_SET(status); 68MCE_INJECT_SET(status);
69MCE_INJECT_SET(misc); 69MCE_INJECT_SET(misc);
70MCE_INJECT_SET(addr); 70MCE_INJECT_SET(addr);
71MCE_INJECT_SET(synd);
71 72
72#define MCE_INJECT_GET(reg) \ 73#define MCE_INJECT_GET(reg) \
73static int inj_##reg##_get(void *data, u64 *val) \ 74static int inj_##reg##_get(void *data, u64 *val) \
@@ -81,10 +82,12 @@ static int inj_##reg##_get(void *data, u64 *val) \
81MCE_INJECT_GET(status); 82MCE_INJECT_GET(status);
82MCE_INJECT_GET(misc); 83MCE_INJECT_GET(misc);
83MCE_INJECT_GET(addr); 84MCE_INJECT_GET(addr);
85MCE_INJECT_GET(synd);
84 86
85DEFINE_SIMPLE_ATTRIBUTE(status_fops, inj_status_get, inj_status_set, "%llx\n"); 87DEFINE_SIMPLE_ATTRIBUTE(status_fops, inj_status_get, inj_status_set, "%llx\n");
86DEFINE_SIMPLE_ATTRIBUTE(misc_fops, inj_misc_get, inj_misc_set, "%llx\n"); 88DEFINE_SIMPLE_ATTRIBUTE(misc_fops, inj_misc_get, inj_misc_set, "%llx\n");
87DEFINE_SIMPLE_ATTRIBUTE(addr_fops, inj_addr_get, inj_addr_set, "%llx\n"); 89DEFINE_SIMPLE_ATTRIBUTE(addr_fops, inj_addr_get, inj_addr_set, "%llx\n");
90DEFINE_SIMPLE_ATTRIBUTE(synd_fops, inj_synd_get, inj_synd_set, "%llx\n");
88 91
89/* 92/*
90 * Caller needs to be make sure this cpu doesn't disappear 93 * Caller needs to be make sure this cpu doesn't disappear
@@ -258,6 +261,7 @@ static void prepare_msrs(void *info)
258 } 261 }
259 262
260 wrmsrl(MSR_AMD64_SMCA_MCx_MISC(b), i_mce.misc); 263 wrmsrl(MSR_AMD64_SMCA_MCx_MISC(b), i_mce.misc);
264 wrmsrl(MSR_AMD64_SMCA_MCx_SYND(b), i_mce.synd);
261 } else { 265 } else {
262 wrmsrl(MSR_IA32_MCx_STATUS(b), i_mce.status); 266 wrmsrl(MSR_IA32_MCx_STATUS(b), i_mce.status);
263 wrmsrl(MSR_IA32_MCx_ADDR(b), i_mce.addr); 267 wrmsrl(MSR_IA32_MCx_ADDR(b), i_mce.addr);
@@ -275,6 +279,9 @@ static void do_inject(void)
275 if (i_mce.misc) 279 if (i_mce.misc)
276 i_mce.status |= MCI_STATUS_MISCV; 280 i_mce.status |= MCI_STATUS_MISCV;
277 281
282 if (i_mce.synd)
283 i_mce.status |= MCI_STATUS_SYNDV;
284
278 if (inj_type == SW_INJ) { 285 if (inj_type == SW_INJ) {
279 mce_inject_log(&i_mce); 286 mce_inject_log(&i_mce);
280 return; 287 return;
@@ -371,6 +378,9 @@ static const char readme_msg[] =
371"\t used for error thresholding purposes and its validity is indicated by\n" 378"\t used for error thresholding purposes and its validity is indicated by\n"
372"\t MCi_STATUS[MiscV].\n" 379"\t MCi_STATUS[MiscV].\n"
373"\n" 380"\n"
381"synd:\t Set MCi_SYND: provide syndrome info about the error. Only valid on\n"
382"\t Scalable MCA systems, and its validity is indicated by MCi_STATUS[SyndV].\n"
383"\n"
374"addr:\t Error address value to be written to MCi_ADDR. Log address information\n" 384"addr:\t Error address value to be written to MCi_ADDR. Log address information\n"
375"\t associated with the error.\n" 385"\t associated with the error.\n"
376"\n" 386"\n"
@@ -420,6 +430,7 @@ static struct dfs_node {
420 { .name = "status", .fops = &status_fops, .perm = S_IRUSR | S_IWUSR }, 430 { .name = "status", .fops = &status_fops, .perm = S_IRUSR | S_IWUSR },
421 { .name = "misc", .fops = &misc_fops, .perm = S_IRUSR | S_IWUSR }, 431 { .name = "misc", .fops = &misc_fops, .perm = S_IRUSR | S_IWUSR },
422 { .name = "addr", .fops = &addr_fops, .perm = S_IRUSR | S_IWUSR }, 432 { .name = "addr", .fops = &addr_fops, .perm = S_IRUSR | S_IWUSR },
433 { .name = "synd", .fops = &synd_fops, .perm = S_IRUSR | S_IWUSR },
423 { .name = "bank", .fops = &bank_fops, .perm = S_IRUSR | S_IWUSR }, 434 { .name = "bank", .fops = &bank_fops, .perm = S_IRUSR | S_IWUSR },
424 { .name = "flags", .fops = &flags_fops, .perm = S_IRUSR | S_IWUSR }, 435 { .name = "flags", .fops = &flags_fops, .perm = S_IRUSR | S_IWUSR },
425 { .name = "cpu", .fops = &extcpu_fops, .perm = S_IRUSR | S_IWUSR }, 436 { .name = "cpu", .fops = &extcpu_fops, .perm = S_IRUSR | S_IWUSR },