diff options
| -rw-r--r-- | drivers/parisc/lba_pci.c | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c index 41b740aed3a3..69bd98421eb1 100644 --- a/drivers/parisc/lba_pci.c +++ b/drivers/parisc/lba_pci.c | |||
| @@ -1403,9 +1403,27 @@ lba_hw_init(struct lba_device *d) | |||
| 1403 | WRITE_REG32(stat, d->hba.base_addr + LBA_ERROR_CONFIG); | 1403 | WRITE_REG32(stat, d->hba.base_addr + LBA_ERROR_CONFIG); |
| 1404 | } | 1404 | } |
| 1405 | 1405 | ||
| 1406 | /* Set HF mode as the default (vs. -1 mode). */ | 1406 | |
| 1407 | /* | ||
| 1408 | * Hard Fail vs. Soft Fail on PCI "Master Abort". | ||
| 1409 | * | ||
| 1410 | * "Master Abort" means the MMIO transaction timed out - usually due to | ||
| 1411 | * the device not responding to an MMIO read. We would like HF to be | ||
| 1412 | * enabled to find driver problems, though it means the system will | ||
| 1413 | * crash with a HPMC. | ||
| 1414 | * | ||
| 1415 | * In SoftFail mode "~0L" is returned as a result of a timeout on the | ||
| 1416 | * pci bus. This is like how PCI busses on x86 and most other | ||
| 1417 | * architectures behave. In order to increase compatibility with | ||
| 1418 | * existing (x86) PCI hardware and existing Linux drivers we enable | ||
| 1419 | * Soft Faul mode on PA-RISC now too. | ||
| 1420 | */ | ||
| 1407 | stat = READ_REG32(d->hba.base_addr + LBA_STAT_CTL); | 1421 | stat = READ_REG32(d->hba.base_addr + LBA_STAT_CTL); |
| 1422 | #if defined(ENABLE_HARDFAIL) | ||
| 1408 | WRITE_REG32(stat | HF_ENABLE, d->hba.base_addr + LBA_STAT_CTL); | 1423 | WRITE_REG32(stat | HF_ENABLE, d->hba.base_addr + LBA_STAT_CTL); |
| 1424 | #else | ||
| 1425 | WRITE_REG32(stat & ~HF_ENABLE, d->hba.base_addr + LBA_STAT_CTL); | ||
| 1426 | #endif | ||
| 1409 | 1427 | ||
| 1410 | /* | 1428 | /* |
| 1411 | ** Writing a zero to STAT_CTL.rf (bit 0) will clear reset signal | 1429 | ** Writing a zero to STAT_CTL.rf (bit 0) will clear reset signal |
