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-rw-r--r--arch/arc/boot/dts/axc001.dtsi6
-rw-r--r--arch/arc/boot/dts/axc003.dtsi6
-rw-r--r--arch/arc/boot/dts/axc003_idu.dtsi6
-rw-r--r--arch/arc/boot/dts/nsim_700.dts6
-rw-r--r--arch/arc/boot/dts/nsim_hs.dts6
-rw-r--r--arch/arc/boot/dts/nsim_hs_idu.dts6
-rw-r--r--arch/arc/boot/dts/nsimosci.dts6
-rw-r--r--arch/arc/boot/dts/nsimosci_hs.dts6
-rw-r--r--arch/arc/boot/dts/nsimosci_hs_idu.dts6
-rw-r--r--arch/arc/boot/dts/vdk_axc003.dtsi6
-rw-r--r--arch/arc/boot/dts/vdk_axc003_idu.dtsi6
-rw-r--r--arch/arc/plat-axs10x/axs10x.c14
12 files changed, 79 insertions, 1 deletions
diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi
index e7a83d19c5a3..40bcecfc3687 100644
--- a/arch/arc/boot/dts/axc001.dtsi
+++ b/arch/arc/boot/dts/axc001.dtsi
@@ -26,6 +26,12 @@
26 26
27 ranges = <0x00000000 0xf0000000 0x10000000>; 27 ranges = <0x00000000 0xf0000000 0x10000000>;
28 28
29 core_clk: core_clk {
30 #clock-cells = <0>;
31 compatible = "fixed-clock";
32 clock-frequency = <750000000>;
33 };
34
29 core_intc: arc700-intc@cpu { 35 core_intc: arc700-intc@cpu {
30 compatible = "snps,arc700-intc"; 36 compatible = "snps,arc700-intc";
31 interrupt-controller; 37 interrupt-controller;
diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
index b0e3ccdf8fc7..cabe0deeb2d8 100644
--- a/arch/arc/boot/dts/axc003.dtsi
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -25,6 +25,12 @@
25 25
26 ranges = <0x00000000 0xf0000000 0x10000000>; 26 ranges = <0x00000000 0xf0000000 0x10000000>;
27 27
28 core_clk: core_clk {
29 #clock-cells = <0>;
30 compatible = "fixed-clock";
31 clock-frequency = <90000000>;
32 };
33
28 core_intc: archs-intc@cpu { 34 core_intc: archs-intc@cpu {
29 compatible = "snps,archs-intc"; 35 compatible = "snps,archs-intc";
30 interrupt-controller; 36 interrupt-controller;
diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi
index f87ae409c8ed..8955881db794 100644
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -25,6 +25,12 @@
25 25
26 ranges = <0x00000000 0xf0000000 0x10000000>; 26 ranges = <0x00000000 0xf0000000 0x10000000>;
27 27
28 core_clk: core_clk {
29 #clock-cells = <0>;
30 compatible = "fixed-clock";
31 clock-frequency = <90000000>;
32 };
33
28 core_intc: archs-intc@cpu { 34 core_intc: archs-intc@cpu {
29 compatible = "snps,archs-intc"; 35 compatible = "snps,archs-intc";
30 interrupt-controller; 36 interrupt-controller;
diff --git a/arch/arc/boot/dts/nsim_700.dts b/arch/arc/boot/dts/nsim_700.dts
index 987921f711c1..5d5e373e0ebc 100644
--- a/arch/arc/boot/dts/nsim_700.dts
+++ b/arch/arc/boot/dts/nsim_700.dts
@@ -32,6 +32,12 @@
32 /* child and parent address space 1:1 mapped */ 32 /* child and parent address space 1:1 mapped */
33 ranges; 33 ranges;
34 34
35 core_clk: core_clk {
36 #clock-cells = <0>;
37 compatible = "fixed-clock";
38 clock-frequency = <80000000>;
39 };
40
35 core_intc: interrupt-controller { 41 core_intc: interrupt-controller {
36 compatible = "snps,arc700-intc"; 42 compatible = "snps,arc700-intc";
37 interrupt-controller; 43 interrupt-controller;
diff --git a/arch/arc/boot/dts/nsim_hs.dts b/arch/arc/boot/dts/nsim_hs.dts
index d2f60f826bd2..bf05fe5f67b0 100644
--- a/arch/arc/boot/dts/nsim_hs.dts
+++ b/arch/arc/boot/dts/nsim_hs.dts
@@ -39,6 +39,12 @@
39 bus addr, parent bus addr, size */ 39 bus addr, parent bus addr, size */
40 ranges = <0x80000000 0x0 0x80000000 0x80000000>; 40 ranges = <0x80000000 0x0 0x80000000 0x80000000>;
41 41
42 core_clk: core_clk {
43 #clock-cells = <0>;
44 compatible = "fixed-clock";
45 clock-frequency = <80000000>;
46 };
47
42 core_intc: core-interrupt-controller { 48 core_intc: core-interrupt-controller {
43 compatible = "snps,archs-intc"; 49 compatible = "snps,archs-intc";
44 interrupt-controller; 50 interrupt-controller;
diff --git a/arch/arc/boot/dts/nsim_hs_idu.dts b/arch/arc/boot/dts/nsim_hs_idu.dts
index cc82781727a1..99eabe1a2bf6 100644
--- a/arch/arc/boot/dts/nsim_hs_idu.dts
+++ b/arch/arc/boot/dts/nsim_hs_idu.dts
@@ -29,6 +29,12 @@
29 /* child and parent address space 1:1 mapped */ 29 /* child and parent address space 1:1 mapped */
30 ranges; 30 ranges;
31 31
32 core_clk: core_clk {
33 #clock-cells = <0>;
34 compatible = "fixed-clock";
35 clock-frequency = <80000000>;
36 };
37
32 core_intc: core-interrupt-controller { 38 core_intc: core-interrupt-controller {
33 compatible = "snps,archs-intc"; 39 compatible = "snps,archs-intc";
34 interrupt-controller; 40 interrupt-controller;
diff --git a/arch/arc/boot/dts/nsimosci.dts b/arch/arc/boot/dts/nsimosci.dts
index d5a6dd9084a8..b5b060adce8a 100644
--- a/arch/arc/boot/dts/nsimosci.dts
+++ b/arch/arc/boot/dts/nsimosci.dts
@@ -35,6 +35,12 @@
35 /* child and parent address space 1:1 mapped */ 35 /* child and parent address space 1:1 mapped */
36 ranges; 36 ranges;
37 37
38 core_clk: core_clk {
39 #clock-cells = <0>;
40 compatible = "fixed-clock";
41 clock-frequency = <20000000>;
42 };
43
38 core_intc: interrupt-controller { 44 core_intc: interrupt-controller {
39 compatible = "snps,arc700-intc"; 45 compatible = "snps,arc700-intc";
40 interrupt-controller; 46 interrupt-controller;
diff --git a/arch/arc/boot/dts/nsimosci_hs.dts b/arch/arc/boot/dts/nsimosci_hs.dts
index 983f6915d4ae..325e73090a18 100644
--- a/arch/arc/boot/dts/nsimosci_hs.dts
+++ b/arch/arc/boot/dts/nsimosci_hs.dts
@@ -35,6 +35,12 @@
35 /* child and parent address space 1:1 mapped */ 35 /* child and parent address space 1:1 mapped */
36 ranges; 36 ranges;
37 37
38 core_clk: core_clk {
39 #clock-cells = <0>;
40 compatible = "fixed-clock";
41 clock-frequency = <20000000>;
42 };
43
38 core_intc: core-interrupt-controller { 44 core_intc: core-interrupt-controller {
39 compatible = "snps,archs-intc"; 45 compatible = "snps,archs-intc";
40 interrupt-controller; 46 interrupt-controller;
diff --git a/arch/arc/boot/dts/nsimosci_hs_idu.dts b/arch/arc/boot/dts/nsimosci_hs_idu.dts
index fd675303f792..ee03d7126581 100644
--- a/arch/arc/boot/dts/nsimosci_hs_idu.dts
+++ b/arch/arc/boot/dts/nsimosci_hs_idu.dts
@@ -33,6 +33,12 @@
33 /* child and parent address space 1:1 mapped */ 33 /* child and parent address space 1:1 mapped */
34 ranges; 34 ranges;
35 35
36 core_clk: core_clk {
37 #clock-cells = <0>;
38 compatible = "fixed-clock";
39 clock-frequency = <5000000>;
40 };
41
36 core_intc: core-interrupt-controller { 42 core_intc: core-interrupt-controller {
37 compatible = "snps,archs-intc"; 43 compatible = "snps,archs-intc";
38 interrupt-controller; 44 interrupt-controller;
diff --git a/arch/arc/boot/dts/vdk_axc003.dtsi b/arch/arc/boot/dts/vdk_axc003.dtsi
index 035759ee62a5..ad4ee43bd2ac 100644
--- a/arch/arc/boot/dts/vdk_axc003.dtsi
+++ b/arch/arc/boot/dts/vdk_axc003.dtsi
@@ -25,6 +25,12 @@
25 25
26 ranges = <0x00000000 0xf0000000 0x10000000>; 26 ranges = <0x00000000 0xf0000000 0x10000000>;
27 27
28 core_clk: core_clk {
29 #clock-cells = <0>;
30 compatible = "fixed-clock";
31 clock-frequency = <50000000>;
32 };
33
28 core_intc: archs-intc@cpu { 34 core_intc: archs-intc@cpu {
29 compatible = "snps,archs-intc"; 35 compatible = "snps,archs-intc";
30 interrupt-controller; 36 interrupt-controller;
diff --git a/arch/arc/boot/dts/vdk_axc003_idu.dtsi b/arch/arc/boot/dts/vdk_axc003_idu.dtsi
index 90e18f404889..a3cb6263c581 100644
--- a/arch/arc/boot/dts/vdk_axc003_idu.dtsi
+++ b/arch/arc/boot/dts/vdk_axc003_idu.dtsi
@@ -26,6 +26,12 @@
26 26
27 ranges = <0x00000000 0xf0000000 0x10000000>; 27 ranges = <0x00000000 0xf0000000 0x10000000>;
28 28
29 core_clk: core_clk {
30 #clock-cells = <0>;
31 compatible = "fixed-clock";
32 clock-frequency = <50000000>;
33 };
34
29 core_intc: archs-intc@cpu { 35 core_intc: archs-intc@cpu {
30 compatible = "snps,archs-intc"; 36 compatible = "snps,archs-intc";
31 interrupt-controller; 37 interrupt-controller;
diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
index 8e7f50a8b857..f90fac271d16 100644
--- a/arch/arc/plat-axs10x/axs10x.c
+++ b/arch/arc/plat-axs10x/axs10x.c
@@ -14,7 +14,9 @@
14 * 14 *
15 */ 15 */
16 16
17#include <linux/of_fdt.h>
17#include <linux/of_platform.h> 18#include <linux/of_platform.h>
19#include <linux/libfdt.h>
18 20
19#include <asm/asm-offsets.h> 21#include <asm/asm-offsets.h>
20#include <asm/clk.h> 22#include <asm/clk.h>
@@ -389,7 +391,12 @@ axs103_set_freq(unsigned int id, unsigned int fd, unsigned int od)
389 391
390static void __init axs103_early_init(void) 392static void __init axs103_early_init(void)
391{ 393{
392 u32 freq = arc_get_core_freq(), orig = freq; 394 int offset = fdt_path_offset(initial_boot_params, "/cpu_card/core_clk");
395 const struct fdt_property *prop = fdt_get_property(initial_boot_params,
396 offset,
397 "clock-frequency",
398 NULL);
399 u32 freq = be32_to_cpu(*(u32*)(prop->data)) / 1000000, orig = freq;
393 400
394 /* 401 /*
395 * AXS103 configurations for SMP/QUAD configurations share device tree 402 * AXS103 configurations for SMP/QUAD configurations share device tree
@@ -438,8 +445,13 @@ static void __init axs103_early_init(void)
438 } 445 }
439 446
440 pr_info("Freq is %dMHz\n", freq); 447 pr_info("Freq is %dMHz\n", freq);
448
449 /* Patching .dtb in-place with new core clock value */
441 if (freq != orig ) { 450 if (freq != orig ) {
442 arc_set_core_freq(freq * 1000000); 451 arc_set_core_freq(freq * 1000000);
452 freq = cpu_to_be32(freq * 1000000);
453 fdt_setprop_inplace(initial_boot_params, offset,
454 "clock-frequency", &freq, sizeof(freq));
443 } 455 }
444 456
445 /* Memory maps already config in pre-bootloader */ 457 /* Memory maps already config in pre-bootloader */
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-01 11:16:47 -0400