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-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7795.c171
1 files changed, 86 insertions, 85 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
index 6ba7ed15a461..3d1c32cca16a 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
@@ -3101,6 +3101,55 @@ static const unsigned int pwm6_b_mux[] = {
3101 PWM6_B_MARK, 3101 PWM6_B_MARK,
3102}; 3102};
3103 3103
3104/* - QSPI0 ------------------------------------------------------------------ */
3105static const unsigned int qspi0_ctrl_pins[] = {
3106 /* QSPI0_SPCLK, QSPI0_SSL */
3107 PIN_NUMBER('W', 3), PIN_NUMBER('Y', 3),
3108};
3109static const unsigned int qspi0_ctrl_mux[] = {
3110 QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
3111};
3112static const unsigned int qspi0_data2_pins[] = {
3113 /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
3114 PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
3115};
3116static const unsigned int qspi0_data2_mux[] = {
3117 QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
3118};
3119static const unsigned int qspi0_data4_pins[] = {
3120 /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1, QSPI0_IO2, QSPI0_IO3 */
3121 PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
3122 PIN_NUMBER('Y', 6), PIN_A_NUMBER('B', 6),
3123};
3124static const unsigned int qspi0_data4_mux[] = {
3125 QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
3126 QSPI0_IO2_MARK, QSPI0_IO3_MARK,
3127};
3128/* - QSPI1 ------------------------------------------------------------------ */
3129static const unsigned int qspi1_ctrl_pins[] = {
3130 /* QSPI1_SPCLK, QSPI1_SSL */
3131 PIN_NUMBER('V', 3), PIN_NUMBER('V', 5),
3132};
3133static const unsigned int qspi1_ctrl_mux[] = {
3134 QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
3135};
3136static const unsigned int qspi1_data2_pins[] = {
3137 /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
3138 PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
3139};
3140static const unsigned int qspi1_data2_mux[] = {
3141 QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
3142};
3143static const unsigned int qspi1_data4_pins[] = {
3144 /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1, QSPI1_IO2, QSPI1_IO3 */
3145 PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
3146 PIN_A_NUMBER('E', 4), PIN_A_NUMBER('C', 3),
3147};
3148static const unsigned int qspi1_data4_mux[] = {
3149 QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
3150 QSPI1_IO2_MARK, QSPI1_IO3_MARK,
3151};
3152
3104/* - SATA --------------------------------------------------------------------*/ 3153/* - SATA --------------------------------------------------------------------*/
3105static const unsigned int sata0_devslp_a_pins[] = { 3154static const unsigned int sata0_devslp_a_pins[] = {
3106 /* DEVSLP */ 3155 /* DEVSLP */
@@ -3299,6 +3348,23 @@ static const unsigned int scif5_clk_pins[] = {
3299static const unsigned int scif5_clk_mux[] = { 3348static const unsigned int scif5_clk_mux[] = {
3300 SCK5_MARK, 3349 SCK5_MARK,
3301}; 3350};
3351
3352/* - SCIF Clock ------------------------------------------------------------- */
3353static const unsigned int scif_clk_a_pins[] = {
3354 /* SCIF_CLK */
3355 RCAR_GP_PIN(6, 23),
3356};
3357static const unsigned int scif_clk_a_mux[] = {
3358 SCIF_CLK_A_MARK,
3359};
3360static const unsigned int scif_clk_b_pins[] = {
3361 /* SCIF_CLK */
3362 RCAR_GP_PIN(5, 9),
3363};
3364static const unsigned int scif_clk_b_mux[] = {
3365 SCIF_CLK_B_MARK,
3366};
3367
3302/* - SDHI0 ------------------------------------------------------------------ */ 3368/* - SDHI0 ------------------------------------------------------------------ */
3303static const unsigned int sdhi0_data1_pins[] = { 3369static const unsigned int sdhi0_data1_pins[] = {
3304 /* D0 */ 3370 /* D0 */
@@ -3506,22 +3572,6 @@ static const unsigned int sdhi3_ds_mux[] = {
3506 SD3_DS_MARK, 3572 SD3_DS_MARK,
3507}; 3573};
3508 3574
3509/* - SCIF Clock ------------------------------------------------------------- */
3510static const unsigned int scif_clk_a_pins[] = {
3511 /* SCIF_CLK */
3512 RCAR_GP_PIN(6, 23),
3513};
3514static const unsigned int scif_clk_a_mux[] = {
3515 SCIF_CLK_A_MARK,
3516};
3517static const unsigned int scif_clk_b_pins[] = {
3518 /* SCIF_CLK */
3519 RCAR_GP_PIN(5, 9),
3520};
3521static const unsigned int scif_clk_b_mux[] = {
3522 SCIF_CLK_B_MARK,
3523};
3524
3525/* - SSI -------------------------------------------------------------------- */ 3575/* - SSI -------------------------------------------------------------------- */
3526static const unsigned int ssi0_data_pins[] = { 3576static const unsigned int ssi0_data_pins[] = {
3527 /* SDATA */ 3577 /* SDATA */
@@ -3724,55 +3774,6 @@ static const unsigned int usb2_mux[] = {
3724 USB2_PWEN_MARK, USB2_OVC_MARK, 3774 USB2_PWEN_MARK, USB2_OVC_MARK,
3725}; 3775};
3726 3776
3727/* - QSPI0 ------------------------------------------------------------------ */
3728static const unsigned int qspi0_ctrl_pins[] = {
3729 /* QSPI0_SPCLK, QSPI0_SSL */
3730 PIN_NUMBER('W', 3), PIN_NUMBER('Y', 3),
3731};
3732static const unsigned int qspi0_ctrl_mux[] = {
3733 QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
3734};
3735static const unsigned int qspi0_data2_pins[] = {
3736 /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
3737 PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
3738};
3739static const unsigned int qspi0_data2_mux[] = {
3740 QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
3741};
3742static const unsigned int qspi0_data4_pins[] = {
3743 /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1, QSPI0_IO2, QSPI0_IO3 */
3744 PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
3745 PIN_NUMBER('Y', 6), PIN_A_NUMBER('B', 6),
3746};
3747static const unsigned int qspi0_data4_mux[] = {
3748 QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
3749 QSPI0_IO2_MARK, QSPI0_IO3_MARK,
3750};
3751/* - QSPI1 ------------------------------------------------------------------ */
3752static const unsigned int qspi1_ctrl_pins[] = {
3753 /* QSPI1_SPCLK, QSPI1_SSL */
3754 PIN_NUMBER('V', 3), PIN_NUMBER('V', 5),
3755};
3756static const unsigned int qspi1_ctrl_mux[] = {
3757 QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
3758};
3759static const unsigned int qspi1_data2_pins[] = {
3760 /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
3761 PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
3762};
3763static const unsigned int qspi1_data2_mux[] = {
3764 QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
3765};
3766static const unsigned int qspi1_data4_pins[] = {
3767 /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1, QSPI1_IO2, QSPI1_IO3 */
3768 PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
3769 PIN_A_NUMBER('E', 4), PIN_A_NUMBER('C', 3),
3770};
3771static const unsigned int qspi1_data4_mux[] = {
3772 QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
3773 QSPI1_IO2_MARK, QSPI1_IO3_MARK,
3774};
3775
3776static const struct sh_pfc_pin_group pinmux_groups[] = { 3777static const struct sh_pfc_pin_group pinmux_groups[] = {
3777 SH_PFC_PIN_GROUP(audio_clk_a_a), 3778 SH_PFC_PIN_GROUP(audio_clk_a_a),
3778 SH_PFC_PIN_GROUP(audio_clk_a_b), 3779 SH_PFC_PIN_GROUP(audio_clk_a_b),
@@ -3990,6 +3991,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
3990 SH_PFC_PIN_GROUP(pwm5_b), 3991 SH_PFC_PIN_GROUP(pwm5_b),
3991 SH_PFC_PIN_GROUP(pwm6_a), 3992 SH_PFC_PIN_GROUP(pwm6_a),
3992 SH_PFC_PIN_GROUP(pwm6_b), 3993 SH_PFC_PIN_GROUP(pwm6_b),
3994 SH_PFC_PIN_GROUP(qspi0_ctrl),
3995 SH_PFC_PIN_GROUP(qspi0_data2),
3996 SH_PFC_PIN_GROUP(qspi0_data4),
3997 SH_PFC_PIN_GROUP(qspi1_ctrl),
3998 SH_PFC_PIN_GROUP(qspi1_data2),
3999 SH_PFC_PIN_GROUP(qspi1_data4),
3993 SH_PFC_PIN_GROUP(sata0_devslp_a), 4000 SH_PFC_PIN_GROUP(sata0_devslp_a),
3994 SH_PFC_PIN_GROUP(sata0_devslp_b), 4001 SH_PFC_PIN_GROUP(sata0_devslp_b),
3995 SH_PFC_PIN_GROUP(scif0_data), 4002 SH_PFC_PIN_GROUP(scif0_data),
@@ -4073,12 +4080,6 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
4073 SH_PFC_PIN_GROUP(usb0), 4080 SH_PFC_PIN_GROUP(usb0),
4074 SH_PFC_PIN_GROUP(usb1), 4081 SH_PFC_PIN_GROUP(usb1),
4075 SH_PFC_PIN_GROUP(usb2), 4082 SH_PFC_PIN_GROUP(usb2),
4076 SH_PFC_PIN_GROUP(qspi0_ctrl),
4077 SH_PFC_PIN_GROUP(qspi0_data2),
4078 SH_PFC_PIN_GROUP(qspi0_data4),
4079 SH_PFC_PIN_GROUP(qspi1_ctrl),
4080 SH_PFC_PIN_GROUP(qspi1_data2),
4081 SH_PFC_PIN_GROUP(qspi1_data4),
4082}; 4083};
4083 4084
4084static const char * const audio_clk_groups[] = { 4085static const char * const audio_clk_groups[] = {
@@ -4393,6 +4394,18 @@ static const char * const pwm6_groups[] = {
4393 "pwm6_b", 4394 "pwm6_b",
4394}; 4395};
4395 4396
4397static const char * const qspi0_groups[] = {
4398 "qspi0_ctrl",
4399 "qspi0_data2",
4400 "qspi0_data4",
4401};
4402
4403static const char * const qspi1_groups[] = {
4404 "qspi1_ctrl",
4405 "qspi1_data2",
4406 "qspi1_data4",
4407};
4408
4396static const char * const sata0_groups[] = { 4409static const char * const sata0_groups[] = {
4397 "sata0_devslp_a", 4410 "sata0_devslp_a",
4398 "sata0_devslp_b", 4411 "sata0_devslp_b",
@@ -4524,18 +4537,6 @@ static const char * const usb2_groups[] = {
4524 "usb2", 4537 "usb2",
4525}; 4538};
4526 4539
4527static const char * const qspi0_groups[] = {
4528 "qspi0_ctrl",
4529 "qspi0_data2",
4530 "qspi0_data4",
4531};
4532
4533static const char * const qspi1_groups[] = {
4534 "qspi1_ctrl",
4535 "qspi1_data2",
4536 "qspi1_data4",
4537};
4538
4539static const struct sh_pfc_function pinmux_functions[] = { 4540static const struct sh_pfc_function pinmux_functions[] = {
4540 SH_PFC_FUNCTION(audio_clk), 4541 SH_PFC_FUNCTION(audio_clk),
4541 SH_PFC_FUNCTION(avb), 4542 SH_PFC_FUNCTION(avb),
@@ -4569,6 +4570,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
4569 SH_PFC_FUNCTION(pwm4), 4570 SH_PFC_FUNCTION(pwm4),
4570 SH_PFC_FUNCTION(pwm5), 4571 SH_PFC_FUNCTION(pwm5),
4571 SH_PFC_FUNCTION(pwm6), 4572 SH_PFC_FUNCTION(pwm6),
4573 SH_PFC_FUNCTION(qspi0),
4574 SH_PFC_FUNCTION(qspi1),
4572 SH_PFC_FUNCTION(sata0), 4575 SH_PFC_FUNCTION(sata0),
4573 SH_PFC_FUNCTION(scif0), 4576 SH_PFC_FUNCTION(scif0),
4574 SH_PFC_FUNCTION(scif1), 4577 SH_PFC_FUNCTION(scif1),
@@ -4585,8 +4588,6 @@ static const struct sh_pfc_function pinmux_functions[] = {
4585 SH_PFC_FUNCTION(usb0), 4588 SH_PFC_FUNCTION(usb0),
4586 SH_PFC_FUNCTION(usb1), 4589 SH_PFC_FUNCTION(usb1),
4587 SH_PFC_FUNCTION(usb2), 4590 SH_PFC_FUNCTION(usb2),
4588 SH_PFC_FUNCTION(qspi0),
4589 SH_PFC_FUNCTION(qspi1),
4590}; 4591};
4591 4592
4592static const struct pinmux_cfg_reg pinmux_config_regs[] = { 4593static const struct pinmux_cfg_reg pinmux_config_regs[] = {