1 files changed, 21 insertions, 10 deletions

diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S
index ccde8f084ce4..112ccf497562 100644
--- a/arch/powerpc/kernel/idle_power7.S
+++ b/arch/powerpc/kernel/idle_power7.S
@@ -52,6 +52,22 @@
         .text
 
 /*
+ * Used by threads when the lock bit of core_idle_state is set.
+ * Threads will spin in HMT_LOW until the lock bit is cleared.
+ * r14 - pointer to core_idle_state
+ * r15 - used to load contents of core_idle_state
+ */
+
+core_idle_lock_held:
+        HMT_LOW
+3:      lwz     r15,0(r14)
+        andi.   r15,r15,PNV_CORE_IDLE_LOCK_BIT
+        bne     3b
+        HMT_MEDIUM
+        lwarx   r15,0,r14
+        blr
+
+/*
  * Pass requested state in r3:
  *      r3 - PNV_THREAD_NAP/SLEEP/WINKLE
  *
@@ -150,6 +166,10 @@ power7_enter_nap_mode:
         ld      r14,PACA_CORE_IDLE_STATE_PTR(r13)
 lwarx_loop1:
         lwarx   r15,0,r14
+
+        andi.   r9,r15,PNV_CORE_IDLE_LOCK_BIT
+        bnel    core_idle_lock_held
+
         andc    r15,r15,r7                      /* Clear thread bit */
 
         andi.   r15,r15,PNV_CORE_IDLE_THREAD_BITS
@@ -294,7 +314,7 @@ lwarx_loop2:
          * workaround undo code or resyncing timebase or restoring context
          * In either case loop until the lock bit is cleared.
          */
-        bne     core_idle_lock_held
+        bnel    core_idle_lock_held
 
         cmpwi   cr2,r15,0
         lbz     r4,PACA_SUBCORE_SIBLING_MASK(r13)
@@ -319,15 +339,6 @@ lwarx_loop2:
         isync
         b       common_exit
 
-core_idle_lock_held:
-        HMT_LOW
-core_idle_lock_loop:
-        lwz     r15,0(14)
-        andi.   r9,r15,PNV_CORE_IDLE_LOCK_BIT
-        bne     core_idle_lock_loop
-        HMT_MEDIUM
-        b       lwarx_loop2
-
 first_thread_in_subcore:
         /* First thread in subcore to wakeup */
         ori     r15,r15,PNV_CORE_IDLE_LOCK_BIT