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-rw-r--r--arch/sh/include/asm/dmaengine.h60
-rw-r--r--drivers/dma/shdma.c3
-rw-r--r--drivers/dma/shdma.h3
-rw-r--r--include/linux/sh_dma.h101
4 files changed, 104 insertions, 63 deletions
diff --git a/arch/sh/include/asm/dmaengine.h b/arch/sh/include/asm/dmaengine.h
index abb8d660b6fb..2a02b611a9ad 100644
--- a/arch/sh/include/asm/dmaengine.h
+++ b/arch/sh/include/asm/dmaengine.h
@@ -10,12 +10,7 @@
10#ifndef ASM_DMAENGINE_H 10#ifndef ASM_DMAENGINE_H
11#define ASM_DMAENGINE_H 11#define ASM_DMAENGINE_H
12 12
13#include <linux/dmaengine.h> 13#include <linux/sh_dma.h>
14#include <linux/list.h>
15
16#include <asm/dma-register.h>
17
18#define SH_DMAC_MAX_CHANNELS 6
19 14
20enum { 15enum {
21 SHDMA_SLAVE_SCIF0_TX, 16 SHDMA_SLAVE_SCIF0_TX,
@@ -36,57 +31,4 @@ enum {
36 SHDMA_SLAVE_SIUB_RX, 31 SHDMA_SLAVE_SIUB_RX,
37}; 32};
38 33
39struct sh_dmae_slave_config {
40 unsigned int slave_id;
41 dma_addr_t addr;
42 u32 chcr;
43 char mid_rid;
44};
45
46struct sh_dmae_channel {
47 unsigned int offset;
48 unsigned int dmars;
49 unsigned int dmars_bit;
50};
51
52struct sh_dmae_pdata {
53 struct sh_dmae_slave_config *slave;
54 int slave_num;
55 struct sh_dmae_channel *channel;
56 int channel_num;
57 unsigned int ts_low_shift;
58 unsigned int ts_low_mask;
59 unsigned int ts_high_shift;
60 unsigned int ts_high_mask;
61 unsigned int *ts_shift;
62 int ts_shift_num;
63 u16 dmaor_init;
64};
65
66struct device;
67
68/* Used by slave DMA clients to request DMA to/from a specific peripheral */
69struct sh_dmae_slave {
70 unsigned int slave_id; /* Set by the platform */
71 struct device *dma_dev; /* Set by the platform */
72 struct sh_dmae_slave_config *config; /* Set by the driver */
73};
74
75struct sh_dmae_regs {
76 u32 sar; /* SAR / source address */
77 u32 dar; /* DAR / destination address */
78 u32 tcr; /* TCR / transfer count */
79};
80
81struct sh_desc {
82 struct sh_dmae_regs hw;
83 struct list_head node;
84 struct dma_async_tx_descriptor async_tx;
85 enum dma_data_direction direction;
86 dma_cookie_t cookie;
87 size_t partial;
88 int chunks;
89 int mark;
90};
91
92#endif 34#endif
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
index 83605389fb56..7a18b580f626 100644
--- a/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@ -25,8 +25,7 @@
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/platform_device.h> 26#include <linux/platform_device.h>
27#include <linux/pm_runtime.h> 27#include <linux/pm_runtime.h>
28 28#include <linux/sh_dma.h>
29#include <asm/dmaengine.h>
30 29
31#include "shdma.h" 30#include "shdma.h"
32 31
diff --git a/drivers/dma/shdma.h b/drivers/dma/shdma.h
index d7ddf6f47154..4021275a0a43 100644
--- a/drivers/dma/shdma.h
+++ b/drivers/dma/shdma.h
@@ -17,8 +17,7 @@
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/list.h> 18#include <linux/list.h>
19 19
20#include <asm/dmaengine.h> 20#define SH_DMAC_MAX_CHANNELS 6
21
22#define SH_DMA_SLAVE_NUMBER 256 21#define SH_DMA_SLAVE_NUMBER 256
23#define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */ 22#define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */
24 23
diff --git a/include/linux/sh_dma.h b/include/linux/sh_dma.h
new file mode 100644
index 000000000000..cdaaff424211
--- /dev/null
+++ b/include/linux/sh_dma.h
@@ -0,0 +1,101 @@
1/*
2 * Header for the new SH dmaengine driver
3 *
4 * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef SH_DMA_H
11#define SH_DMA_H
12
13#include <linux/list.h>
14#include <linux/dmaengine.h>
15
16/* Used by slave DMA clients to request DMA to/from a specific peripheral */
17struct sh_dmae_slave {
18 unsigned int slave_id; /* Set by the platform */
19 struct device *dma_dev; /* Set by the platform */
20 struct sh_dmae_slave_config *config; /* Set by the driver */
21};
22
23struct sh_dmae_regs {
24 u32 sar; /* SAR / source address */
25 u32 dar; /* DAR / destination address */
26 u32 tcr; /* TCR / transfer count */
27};
28
29struct sh_desc {
30 struct sh_dmae_regs hw;
31 struct list_head node;
32 struct dma_async_tx_descriptor async_tx;
33 enum dma_data_direction direction;
34 dma_cookie_t cookie;
35 size_t partial;
36 int chunks;
37 int mark;
38};
39struct sh_dmae_slave_config {
40 unsigned int slave_id;
41 dma_addr_t addr;
42 u32 chcr;
43 char mid_rid;
44};
45
46struct sh_dmae_channel {
47 unsigned int offset;
48 unsigned int dmars;
49 unsigned int dmars_bit;
50};
51
52struct sh_dmae_pdata {
53 struct sh_dmae_slave_config *slave;
54 int slave_num;
55 struct sh_dmae_channel *channel;
56 int channel_num;
57 unsigned int ts_low_shift;
58 unsigned int ts_low_mask;
59 unsigned int ts_high_shift;
60 unsigned int ts_high_mask;
61 unsigned int *ts_shift;
62 int ts_shift_num;
63 u16 dmaor_init;
64};
65
66/* DMA register */
67#define SAR 0x00
68#define DAR 0x04
69#define TCR 0x08
70#define CHCR 0x0C
71#define DMAOR 0x40
72
73/* DMAOR definitions */
74#define DMAOR_AE 0x00000004
75#define DMAOR_NMIF 0x00000002
76#define DMAOR_DME 0x00000001
77
78/* Definitions for the SuperH DMAC */
79#define REQ_L 0x00000000
80#define REQ_E 0x00080000
81#define RACK_H 0x00000000
82#define RACK_L 0x00040000
83#define ACK_R 0x00000000
84#define ACK_W 0x00020000
85#define ACK_H 0x00000000
86#define ACK_L 0x00010000
87#define DM_INC 0x00004000
88#define DM_DEC 0x00008000
89#define DM_FIX 0x0000c000
90#define SM_INC 0x00001000
91#define SM_DEC 0x00002000
92#define SM_FIX 0x00003000
93#define RS_IN 0x00000200
94#define RS_OUT 0x00000300
95#define TS_BLK 0x00000040
96#define TM_BUR 0x00000020
97#define CHCR_DE 0x00000001
98#define CHCR_TE 0x00000002
99#define CHCR_IE 0x00000004
100
101#endif
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-25 13:20:54 -0400