diff options
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 26 |
1 files changed, 21 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index 07ff8d2faf3f..d844fadcd56f 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | |||
| @@ -2866,16 +2866,19 @@ static void dce110_apply_ctx_for_surface( | |||
| 2866 | int num_planes, | 2866 | int num_planes, |
| 2867 | struct dc_state *context) | 2867 | struct dc_state *context) |
| 2868 | { | 2868 | { |
| 2869 | int i, be_idx; | 2869 | int i; |
| 2870 | 2870 | ||
| 2871 | if (num_planes == 0) | 2871 | if (num_planes == 0) |
| 2872 | return; | 2872 | return; |
| 2873 | 2873 | ||
| 2874 | be_idx = -1; | ||
| 2875 | for (i = 0; i < dc->res_pool->pipe_count; i++) { | 2874 | for (i = 0; i < dc->res_pool->pipe_count; i++) { |
| 2876 | if (stream == context->res_ctx.pipe_ctx[i].stream) { | 2875 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; |
| 2877 | be_idx = context->res_ctx.pipe_ctx[i].stream_res.tg->inst; | 2876 | struct pipe_ctx *old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; |
| 2878 | break; | 2877 | |
| 2878 | if (stream == pipe_ctx->stream) { | ||
| 2879 | if (!pipe_ctx->top_pipe && | ||
| 2880 | (pipe_ctx->plane_state || old_pipe_ctx->plane_state)) | ||
| 2881 | dc->hwss.pipe_control_lock(dc, pipe_ctx, true); | ||
| 2879 | } | 2882 | } |
| 2880 | } | 2883 | } |
| 2881 | 2884 | ||
| @@ -2895,9 +2898,22 @@ static void dce110_apply_ctx_for_surface( | |||
| 2895 | context->stream_count); | 2898 | context->stream_count); |
| 2896 | 2899 | ||
| 2897 | dce110_program_front_end_for_pipe(dc, pipe_ctx); | 2900 | dce110_program_front_end_for_pipe(dc, pipe_ctx); |
| 2901 | |||
| 2902 | dc->hwss.update_plane_addr(dc, pipe_ctx); | ||
| 2903 | |||
| 2898 | program_surface_visibility(dc, pipe_ctx); | 2904 | program_surface_visibility(dc, pipe_ctx); |
| 2899 | 2905 | ||
| 2900 | } | 2906 | } |
| 2907 | |||
| 2908 | for (i = 0; i < dc->res_pool->pipe_count; i++) { | ||
| 2909 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; | ||
| 2910 | struct pipe_ctx *old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; | ||
| 2911 | |||
| 2912 | if ((stream == pipe_ctx->stream) && | ||
| 2913 | (!pipe_ctx->top_pipe) && | ||
| 2914 | (pipe_ctx->plane_state || old_pipe_ctx->plane_state)) | ||
| 2915 | dc->hwss.pipe_control_lock(dc, pipe_ctx, false); | ||
| 2916 | } | ||
| 2901 | } | 2917 | } |
| 2902 | 2918 | ||
| 2903 | static void dce110_power_down_fe(struct dc *dc, int fe_idx) | 2919 | static void dce110_power_down_fe(struct dc *dc, int fe_idx) |
