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-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c37
1 files changed, 1 insertions, 36 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
index 3ade5d54ea27..f4b47065425c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
@@ -48,17 +48,6 @@
48#include "soc15d.h" 48#include "soc15d.h"
49#include "gmc_v9_0.h" 49#include "gmc_v9_0.h"
50 50
51/* HACK: MMHUB and GC both have VM-related register with the same
52 * names but different offsets. Define the MMHUB register we need here
53 * with a prefix. A proper solution would be to move the functions
54 * programming these registers into gfx_v9_0.c and mmhub_v1_0.c
55 * respectively.
56 */
57#define mmMMHUB_VM_INVALIDATE_ENG16_REQ 0x06f3
58#define mmMMHUB_VM_INVALIDATE_ENG16_REQ_BASE_IDX 0
59
60#define mmMMHUB_VM_INVALIDATE_ENG16_ACK 0x0705
61#define mmMMHUB_VM_INVALIDATE_ENG16_ACK_BASE_IDX 0
62 51
63#define V9_PIPE_PER_MEC (4) 52#define V9_PIPE_PER_MEC (4)
64#define V9_QUEUES_PER_PIPE_MEC (8) 53#define V9_QUEUES_PER_PIPE_MEC (8)
@@ -742,15 +731,6 @@ static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
742static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t vmid) 731static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t vmid)
743{ 732{
744 struct amdgpu_device *adev = (struct amdgpu_device *) kgd; 733 struct amdgpu_device *adev = (struct amdgpu_device *) kgd;
745 uint32_t req = (1 << vmid) |
746 (0 << VM_INVALIDATE_ENG16_REQ__FLUSH_TYPE__SHIFT) | /* legacy */
747 VM_INVALIDATE_ENG16_REQ__INVALIDATE_L2_PTES_MASK |
748 VM_INVALIDATE_ENG16_REQ__INVALIDATE_L2_PDE0_MASK |
749 VM_INVALIDATE_ENG16_REQ__INVALIDATE_L2_PDE1_MASK |
750 VM_INVALIDATE_ENG16_REQ__INVALIDATE_L2_PDE2_MASK |
751 VM_INVALIDATE_ENG16_REQ__INVALIDATE_L1_PTES_MASK;
752
753 mutex_lock(&adev->srbm_mutex);
754 734
755 /* Use legacy mode tlb invalidation. 735 /* Use legacy mode tlb invalidation.
756 * 736 *
@@ -767,22 +747,7 @@ static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t vmid)
767 * TODO 2: support range-based invalidation, requires kfg2kgd 747 * TODO 2: support range-based invalidation, requires kfg2kgd
768 * interface change 748 * interface change
769 */ 749 */
770 WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG16_REQ), req); 750 amdgpu_gmc_flush_gpu_tlb(adev, vmid, 0);
771
772 WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmMMHUB_VM_INVALIDATE_ENG16_REQ),
773 req);
774
775 while (!(RREG32(SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG16_ACK)) &
776 (1 << vmid)))
777 cpu_relax();
778
779 while (!(RREG32(SOC15_REG_OFFSET(MMHUB, 0,
780 mmMMHUB_VM_INVALIDATE_ENG16_ACK)) &
781 (1 << vmid)))
782 cpu_relax();
783
784 mutex_unlock(&adev->srbm_mutex);
785
786} 751}
787 752
788static int invalidate_tlbs_with_kiq(struct amdgpu_device *adev, uint16_t pasid) 753static int invalidate_tlbs_with_kiq(struct amdgpu_device *adev, uint16_t pasid)