diff options
-rw-r--r-- | drivers/iio/imu/inv_mpu6050/inv_mpu_core.c | 56 |
1 files changed, 30 insertions, 26 deletions
diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c index d8d5bed65e07..ef76afe2643c 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c | |||
@@ -410,42 +410,46 @@ error_read_raw: | |||
410 | } | 410 | } |
411 | } | 411 | } |
412 | 412 | ||
413 | static int inv_mpu6050_write_fsr(struct inv_mpu6050_state *st, int fsr) | 413 | static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val) |
414 | { | 414 | { |
415 | int result; | 415 | int result, i; |
416 | u8 d; | 416 | u8 d; |
417 | 417 | ||
418 | if (fsr < 0 || fsr > INV_MPU6050_MAX_GYRO_FS_PARAM) | 418 | for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) { |
419 | return -EINVAL; | 419 | if (gyro_scale_6050[i] == val) { |
420 | if (fsr == st->chip_config.fsr) | 420 | d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT); |
421 | return 0; | 421 | result = inv_mpu6050_write_reg(st, |
422 | st->reg->gyro_config, d); | ||
423 | if (result) | ||
424 | return result; | ||
422 | 425 | ||
423 | d = (fsr << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT); | 426 | st->chip_config.fsr = i; |
424 | result = inv_mpu6050_write_reg(st, st->reg->gyro_config, d); | 427 | return 0; |
425 | if (result) | 428 | } |
426 | return result; | 429 | } |
427 | st->chip_config.fsr = fsr; | ||
428 | 430 | ||
429 | return 0; | 431 | return -EINVAL; |
430 | } | 432 | } |
431 | 433 | ||
432 | static int inv_mpu6050_write_accel_fs(struct inv_mpu6050_state *st, int fs) | 434 | static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val) |
433 | { | 435 | { |
434 | int result; | 436 | int result, i; |
435 | u8 d; | 437 | u8 d; |
436 | 438 | ||
437 | if (fs < 0 || fs > INV_MPU6050_MAX_ACCL_FS_PARAM) | 439 | for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) { |
438 | return -EINVAL; | 440 | if (accel_scale[i] == val) { |
439 | if (fs == st->chip_config.accl_fs) | 441 | d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); |
440 | return 0; | 442 | result = inv_mpu6050_write_reg(st, |
443 | st->reg->accl_config, d); | ||
444 | if (result) | ||
445 | return result; | ||
441 | 446 | ||
442 | d = (fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); | 447 | st->chip_config.accl_fs = i; |
443 | result = inv_mpu6050_write_reg(st, st->reg->accl_config, d); | 448 | return 0; |
444 | if (result) | 449 | } |
445 | return result; | 450 | } |
446 | st->chip_config.accl_fs = fs; | ||
447 | 451 | ||
448 | return 0; | 452 | return -EINVAL; |
449 | } | 453 | } |
450 | 454 | ||
451 | static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, | 455 | static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, |
@@ -471,10 +475,10 @@ static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, | |||
471 | case IIO_CHAN_INFO_SCALE: | 475 | case IIO_CHAN_INFO_SCALE: |
472 | switch (chan->type) { | 476 | switch (chan->type) { |
473 | case IIO_ANGL_VEL: | 477 | case IIO_ANGL_VEL: |
474 | result = inv_mpu6050_write_fsr(st, val); | 478 | result = inv_mpu6050_write_gyro_scale(st, val2); |
475 | break; | 479 | break; |
476 | case IIO_ACCEL: | 480 | case IIO_ACCEL: |
477 | result = inv_mpu6050_write_accel_fs(st, val); | 481 | result = inv_mpu6050_write_accel_scale(st, val2); |
478 | break; | 482 | break; |
479 | default: | 483 | default: |
480 | result = -EINVAL; | 484 | result = -EINVAL; |