diff options
| -rw-r--r-- | include/sound/rt5645.h | 3 | ||||
| -rw-r--r-- | sound/soc/codecs/rt5645.c | 124 | ||||
| -rw-r--r-- | sound/soc/codecs/rt5645.h | 2 |
3 files changed, 61 insertions, 68 deletions
diff --git a/include/sound/rt5645.h b/include/sound/rt5645.h index 120d9610054e..652cb9e4afe5 100644 --- a/include/sound/rt5645.h +++ b/include/sound/rt5645.h | |||
| @@ -15,7 +15,6 @@ struct rt5645_platform_data { | |||
| 15 | /* IN2 can optionally be differential */ | 15 | /* IN2 can optionally be differential */ |
| 16 | bool in2_diff; | 16 | bool in2_diff; |
| 17 | 17 | ||
| 18 | bool dmic_en; | ||
| 19 | unsigned int dmic1_data_pin; | 18 | unsigned int dmic1_data_pin; |
| 20 | /* 0 = IN2N; 1 = GPIO5; 2 = GPIO11 */ | 19 | /* 0 = IN2N; 1 = GPIO5; 2 = GPIO11 */ |
| 21 | unsigned int dmic2_data_pin; | 20 | unsigned int dmic2_data_pin; |
| @@ -24,8 +23,6 @@ struct rt5645_platform_data { | |||
| 24 | unsigned int hp_det_gpio; | 23 | unsigned int hp_det_gpio; |
| 25 | bool gpio_hp_det_active_high; | 24 | bool gpio_hp_det_active_high; |
| 26 | 25 | ||
| 27 | /* true if codec's jd function is used */ | ||
| 28 | bool en_jd_func; | ||
| 29 | unsigned int jd_mode; | 26 | unsigned int jd_mode; |
| 30 | }; | 27 | }; |
| 31 | 28 | ||
diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c index a72d9893c209..e4356809f1b9 100644 --- a/sound/soc/codecs/rt5645.c +++ b/sound/soc/codecs/rt5645.c | |||
| @@ -2968,7 +2968,7 @@ static int rt5645_probe(struct snd_soc_codec *codec) | |||
| 2968 | snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200); | 2968 | snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200); |
| 2969 | 2969 | ||
| 2970 | /* for JD function */ | 2970 | /* for JD function */ |
| 2971 | if (rt5645->pdata.en_jd_func) { | 2971 | if (rt5645->pdata.jd_mode) { |
| 2972 | snd_soc_dapm_force_enable_pin(&codec->dapm, "JD Power"); | 2972 | snd_soc_dapm_force_enable_pin(&codec->dapm, "JD Power"); |
| 2973 | snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2"); | 2973 | snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2"); |
| 2974 | snd_soc_dapm_sync(&codec->dapm); | 2974 | snd_soc_dapm_sync(&codec->dapm); |
| @@ -3111,10 +3111,8 @@ MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match); | |||
| 3111 | static struct rt5645_platform_data *rt5645_pdata; | 3111 | static struct rt5645_platform_data *rt5645_pdata; |
| 3112 | 3112 | ||
| 3113 | static struct rt5645_platform_data strago_platform_data = { | 3113 | static struct rt5645_platform_data strago_platform_data = { |
| 3114 | .dmic_en = true, | 3114 | .dmic1_data_pin = RT5645_DMIC1_DISABLE, |
| 3115 | .dmic1_data_pin = -1, | ||
| 3116 | .dmic2_data_pin = RT5645_DMIC_DATA_IN2P, | 3115 | .dmic2_data_pin = RT5645_DMIC_DATA_IN2P, |
| 3117 | .en_jd_func = true, | ||
| 3118 | .jd_mode = 3, | 3116 | .jd_mode = 3, |
| 3119 | }; | 3117 | }; |
| 3120 | 3118 | ||
| @@ -3214,83 +3212,79 @@ static int rt5645_i2c_probe(struct i2c_client *i2c, | |||
| 3214 | regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL, | 3212 | regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL, |
| 3215 | RT5645_IN_DF2, RT5645_IN_DF2); | 3213 | RT5645_IN_DF2, RT5645_IN_DF2); |
| 3216 | 3214 | ||
| 3217 | if (rt5645->pdata.dmic_en) { | 3215 | if (rt5645->pdata.dmic1_data_pin || rt5645->pdata.dmic2_data_pin) { |
| 3218 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | 3216 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, |
| 3219 | RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL); | 3217 | RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL); |
| 3218 | } | ||
| 3219 | switch (rt5645->pdata.dmic1_data_pin) { | ||
| 3220 | case RT5645_DMIC_DATA_IN2N: | ||
| 3221 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, | ||
| 3222 | RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N); | ||
| 3223 | break; | ||
| 3220 | 3224 | ||
| 3221 | switch (rt5645->pdata.dmic1_data_pin) { | 3225 | case RT5645_DMIC_DATA_GPIO5: |
| 3222 | case RT5645_DMIC_DATA_IN2N: | 3226 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, |
| 3223 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, | 3227 | RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5); |
| 3224 | RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N); | 3228 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, |
| 3225 | break; | 3229 | RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA); |
| 3226 | 3230 | break; | |
| 3227 | case RT5645_DMIC_DATA_GPIO5: | ||
| 3228 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, | ||
| 3229 | RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5); | ||
| 3230 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | ||
| 3231 | RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA); | ||
| 3232 | break; | ||
| 3233 | |||
| 3234 | case RT5645_DMIC_DATA_GPIO11: | ||
| 3235 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, | ||
| 3236 | RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11); | ||
| 3237 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | ||
| 3238 | RT5645_GP11_PIN_MASK, | ||
| 3239 | RT5645_GP11_PIN_DMIC1_SDA); | ||
| 3240 | break; | ||
| 3241 | 3231 | ||
| 3242 | default: | 3232 | case RT5645_DMIC_DATA_GPIO11: |
| 3243 | break; | 3233 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, |
| 3244 | } | 3234 | RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11); |
| 3235 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | ||
| 3236 | RT5645_GP11_PIN_MASK, | ||
| 3237 | RT5645_GP11_PIN_DMIC1_SDA); | ||
| 3238 | break; | ||
| 3245 | 3239 | ||
| 3246 | switch (rt5645->pdata.dmic2_data_pin) { | 3240 | default: |
| 3247 | case RT5645_DMIC_DATA_IN2P: | 3241 | break; |
| 3248 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, | 3242 | } |
| 3249 | RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P); | ||
| 3250 | break; | ||
| 3251 | 3243 | ||
| 3252 | case RT5645_DMIC_DATA_GPIO6: | 3244 | switch (rt5645->pdata.dmic2_data_pin) { |
| 3253 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, | 3245 | case RT5645_DMIC_DATA_IN2P: |
| 3254 | RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6); | 3246 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, |
| 3255 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | 3247 | RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P); |
| 3256 | RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA); | 3248 | break; |
| 3257 | break; | ||
| 3258 | 3249 | ||
| 3259 | case RT5645_DMIC_DATA_GPIO10: | 3250 | case RT5645_DMIC_DATA_GPIO6: |
| 3260 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, | 3251 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, |
| 3261 | RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10); | 3252 | RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6); |
| 3262 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | 3253 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, |
| 3263 | RT5645_GP10_PIN_MASK, | 3254 | RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA); |
| 3264 | RT5645_GP10_PIN_DMIC2_SDA); | 3255 | break; |
| 3265 | break; | ||
| 3266 | 3256 | ||
| 3267 | case RT5645_DMIC_DATA_GPIO12: | 3257 | case RT5645_DMIC_DATA_GPIO10: |
| 3268 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, | 3258 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, |
| 3269 | RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12); | 3259 | RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10); |
| 3270 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | 3260 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, |
| 3271 | RT5645_GP12_PIN_MASK, | 3261 | RT5645_GP10_PIN_MASK, |
| 3272 | RT5645_GP12_PIN_DMIC2_SDA); | 3262 | RT5645_GP10_PIN_DMIC2_SDA); |
| 3273 | break; | 3263 | break; |
| 3274 | 3264 | ||
| 3275 | default: | 3265 | case RT5645_DMIC_DATA_GPIO12: |
| 3276 | break; | 3266 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, |
| 3277 | } | 3267 | RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12); |
| 3268 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | ||
| 3269 | RT5645_GP12_PIN_MASK, | ||
| 3270 | RT5645_GP12_PIN_DMIC2_SDA); | ||
| 3271 | break; | ||
| 3278 | 3272 | ||
| 3273 | default: | ||
| 3274 | break; | ||
| 3279 | } | 3275 | } |
| 3280 | 3276 | ||
| 3281 | if (rt5645->pdata.en_jd_func) { | 3277 | if (rt5645->pdata.jd_mode) { |
| 3282 | regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3, | 3278 | regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3, |
| 3283 | RT5645_IRQ_CLK_GATE_CTRL, RT5645_IRQ_CLK_GATE_CTRL); | 3279 | RT5645_IRQ_CLK_GATE_CTRL, |
| 3280 | RT5645_IRQ_CLK_GATE_CTRL); | ||
| 3284 | regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, | 3281 | regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, |
| 3285 | RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN); | 3282 | RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN); |
| 3286 | regmap_update_bits(rt5645->regmap, RT5645_JD_CTRL3, | 3283 | regmap_update_bits(rt5645->regmap, RT5645_JD_CTRL3, |
| 3287 | RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL, | 3284 | RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL, |
| 3288 | RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL); | 3285 | RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL); |
| 3289 | regmap_update_bits(rt5645->regmap, RT5645_MICBIAS, | 3286 | regmap_update_bits(rt5645->regmap, RT5645_MICBIAS, |
| 3290 | RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT); | 3287 | RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT); |
| 3291 | } | ||
| 3292 | |||
| 3293 | if (rt5645->pdata.jd_mode) { | ||
| 3294 | regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2, | 3288 | regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2, |
| 3295 | RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN); | 3289 | RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN); |
| 3296 | regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3, | 3290 | regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3, |
diff --git a/sound/soc/codecs/rt5645.h b/sound/soc/codecs/rt5645.h index c204861d31d9..9ec4e899795d 100644 --- a/sound/soc/codecs/rt5645.h +++ b/sound/soc/codecs/rt5645.h | |||
| @@ -2145,6 +2145,7 @@ enum { | |||
| 2145 | }; | 2145 | }; |
| 2146 | 2146 | ||
| 2147 | enum { | 2147 | enum { |
| 2148 | RT5645_DMIC1_DISABLE, | ||
| 2148 | RT5645_DMIC_DATA_IN2P, | 2149 | RT5645_DMIC_DATA_IN2P, |
| 2149 | RT5645_DMIC_DATA_GPIO6, | 2150 | RT5645_DMIC_DATA_GPIO6, |
| 2150 | RT5645_DMIC_DATA_GPIO10, | 2151 | RT5645_DMIC_DATA_GPIO10, |
| @@ -2152,6 +2153,7 @@ enum { | |||
| 2152 | }; | 2153 | }; |
| 2153 | 2154 | ||
| 2154 | enum { | 2155 | enum { |
| 2156 | RT5645_DMIC2_DISABLE, | ||
| 2155 | RT5645_DMIC_DATA_IN2N, | 2157 | RT5645_DMIC_DATA_IN2N, |
| 2156 | RT5645_DMIC_DATA_GPIO5, | 2158 | RT5645_DMIC_DATA_GPIO5, |
| 2157 | RT5645_DMIC_DATA_GPIO11, | 2159 | RT5645_DMIC_DATA_GPIO11, |
