diff options
| -rw-r--r-- | arch/x86/kernel/verify_cpu.S | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/arch/x86/kernel/verify_cpu.S b/arch/x86/kernel/verify_cpu.S index 4cf401f581e7..07efb35ee4bc 100644 --- a/arch/x86/kernel/verify_cpu.S +++ b/arch/x86/kernel/verify_cpu.S | |||
| @@ -48,31 +48,31 @@ verify_cpu: | |||
| 48 | pushfl | 48 | pushfl |
| 49 | popl %eax | 49 | popl %eax |
| 50 | cmpl %eax,%ebx | 50 | cmpl %eax,%ebx |
| 51 | jz verify_cpu_no_longmode # cpu has no cpuid | 51 | jz .Lverify_cpu_no_longmode # cpu has no cpuid |
| 52 | #endif | 52 | #endif |
| 53 | 53 | ||
| 54 | movl $0x0,%eax # See if cpuid 1 is implemented | 54 | movl $0x0,%eax # See if cpuid 1 is implemented |
| 55 | cpuid | 55 | cpuid |
| 56 | cmpl $0x1,%eax | 56 | cmpl $0x1,%eax |
| 57 | jb verify_cpu_no_longmode # no cpuid 1 | 57 | jb .Lverify_cpu_no_longmode # no cpuid 1 |
| 58 | 58 | ||
| 59 | xor %di,%di | 59 | xor %di,%di |
| 60 | cmpl $0x68747541,%ebx # AuthenticAMD | 60 | cmpl $0x68747541,%ebx # AuthenticAMD |
| 61 | jnz verify_cpu_noamd | 61 | jnz .Lverify_cpu_noamd |
| 62 | cmpl $0x69746e65,%edx | 62 | cmpl $0x69746e65,%edx |
| 63 | jnz verify_cpu_noamd | 63 | jnz .Lverify_cpu_noamd |
| 64 | cmpl $0x444d4163,%ecx | 64 | cmpl $0x444d4163,%ecx |
| 65 | jnz verify_cpu_noamd | 65 | jnz .Lverify_cpu_noamd |
| 66 | mov $1,%di # cpu is from AMD | 66 | mov $1,%di # cpu is from AMD |
| 67 | jmp verify_cpu_check | 67 | jmp .Lverify_cpu_check |
| 68 | 68 | ||
| 69 | verify_cpu_noamd: | 69 | .Lverify_cpu_noamd: |
| 70 | cmpl $0x756e6547,%ebx # GenuineIntel? | 70 | cmpl $0x756e6547,%ebx # GenuineIntel? |
| 71 | jnz verify_cpu_check | 71 | jnz .Lverify_cpu_check |
| 72 | cmpl $0x49656e69,%edx | 72 | cmpl $0x49656e69,%edx |
| 73 | jnz verify_cpu_check | 73 | jnz .Lverify_cpu_check |
| 74 | cmpl $0x6c65746e,%ecx | 74 | cmpl $0x6c65746e,%ecx |
| 75 | jnz verify_cpu_check | 75 | jnz .Lverify_cpu_check |
| 76 | 76 | ||
| 77 | # only call IA32_MISC_ENABLE when: | 77 | # only call IA32_MISC_ENABLE when: |
| 78 | # family > 6 || (family == 6 && model >= 0xd) | 78 | # family > 6 || (family == 6 && model >= 0xd) |
| @@ -83,59 +83,59 @@ verify_cpu_noamd: | |||
| 83 | andl $0x0ff00f00, %eax # mask family and extended family | 83 | andl $0x0ff00f00, %eax # mask family and extended family |
| 84 | shrl $8, %eax | 84 | shrl $8, %eax |
| 85 | cmpl $6, %eax | 85 | cmpl $6, %eax |
| 86 | ja verify_cpu_clear_xd # family > 6, ok | 86 | ja .Lverify_cpu_clear_xd # family > 6, ok |
| 87 | jb verify_cpu_check # family < 6, skip | 87 | jb .Lverify_cpu_check # family < 6, skip |
| 88 | 88 | ||
| 89 | andl $0x000f00f0, %ecx # mask model and extended model | 89 | andl $0x000f00f0, %ecx # mask model and extended model |
| 90 | shrl $4, %ecx | 90 | shrl $4, %ecx |
| 91 | cmpl $0xd, %ecx | 91 | cmpl $0xd, %ecx |
| 92 | jb verify_cpu_check # family == 6, model < 0xd, skip | 92 | jb .Lverify_cpu_check # family == 6, model < 0xd, skip |
| 93 | 93 | ||
| 94 | verify_cpu_clear_xd: | 94 | .Lverify_cpu_clear_xd: |
| 95 | movl $MSR_IA32_MISC_ENABLE, %ecx | 95 | movl $MSR_IA32_MISC_ENABLE, %ecx |
| 96 | rdmsr | 96 | rdmsr |
| 97 | btrl $2, %edx # clear MSR_IA32_MISC_ENABLE_XD_DISABLE | 97 | btrl $2, %edx # clear MSR_IA32_MISC_ENABLE_XD_DISABLE |
| 98 | jnc verify_cpu_check # only write MSR if bit was changed | 98 | jnc .Lverify_cpu_check # only write MSR if bit was changed |
| 99 | wrmsr | 99 | wrmsr |
| 100 | 100 | ||
| 101 | verify_cpu_check: | 101 | .Lverify_cpu_check: |
| 102 | movl $0x1,%eax # Does the cpu have what it takes | 102 | movl $0x1,%eax # Does the cpu have what it takes |
| 103 | cpuid | 103 | cpuid |
| 104 | andl $REQUIRED_MASK0,%edx | 104 | andl $REQUIRED_MASK0,%edx |
| 105 | xorl $REQUIRED_MASK0,%edx | 105 | xorl $REQUIRED_MASK0,%edx |
| 106 | jnz verify_cpu_no_longmode | 106 | jnz .Lverify_cpu_no_longmode |
| 107 | 107 | ||
| 108 | movl $0x80000000,%eax # See if extended cpuid is implemented | 108 | movl $0x80000000,%eax # See if extended cpuid is implemented |
| 109 | cpuid | 109 | cpuid |
| 110 | cmpl $0x80000001,%eax | 110 | cmpl $0x80000001,%eax |
| 111 | jb verify_cpu_no_longmode # no extended cpuid | 111 | jb .Lverify_cpu_no_longmode # no extended cpuid |
| 112 | 112 | ||
| 113 | movl $0x80000001,%eax # Does the cpu have what it takes | 113 | movl $0x80000001,%eax # Does the cpu have what it takes |
| 114 | cpuid | 114 | cpuid |
| 115 | andl $REQUIRED_MASK1,%edx | 115 | andl $REQUIRED_MASK1,%edx |
| 116 | xorl $REQUIRED_MASK1,%edx | 116 | xorl $REQUIRED_MASK1,%edx |
| 117 | jnz verify_cpu_no_longmode | 117 | jnz .Lverify_cpu_no_longmode |
| 118 | 118 | ||
| 119 | verify_cpu_sse_test: | 119 | .Lverify_cpu_sse_test: |
| 120 | movl $1,%eax | 120 | movl $1,%eax |
| 121 | cpuid | 121 | cpuid |
| 122 | andl $SSE_MASK,%edx | 122 | andl $SSE_MASK,%edx |
| 123 | cmpl $SSE_MASK,%edx | 123 | cmpl $SSE_MASK,%edx |
| 124 | je verify_cpu_sse_ok | 124 | je .Lverify_cpu_sse_ok |
| 125 | test %di,%di | 125 | test %di,%di |
| 126 | jz verify_cpu_no_longmode # only try to force SSE on AMD | 126 | jz .Lverify_cpu_no_longmode # only try to force SSE on AMD |
| 127 | movl $MSR_K7_HWCR,%ecx | 127 | movl $MSR_K7_HWCR,%ecx |
| 128 | rdmsr | 128 | rdmsr |
| 129 | btr $15,%eax # enable SSE | 129 | btr $15,%eax # enable SSE |
| 130 | wrmsr | 130 | wrmsr |
| 131 | xor %di,%di # don't loop | 131 | xor %di,%di # don't loop |
| 132 | jmp verify_cpu_sse_test # try again | 132 | jmp .Lverify_cpu_sse_test # try again |
| 133 | 133 | ||
| 134 | verify_cpu_no_longmode: | 134 | .Lverify_cpu_no_longmode: |
| 135 | popf # Restore caller passed flags | 135 | popf # Restore caller passed flags |
| 136 | movl $1,%eax | 136 | movl $1,%eax |
| 137 | ret | 137 | ret |
| 138 | verify_cpu_sse_ok: | 138 | .Lverify_cpu_sse_ok: |
| 139 | popf # Restore caller passed flags | 139 | popf # Restore caller passed flags |
| 140 | xorl %eax, %eax | 140 | xorl %eax, %eax |
| 141 | ret | 141 | ret |
