diff options
| -rw-r--r-- | drivers/gpu/drm/imx/imx-drm-core.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/imx/imx-drm.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/imx/imx-ldb.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/imx/ipuv3-crtc.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/ipu-v3/ipu-cpmem.c | 15 | ||||
| -rw-r--r-- | drivers/gpu/ipu-v3/ipu-csi.c | 37 |
6 files changed, 53 insertions, 19 deletions
diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c index 1d053bbefc02..f0122afcf2a8 100644 --- a/drivers/gpu/drm/imx/imx-drm-core.c +++ b/drivers/gpu/drm/imx/imx-drm-core.c | |||
| @@ -37,7 +37,6 @@ | |||
| 37 | 37 | ||
| 38 | struct imx_drm_device { | 38 | struct imx_drm_device { |
| 39 | struct drm_device *drm; | 39 | struct drm_device *drm; |
| 40 | unsigned int pipes; | ||
| 41 | struct drm_atomic_state *state; | 40 | struct drm_atomic_state *state; |
| 42 | }; | 41 | }; |
| 43 | 42 | ||
| @@ -229,7 +228,7 @@ static int imx_drm_bind(struct device *dev) | |||
| 229 | imxdrm = devm_kzalloc(dev, sizeof(*imxdrm), GFP_KERNEL); | 228 | imxdrm = devm_kzalloc(dev, sizeof(*imxdrm), GFP_KERNEL); |
| 230 | if (!imxdrm) { | 229 | if (!imxdrm) { |
| 231 | ret = -ENOMEM; | 230 | ret = -ENOMEM; |
| 232 | goto err_unref; | 231 | goto err_put; |
| 233 | } | 232 | } |
| 234 | 233 | ||
| 235 | imxdrm->drm = drm; | 234 | imxdrm->drm = drm; |
| @@ -306,8 +305,8 @@ err_unbind: | |||
| 306 | component_unbind_all(drm->dev, drm); | 305 | component_unbind_all(drm->dev, drm); |
| 307 | err_kms: | 306 | err_kms: |
| 308 | drm_mode_config_cleanup(drm); | 307 | drm_mode_config_cleanup(drm); |
| 309 | err_unref: | 308 | err_put: |
| 310 | drm_dev_unref(drm); | 309 | drm_dev_put(drm); |
| 311 | 310 | ||
| 312 | return ret; | 311 | return ret; |
| 313 | } | 312 | } |
| @@ -327,7 +326,7 @@ static void imx_drm_unbind(struct device *dev) | |||
| 327 | component_unbind_all(drm->dev, drm); | 326 | component_unbind_all(drm->dev, drm); |
| 328 | dev_set_drvdata(dev, NULL); | 327 | dev_set_drvdata(dev, NULL); |
| 329 | 328 | ||
| 330 | drm_dev_unref(drm); | 329 | drm_dev_put(drm); |
| 331 | } | 330 | } |
| 332 | 331 | ||
| 333 | static const struct component_master_ops imx_drm_ops = { | 332 | static const struct component_master_ops imx_drm_ops = { |
diff --git a/drivers/gpu/drm/imx/imx-drm.h b/drivers/gpu/drm/imx/imx-drm.h index 15c2bec47a04..ab9c6f706eb3 100644 --- a/drivers/gpu/drm/imx/imx-drm.h +++ b/drivers/gpu/drm/imx/imx-drm.h | |||
| @@ -10,7 +10,6 @@ struct drm_display_mode; | |||
| 10 | struct drm_encoder; | 10 | struct drm_encoder; |
| 11 | struct drm_framebuffer; | 11 | struct drm_framebuffer; |
| 12 | struct drm_plane; | 12 | struct drm_plane; |
| 13 | struct imx_drm_crtc; | ||
| 14 | struct platform_device; | 13 | struct platform_device; |
| 15 | 14 | ||
| 16 | struct imx_crtc_state { | 15 | struct imx_crtc_state { |
diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c index 7312beb6f1fc..3bd0f8a18e74 100644 --- a/drivers/gpu/drm/imx/imx-ldb.c +++ b/drivers/gpu/drm/imx/imx-ldb.c | |||
| @@ -611,6 +611,9 @@ static int imx_ldb_bind(struct device *dev, struct device *master, void *data) | |||
| 611 | return PTR_ERR(imx_ldb->regmap); | 611 | return PTR_ERR(imx_ldb->regmap); |
| 612 | } | 612 | } |
| 613 | 613 | ||
| 614 | /* disable LDB by resetting the control register to POR default */ | ||
| 615 | regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0); | ||
| 616 | |||
| 614 | imx_ldb->dev = dev; | 617 | imx_ldb->dev = dev; |
| 615 | 618 | ||
| 616 | if (of_id) | 619 | if (of_id) |
| @@ -651,14 +654,14 @@ static int imx_ldb_bind(struct device *dev, struct device *master, void *data) | |||
| 651 | if (ret || i < 0 || i > 1) | 654 | if (ret || i < 0 || i > 1) |
| 652 | return -EINVAL; | 655 | return -EINVAL; |
| 653 | 656 | ||
| 657 | if (!of_device_is_available(child)) | ||
| 658 | continue; | ||
| 659 | |||
| 654 | if (dual && i > 0) { | 660 | if (dual && i > 0) { |
| 655 | dev_warn(dev, "dual-channel mode, ignoring second output\n"); | 661 | dev_warn(dev, "dual-channel mode, ignoring second output\n"); |
| 656 | continue; | 662 | continue; |
| 657 | } | 663 | } |
| 658 | 664 | ||
| 659 | if (!of_device_is_available(child)) | ||
| 660 | continue; | ||
| 661 | |||
| 662 | channel = &imx_ldb->channel[i]; | 665 | channel = &imx_ldb->channel[i]; |
| 663 | channel->ldb = imx_ldb; | 666 | channel->ldb = imx_ldb; |
| 664 | channel->chno = i; | 667 | channel->chno = i; |
diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c index 21d002859ae0..7d4b710b837a 100644 --- a/drivers/gpu/drm/imx/ipuv3-crtc.c +++ b/drivers/gpu/drm/imx/ipuv3-crtc.c | |||
| @@ -35,7 +35,6 @@ | |||
| 35 | struct ipu_crtc { | 35 | struct ipu_crtc { |
| 36 | struct device *dev; | 36 | struct device *dev; |
| 37 | struct drm_crtc base; | 37 | struct drm_crtc base; |
| 38 | struct imx_drm_crtc *imx_crtc; | ||
| 39 | 38 | ||
| 40 | /* plane[0] is the full plane, plane[1] is the partial plane */ | 39 | /* plane[0] is the full plane, plane[1] is the partial plane */ |
| 41 | struct ipu_plane *plane[2]; | 40 | struct ipu_plane *plane[2]; |
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c index 9f2d9ec42add..125721a7f8b6 100644 --- a/drivers/gpu/ipu-v3/ipu-cpmem.c +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c | |||
| @@ -269,9 +269,20 @@ EXPORT_SYMBOL_GPL(ipu_cpmem_set_uv_offset); | |||
| 269 | 269 | ||
| 270 | void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride) | 270 | void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride) |
| 271 | { | 271 | { |
| 272 | u32 ilo, sly; | ||
| 273 | |||
| 274 | if (stride < 0) { | ||
| 275 | stride = -stride; | ||
| 276 | ilo = 0x100000 - (stride / 8); | ||
| 277 | } else { | ||
| 278 | ilo = stride / 8; | ||
| 279 | } | ||
| 280 | |||
| 281 | sly = (stride * 2) - 1; | ||
| 282 | |||
| 272 | ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1); | 283 | ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1); |
| 273 | ipu_ch_param_write_field(ch, IPU_FIELD_ILO, stride / 8); | 284 | ipu_ch_param_write_field(ch, IPU_FIELD_ILO, ilo); |
| 274 | ipu_ch_param_write_field(ch, IPU_FIELD_SLY, (stride * 2) - 1); | 285 | ipu_ch_param_write_field(ch, IPU_FIELD_SLY, sly); |
| 275 | }; | 286 | }; |
| 276 | EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan); | 287 | EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan); |
| 277 | 288 | ||
diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c index caa05b0702e1..954eefe144e2 100644 --- a/drivers/gpu/ipu-v3/ipu-csi.c +++ b/drivers/gpu/ipu-v3/ipu-csi.c | |||
| @@ -224,14 +224,18 @@ static int ipu_csi_set_testgen_mclk(struct ipu_csi *csi, u32 pixel_clk, | |||
| 224 | * Find the CSI data format and data width for the given V4L2 media | 224 | * Find the CSI data format and data width for the given V4L2 media |
| 225 | * bus pixel format code. | 225 | * bus pixel format code. |
| 226 | */ | 226 | */ |
| 227 | static int mbus_code_to_bus_cfg(struct ipu_csi_bus_config *cfg, u32 mbus_code) | 227 | static int mbus_code_to_bus_cfg(struct ipu_csi_bus_config *cfg, u32 mbus_code, |
| 228 | enum v4l2_mbus_type mbus_type) | ||
| 228 | { | 229 | { |
| 229 | switch (mbus_code) { | 230 | switch (mbus_code) { |
| 230 | case MEDIA_BUS_FMT_BGR565_2X8_BE: | 231 | case MEDIA_BUS_FMT_BGR565_2X8_BE: |
| 231 | case MEDIA_BUS_FMT_BGR565_2X8_LE: | 232 | case MEDIA_BUS_FMT_BGR565_2X8_LE: |
| 232 | case MEDIA_BUS_FMT_RGB565_2X8_BE: | 233 | case MEDIA_BUS_FMT_RGB565_2X8_BE: |
| 233 | case MEDIA_BUS_FMT_RGB565_2X8_LE: | 234 | case MEDIA_BUS_FMT_RGB565_2X8_LE: |
| 234 | cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_RGB565; | 235 | if (mbus_type == V4L2_MBUS_CSI2) |
| 236 | cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_RGB565; | ||
| 237 | else | ||
| 238 | cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_BAYER; | ||
| 235 | cfg->mipi_dt = MIPI_DT_RGB565; | 239 | cfg->mipi_dt = MIPI_DT_RGB565; |
| 236 | cfg->data_width = IPU_CSI_DATA_WIDTH_8; | 240 | cfg->data_width = IPU_CSI_DATA_WIDTH_8; |
| 237 | break; | 241 | break; |
| @@ -247,6 +251,12 @@ static int mbus_code_to_bus_cfg(struct ipu_csi_bus_config *cfg, u32 mbus_code) | |||
| 247 | cfg->mipi_dt = MIPI_DT_RGB555; | 251 | cfg->mipi_dt = MIPI_DT_RGB555; |
| 248 | cfg->data_width = IPU_CSI_DATA_WIDTH_8; | 252 | cfg->data_width = IPU_CSI_DATA_WIDTH_8; |
| 249 | break; | 253 | break; |
| 254 | case MEDIA_BUS_FMT_RGB888_1X24: | ||
| 255 | case MEDIA_BUS_FMT_BGR888_1X24: | ||
| 256 | cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_RGB_YUV444; | ||
| 257 | cfg->mipi_dt = MIPI_DT_RGB888; | ||
| 258 | cfg->data_width = IPU_CSI_DATA_WIDTH_8; | ||
| 259 | break; | ||
| 250 | case MEDIA_BUS_FMT_UYVY8_2X8: | 260 | case MEDIA_BUS_FMT_UYVY8_2X8: |
| 251 | cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_UYVY; | 261 | cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_UYVY; |
| 252 | cfg->mipi_dt = MIPI_DT_YUV422; | 262 | cfg->mipi_dt = MIPI_DT_YUV422; |
| @@ -318,13 +328,17 @@ static int mbus_code_to_bus_cfg(struct ipu_csi_bus_config *cfg, u32 mbus_code) | |||
| 318 | /* | 328 | /* |
| 319 | * Fill a CSI bus config struct from mbus_config and mbus_framefmt. | 329 | * Fill a CSI bus config struct from mbus_config and mbus_framefmt. |
| 320 | */ | 330 | */ |
| 321 | static void fill_csi_bus_cfg(struct ipu_csi_bus_config *csicfg, | 331 | static int fill_csi_bus_cfg(struct ipu_csi_bus_config *csicfg, |
| 322 | struct v4l2_mbus_config *mbus_cfg, | 332 | struct v4l2_mbus_config *mbus_cfg, |
| 323 | struct v4l2_mbus_framefmt *mbus_fmt) | 333 | struct v4l2_mbus_framefmt *mbus_fmt) |
| 324 | { | 334 | { |
| 335 | int ret; | ||
| 336 | |||
| 325 | memset(csicfg, 0, sizeof(*csicfg)); | 337 | memset(csicfg, 0, sizeof(*csicfg)); |
| 326 | 338 | ||
| 327 | mbus_code_to_bus_cfg(csicfg, mbus_fmt->code); | 339 | ret = mbus_code_to_bus_cfg(csicfg, mbus_fmt->code, mbus_cfg->type); |
| 340 | if (ret < 0) | ||
| 341 | return ret; | ||
| 328 | 342 | ||
| 329 | switch (mbus_cfg->type) { | 343 | switch (mbus_cfg->type) { |
| 330 | case V4L2_MBUS_PARALLEL: | 344 | case V4L2_MBUS_PARALLEL: |
| @@ -339,7 +353,8 @@ static void fill_csi_bus_cfg(struct ipu_csi_bus_config *csicfg, | |||
| 339 | break; | 353 | break; |
| 340 | case V4L2_MBUS_BT656: | 354 | case V4L2_MBUS_BT656: |
| 341 | csicfg->ext_vsync = 0; | 355 | csicfg->ext_vsync = 0; |
| 342 | if (V4L2_FIELD_HAS_BOTH(mbus_fmt->field)) | 356 | if (V4L2_FIELD_HAS_BOTH(mbus_fmt->field) || |
| 357 | mbus_fmt->field == V4L2_FIELD_ALTERNATE) | ||
| 343 | csicfg->clk_mode = IPU_CSI_CLK_MODE_CCIR656_INTERLACED; | 358 | csicfg->clk_mode = IPU_CSI_CLK_MODE_CCIR656_INTERLACED; |
| 344 | else | 359 | else |
| 345 | csicfg->clk_mode = IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE; | 360 | csicfg->clk_mode = IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE; |
| @@ -355,6 +370,8 @@ static void fill_csi_bus_cfg(struct ipu_csi_bus_config *csicfg, | |||
| 355 | /* will never get here, keep compiler quiet */ | 370 | /* will never get here, keep compiler quiet */ |
| 356 | break; | 371 | break; |
| 357 | } | 372 | } |
| 373 | |||
| 374 | return 0; | ||
| 358 | } | 375 | } |
| 359 | 376 | ||
| 360 | int ipu_csi_init_interface(struct ipu_csi *csi, | 377 | int ipu_csi_init_interface(struct ipu_csi *csi, |
| @@ -364,8 +381,11 @@ int ipu_csi_init_interface(struct ipu_csi *csi, | |||
| 364 | struct ipu_csi_bus_config cfg; | 381 | struct ipu_csi_bus_config cfg; |
| 365 | unsigned long flags; | 382 | unsigned long flags; |
| 366 | u32 width, height, data = 0; | 383 | u32 width, height, data = 0; |
| 384 | int ret; | ||
| 367 | 385 | ||
| 368 | fill_csi_bus_cfg(&cfg, mbus_cfg, mbus_fmt); | 386 | ret = fill_csi_bus_cfg(&cfg, mbus_cfg, mbus_fmt); |
| 387 | if (ret < 0) | ||
| 388 | return ret; | ||
| 369 | 389 | ||
| 370 | /* set default sensor frame width and height */ | 390 | /* set default sensor frame width and height */ |
| 371 | width = mbus_fmt->width; | 391 | width = mbus_fmt->width; |
| @@ -586,11 +606,14 @@ int ipu_csi_set_mipi_datatype(struct ipu_csi *csi, u32 vc, | |||
| 586 | struct ipu_csi_bus_config cfg; | 606 | struct ipu_csi_bus_config cfg; |
| 587 | unsigned long flags; | 607 | unsigned long flags; |
| 588 | u32 temp; | 608 | u32 temp; |
| 609 | int ret; | ||
| 589 | 610 | ||
| 590 | if (vc > 3) | 611 | if (vc > 3) |
| 591 | return -EINVAL; | 612 | return -EINVAL; |
| 592 | 613 | ||
| 593 | mbus_code_to_bus_cfg(&cfg, mbus_fmt->code); | 614 | ret = mbus_code_to_bus_cfg(&cfg, mbus_fmt->code, V4L2_MBUS_CSI2); |
| 615 | if (ret < 0) | ||
| 616 | return ret; | ||
| 594 | 617 | ||
| 595 | spin_lock_irqsave(&csi->lock, flags); | 618 | spin_lock_irqsave(&csi->lock, flags); |
| 596 | 619 | ||
