7 files changed, 252 insertions, 2804 deletions

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 91a488c7cc44..31e8308ba899 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -753,6 +753,7 @@ config I2C_SH7760
 
 config I2C_SH_MOBILE
         tristate "SuperH Mobile I2C Controller"
+        depends on HAS_DMA
         depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST
         help
           If you say yes to this option, support will be included for the
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 373f6d4e4080..30059c1df2a3 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -30,12 +30,12 @@
 #define MV64XXX_I2C_BAUD_DIV_N(val)                     (val & 0x7)
 #define MV64XXX_I2C_BAUD_DIV_M(val)                     ((val & 0xf) << 3)
 
-#define MV64XXX_I2C_REG_CONTROL_ACK                     0x00000004
-#define MV64XXX_I2C_REG_CONTROL_IFLG                    0x00000008
-#define MV64XXX_I2C_REG_CONTROL_STOP                    0x00000010
-#define MV64XXX_I2C_REG_CONTROL_START                   0x00000020
-#define MV64XXX_I2C_REG_CONTROL_TWSIEN                  0x00000040
-#define MV64XXX_I2C_REG_CONTROL_INTEN                   0x00000080
+#define MV64XXX_I2C_REG_CONTROL_ACK                     BIT(2)
+#define MV64XXX_I2C_REG_CONTROL_IFLG                    BIT(3)
+#define MV64XXX_I2C_REG_CONTROL_STOP                    BIT(4)
+#define MV64XXX_I2C_REG_CONTROL_START                   BIT(5)
+#define MV64XXX_I2C_REG_CONTROL_TWSIEN                  BIT(6)
+#define MV64XXX_I2C_REG_CONTROL_INTEN                   BIT(7)
 
 /* Ctlr status values */
 #define MV64XXX_I2C_STATUS_BUS_ERR                      0x00
@@ -68,19 +68,17 @@
 #define MV64XXX_I2C_REG_BRIDGE_TIMING                   0xe0
 
 /* Bridge Control values */
-#define MV64XXX_I2C_BRIDGE_CONTROL_WR                   0x00000001
-#define MV64XXX_I2C_BRIDGE_CONTROL_RD                   0x00000002
+#define MV64XXX_I2C_BRIDGE_CONTROL_WR                   BIT(0)
+#define MV64XXX_I2C_BRIDGE_CONTROL_RD                   BIT(1)
 #define MV64XXX_I2C_BRIDGE_CONTROL_ADDR_SHIFT           2
-#define MV64XXX_I2C_BRIDGE_CONTROL_ADDR_EXT             0x00001000
+#define MV64XXX_I2C_BRIDGE_CONTROL_ADDR_EXT             BIT(12)
 #define MV64XXX_I2C_BRIDGE_CONTROL_TX_SIZE_SHIFT        13
 #define MV64XXX_I2C_BRIDGE_CONTROL_RX_SIZE_SHIFT        16
-#define MV64XXX_I2C_BRIDGE_CONTROL_ENABLE               0x00080000
+#define MV64XXX_I2C_BRIDGE_CONTROL_ENABLE               BIT(19)
+#define MV64XXX_I2C_BRIDGE_CONTROL_REPEATED_START       BIT(20)
 
 /* Bridge Status values */
-#define MV64XXX_I2C_BRIDGE_STATUS_ERROR                 0x00000001
-#define MV64XXX_I2C_STATUS_OFFLOAD_ERROR                0xf0000001
-#define MV64XXX_I2C_STATUS_OFFLOAD_OK                   0xf0000000
-
+#define MV64XXX_I2C_BRIDGE_STATUS_ERROR                 BIT(0)
 
 /* Driver states */
 enum {
@@ -99,14 +97,12 @@ enum {
         MV64XXX_I2C_ACTION_INVALID,
         MV64XXX_I2C_ACTION_CONTINUE,
         MV64XXX_I2C_ACTION_SEND_RESTART,
-        MV64XXX_I2C_ACTION_OFFLOAD_RESTART,
         MV64XXX_I2C_ACTION_SEND_ADDR_1,
         MV64XXX_I2C_ACTION_SEND_ADDR_2,
         MV64XXX_I2C_ACTION_SEND_DATA,
         MV64XXX_I2C_ACTION_RCV_DATA,
         MV64XXX_I2C_ACTION_RCV_DATA_STOP,
         MV64XXX_I2C_ACTION_SEND_STOP,
-        MV64XXX_I2C_ACTION_OFFLOAD_SEND_STOP,
 };
 
 struct mv64xxx_i2c_regs {
@@ -193,75 +189,6 @@ mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data,
         }
 }
 
-static int mv64xxx_i2c_offload_msg(struct mv64xxx_i2c_data *drv_data)
-{
-        unsigned long data_reg_hi = 0;
-        unsigned long data_reg_lo = 0;
-        unsigned long ctrl_reg;
-        struct i2c_msg *msg = drv_data->msgs;
-
-        if (!drv_data->offload_enabled)
-                return -EOPNOTSUPP;
-
-        /* Only regular transactions can be offloaded */
-        if ((msg->flags & ~(I2C_M_TEN | I2C_M_RD)) != 0)
-                return -EINVAL;
-
-        /* Only 1-8 byte transfers can be offloaded */
-        if (msg->len < 1 || msg->len > 8)
-                return -EINVAL;
-
-        /* Build transaction */
-        ctrl_reg = MV64XXX_I2C_BRIDGE_CONTROL_ENABLE |
-                   (msg->addr << MV64XXX_I2C_BRIDGE_CONTROL_ADDR_SHIFT);
-
-        if ((msg->flags & I2C_M_TEN) != 0)
-                ctrl_reg |=  MV64XXX_I2C_BRIDGE_CONTROL_ADDR_EXT;
-
-        if ((msg->flags & I2C_M_RD) == 0) {
-                u8 local_buf[8] = { 0 };
-
-                memcpy(local_buf, msg->buf, msg->len);
-                data_reg_lo = cpu_to_le32(*((u32 *)local_buf));
-                data_reg_hi = cpu_to_le32(*((u32 *)(local_buf+4)));
-
-                ctrl_reg |= MV64XXX_I2C_BRIDGE_CONTROL_WR |
-                    (msg->len - 1) << MV64XXX_I2C_BRIDGE_CONTROL_TX_SIZE_SHIFT;
-
-                writel(data_reg_lo,
-                        drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_LO);
-                writel(data_reg_hi,
-                        drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_HI);
-
-        } else {
-                ctrl_reg |= MV64XXX_I2C_BRIDGE_CONTROL_RD |
-                    (msg->len - 1) << MV64XXX_I2C_BRIDGE_CONTROL_RX_SIZE_SHIFT;
-        }
-
-        /* Execute transaction */
-        writel(ctrl_reg, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_CONTROL);
-
-        return 0;
-}
-
-static void
-mv64xxx_i2c_update_offload_data(struct mv64xxx_i2c_data *drv_data)
-{
-        struct i2c_msg *msg = drv_data->msg;
-
-        if (msg->flags & I2C_M_RD) {
-                u32 data_reg_lo = readl(drv_data->reg_base +
-                                MV64XXX_I2C_REG_RX_DATA_LO);
-                u32 data_reg_hi = readl(drv_data->reg_base +
-                                MV64XXX_I2C_REG_RX_DATA_HI);
-                u8 local_buf[8] = { 0 };
-
-                *((u32 *)local_buf) = le32_to_cpu(data_reg_lo);
-                *((u32 *)(local_buf+4)) = le32_to_cpu(data_reg_hi);
-                memcpy(msg->buf, local_buf, msg->len);
-        }
-
-}
 /*
  *****************************************************************************
  *
@@ -389,16 +316,6 @@ mv64xxx_i2c_fsm(struct mv64xxx_i2c_data *drv_data, u32 status)
                 drv_data->rc = -ENXIO;
                 break;
 
-        case MV64XXX_I2C_STATUS_OFFLOAD_OK:
-                if (drv_data->send_stop || drv_data->aborting) {
-                        drv_data->action = MV64XXX_I2C_ACTION_OFFLOAD_SEND_STOP;
-                        drv_data->state = MV64XXX_I2C_STATE_IDLE;
-                } else {
-                        drv_data->action = MV64XXX_I2C_ACTION_OFFLOAD_RESTART;
-                        drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_RESTART;
-                }
-                break;
-
         default:
                 dev_err(&drv_data->adapter.dev,
                         "mv64xxx_i2c_fsm: Ctlr Error -- state: 0x%x, "
@@ -419,25 +336,15 @@ static void mv64xxx_i2c_send_start(struct mv64xxx_i2c_data *drv_data)
         drv_data->aborting = 0;
         drv_data->rc = 0;
 
-        /* Can we offload this msg ? */
-        if (mv64xxx_i2c_offload_msg(drv_data) < 0) {
-                /* No, switch to standard path */
-                mv64xxx_i2c_prepare_for_io(drv_data, drv_data->msgs);
-                writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_START,
-                        drv_data->reg_base + drv_data->reg_offsets.control);
-        }
+        mv64xxx_i2c_prepare_for_io(drv_data, drv_data->msgs);
+        writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_START,
+               drv_data->reg_base + drv_data->reg_offsets.control);