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-rw-r--r--drivers/irqchip/Kconfig5
-rw-r--r--drivers/irqchip/irq-gic.c30
2 files changed, 15 insertions, 20 deletions
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 4d7294e5d982..bf29a8b2b7c5 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -8,6 +8,11 @@ config ARM_GIC
8 select IRQ_DOMAIN_HIERARCHY 8 select IRQ_DOMAIN_HIERARCHY
9 select MULTI_IRQ_HANDLER 9 select MULTI_IRQ_HANDLER
10 10
11config ARM_GIC_MAX_NR
12 int
13 default 2 if ARCH_REALVIEW
14 default 1
15
11config ARM_GIC_V2M 16config ARM_GIC_V2M
12 bool 17 bool
13 depends on ARM_GIC 18 depends on ARM_GIC
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 7f5f91984c1b..fcbe0b90870d 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -100,11 +100,7 @@ static u8 gic_cpu_map[NR_GIC_CPU_IF] __read_mostly;
100 100
101static struct static_key supports_deactivate = STATIC_KEY_INIT_TRUE; 101static struct static_key supports_deactivate = STATIC_KEY_INIT_TRUE;
102 102
103#ifndef MAX_GIC_NR 103static struct gic_chip_data gic_data[CONFIG_ARM_GIC_MAX_NR] __read_mostly;
104#define MAX_GIC_NR 1
105#endif
106
107static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly;
108 104
109#ifdef CONFIG_GIC_NON_BANKED 105#ifdef CONFIG_GIC_NON_BANKED
110static void __iomem *gic_get_percpu_base(union gic_base *base) 106static void __iomem *gic_get_percpu_base(union gic_base *base)
@@ -417,8 +413,7 @@ static struct irq_chip gic_eoimode1_chip = {
417 413
418void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) 414void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
419{ 415{
420 if (gic_nr >= MAX_GIC_NR) 416 BUG_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR);
421 BUG();
422 irq_set_chained_handler_and_data(irq, gic_handle_cascade_irq, 417 irq_set_chained_handler_and_data(irq, gic_handle_cascade_irq,
423 &gic_data[gic_nr]); 418 &gic_data[gic_nr]);
424} 419}
@@ -524,7 +519,7 @@ int gic_cpu_if_down(unsigned int gic_nr)
524 void __iomem *cpu_base; 519 void __iomem *cpu_base;
525 u32 val = 0; 520 u32 val = 0;
526 521
527 if (gic_nr >= MAX_GIC_NR) 522 if (gic_nr >= CONFIG_ARM_GIC_MAX_NR)
528 return -EINVAL; 523 return -EINVAL;
529 524
530 cpu_base = gic_data_cpu_base(&gic_data[gic_nr]); 525 cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
@@ -548,8 +543,7 @@ static void gic_dist_save(unsigned int gic_nr)
548 void __iomem *dist_base; 543 void __iomem *dist_base;
549 int i; 544 int i;
550 545
551 if (gic_nr >= MAX_GIC_NR) 546 BUG_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR);
552 BUG();
553 547
554 gic_irqs = gic_data[gic_nr].gic_irqs; 548 gic_irqs = gic_data[gic_nr].gic_irqs;
555 dist_base = gic_data_dist_base(&gic_data[gic_nr]); 549 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
@@ -587,8 +581,7 @@ static void gic_dist_restore(unsigned int gic_nr)
587 unsigned int i; 581 unsigned int i;
588 void __iomem *dist_base; 582 void __iomem *dist_base;
589 583
590 if (gic_nr >= MAX_GIC_NR) 584 BUG_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR);
591 BUG();
592 585
593 gic_irqs = gic_data[gic_nr].gic_irqs; 586 gic_irqs = gic_data[gic_nr].gic_irqs;
594 dist_base = gic_data_dist_base(&gic_data[gic_nr]); 587 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
@@ -634,8 +627,7 @@ static void gic_cpu_save(unsigned int gic_nr)
634 void __iomem *dist_base; 627 void __iomem *dist_base;
635 void __iomem *cpu_base; 628 void __iomem *cpu_base;
636 629
637 if (gic_nr >= MAX_GIC_NR) 630 BUG_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR);
638 BUG();
639 631
640 dist_base = gic_data_dist_base(&gic_data[gic_nr]); 632 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
641 cpu_base = gic_data_cpu_base(&gic_data[gic_nr]); 633 cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
@@ -664,8 +656,7 @@ static void gic_cpu_restore(unsigned int gic_nr)
664 void __iomem *dist_base; 656 void __iomem *dist_base;
665 void __iomem *cpu_base; 657 void __iomem *cpu_base;
666 658
667 if (gic_nr >= MAX_GIC_NR) 659 BUG_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR);
668 BUG();
669 660
670 dist_base = gic_data_dist_base(&gic_data[gic_nr]); 661 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
671 cpu_base = gic_data_cpu_base(&gic_data[gic_nr]); 662 cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
@@ -703,7 +694,7 @@ static int gic_notifier(struct notifier_block *self, unsigned long cmd, void *v)
703{ 694{
704 int i; 695 int i;
705 696
706 for (i = 0; i < MAX_GIC_NR; i++) { 697 for (i = 0; i < CONFIG_ARM_GIC_MAX_NR; i++) {
707#ifdef CONFIG_GIC_NON_BANKED 698#ifdef CONFIG_GIC_NON_BANKED
708 /* Skip over unused GICs */ 699 /* Skip over unused GICs */
709 if (!gic_data[i].get_base) 700 if (!gic_data[i].get_base)
@@ -835,8 +826,7 @@ void gic_migrate_target(unsigned int new_cpu_id)
835 int i, ror_val, cpu = smp_processor_id(); 826 int i, ror_val, cpu = smp_processor_id();
836 u32 val, cur_target_mask, active_mask; 827 u32 val, cur_target_mask, active_mask;
837 828
838 if (gic_nr >= MAX_GIC_NR) 829 BUG_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR);
839 BUG();
840 830
841 dist_base = gic_data_dist_base(&gic_data[gic_nr]); 831 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
842 if (!dist_base) 832 if (!dist_base)
@@ -1035,7 +1025,7 @@ static void __init __gic_init_bases(unsigned int gic_nr, int irq_start,
1035 struct gic_chip_data *gic; 1025 struct gic_chip_data *gic;
1036 int gic_irqs, irq_base, i; 1026 int gic_irqs, irq_base, i;
1037 1027
1038 BUG_ON(gic_nr >= MAX_GIC_NR); 1028 BUG_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR);
1039 1029
1040 gic_check_cpu_features(); 1030 gic_check_cpu_features();
1041 1031