13 files changed, 89 insertions, 25 deletions

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 2513da0e6b67..a150f4c35e94 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -420,12 +420,14 @@ config X86_MRST
         depends on PCI
         depends on PCI_GOANY
         depends on X86_IO_APIC
+        select X86_INTEL_MID
+        select SFI
+        select DW_APB_TIMER
         select APB_TIMER
         select I2C
         select SPI
         select INTEL_SCU_IPC
         select X86_PLATFORM_DEVICES
-        select X86_INTEL_MID
         ---help---
           Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin
           Internet Device(MID) platform. Moorestown consists of two chips:
@@ -434,6 +436,26 @@ config X86_MRST
           nor standard legacy replacement devices/features. e.g. Moorestown does
           not contain i8259, i8254, HPET, legacy BIOS, most of the io ports.
 
+config X86_MDFLD
+       bool "Medfield MID platform"
+        depends on PCI
+        depends on PCI_GOANY
+        depends on X86_IO_APIC
+        select X86_INTEL_MID
+        select SFI
+        select DW_APB_TIMER
+        select APB_TIMER
+        select I2C
+        select SPI
+        select INTEL_SCU_IPC
+        select X86_PLATFORM_DEVICES
+        ---help---
+          Medfield is Intel's Low Power Intel Architecture (LPIA) based Moblin
+          Internet Device(MID) platform. 
+          Unlike standard x86 PCs, Medfield does not have many legacy devices
+          nor standard legacy replacement devices/features. e.g. Medfield does
+          not contain i8259, i8254, HPET, legacy BIOS, most of the io ports.
+
 endif
 
 config X86_RDC321X
@@ -631,7 +653,7 @@ config X86_SUMMIT_NUMA
 
 config X86_CYCLONE_TIMER
         def_bool y
-        depends on X86_32_NON_STANDARD
+        depends on X86_SUMMIT
 
 source "arch/x86/Kconfig.cpu"
 
@@ -659,9 +681,10 @@ config HPET_EMULATE_RTC
         depends on HPET_TIMER && (RTC=y || RTC=m || RTC_DRV_CMOS=m || RTC_DRV_CMOS=y)
 
 config APB_TIMER
-       def_bool y if MRST
-       prompt "Langwell APB Timer Support" if X86_MRST
+       def_bool y if X86_INTEL_MID
+       prompt "Intel MID APB Timer Support" if X86_INTEL_MID
        select DW_APB_TIMER
+       depends on X86_INTEL_MID && SFI
        help
          APB timer is the replacement for 8254, HPET on X86 MID platforms.
          The APBT provides a stable time base on SMP
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index aa4158f3ce62..e46c2147397f 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -43,9 +43,9 @@ config EARLY_PRINTK
           with klogd/syslogd or the X server. You should normally N here,
           unless you want to debug such a crash.
 
-config EARLY_PRINTK_MRST
-        bool "Early printk for MRST platform support"
-        depends on EARLY_PRINTK && X86_MRST
+config EARLY_PRINTK_INTEL_MID
+        bool "Early printk for Intel MID platform support"
+        depends on EARLY_PRINTK && X86_INTEL_MID
 
 config EARLY_PRINTK_DBGP
         bool "Early printk via EHCI debug port"
diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h
index 460c74e4852c..4da3c0c4c974 100644
--- a/arch/x86/include/asm/fixmap.h
+++ b/arch/x86/include/asm/fixmap.h
@@ -117,7 +117,7 @@ enum fixed_addresses {
 #endif
         FIX_TEXT_POKE1, /* reserve 2 pages for text_poke() */
         FIX_TEXT_POKE0, /* first page is last, because allocation is backward */
-#ifdef  CONFIG_X86_MRST
+#ifdef  CONFIG_X86_INTEL_MID
         FIX_LNW_VRTC,
 #endif
         __end_of_permanent_fixed_addresses,
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index 9756551ec760..d0f19f9fb846 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -47,7 +47,7 @@ extern void reserve_standard_io_resources(void);
 extern void i386_reserve_resources(void);
 extern void setup_default_timer_irq(void);
 
-#ifdef CONFIG_X86_MRST
+#ifdef CONFIG_X86_INTEL_MID
 extern void x86_mrst_early_setup(void);
 #else
 static inline void x86_mrst_early_setup(void) { }
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index 9d42a52d2331..9b9f18b49918 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -240,7 +240,7 @@ static int __init setup_early_printk(char *buf)
                 if (!strncmp(buf, "xen", 3))
                         early_console_register(&xenboot_console, keep);
 #endif
-#ifdef CONFIG_EARLY_PRINTK_MRST
+#ifdef CONFIG_EARLY_PRINTK_INTEL_MID
                 if (!strncmp(buf, "mrst", 4)) {
                         mrst_early_console_init();
                         early_console_register(&early_mrst_console, keep);
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 79f636bc44c6..66d250c00d11 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -207,23 +207,29 @@ static void __cpuinit smp_callin(void)
          * Need to setup vector mappings before we enable interrupts.
          */
         setup_vector_irq(smp_processor_id());
+
+        /*
+         * Save our processor parameters. Note: this information
+         * is needed for clock calibration.
+         */
+        smp_store_cpu_info(cpuid);
+
         /*
          * Get our bogomips.
+         * Update loops_per_jiffy in cpu_data. Previous call to
+         * smp_store_cpu_info() stored a value that is close but not as
+         * accurate as the value just calculated.
          *
          * Need to enable IRQs because it can take longer and then
          * the NMI watchdog might kill us.
          */
         local_irq_enable();
         calibrate_delay();
+        cpu_data(cpuid).loops_per_jiffy = loops_per_jiffy;
         local_irq_disable();
         pr_debug("Stack at about %p\n", &cpuid);
 
         /*
-         * Save our processor parameters
-         */
-        smp_store_cpu_info(cpuid);
-
-        /*
          * This must be done before setting cpu_online_mask
          * or calling notify_cpu_starting.
          */
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 2c9cf0fd78f5..c0dd5b603749 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -995,3 +995,23 @@ void __init tsc_init(void)
         check_system_tsc_reliable();
 }
 
+#ifdef CONFIG_SMP
+/*
+ * If we have a constant TSC and are using the TSC for the delay loop,
+ * we can skip clock calibration if another cpu in the same socket has already
+ * been calibrated. This assumes that CONSTANT_TSC applies to all
+ * cpus in the socket - this should be a safe assumption.
+ */