diff options
-rw-r--r-- | drivers/gpu/drm/ast/ast_drv.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/ast/ast_main.c | 32 | ||||
-rw-r--r-- | drivers/gpu/drm/ast/ast_mode.c | 30 | ||||
-rw-r--r-- | drivers/gpu/drm/ast/ast_tables.h | 58 |
4 files changed, 103 insertions, 19 deletions
diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h index 8fcd55c0e63d..8880f0b62e9c 100644 --- a/drivers/gpu/drm/ast/ast_drv.h +++ b/drivers/gpu/drm/ast/ast_drv.h | |||
@@ -65,6 +65,7 @@ enum ast_chip { | |||
65 | AST2150, | 65 | AST2150, |
66 | AST2300, | 66 | AST2300, |
67 | AST2400, | 67 | AST2400, |
68 | AST2500, | ||
68 | AST1180, | 69 | AST1180, |
69 | }; | 70 | }; |
70 | 71 | ||
@@ -81,6 +82,7 @@ enum ast_tx_chip { | |||
81 | #define AST_DRAM_1Gx32 3 | 82 | #define AST_DRAM_1Gx32 3 |
82 | #define AST_DRAM_2Gx16 6 | 83 | #define AST_DRAM_2Gx16 6 |
83 | #define AST_DRAM_4Gx16 7 | 84 | #define AST_DRAM_4Gx16 7 |
85 | #define AST_DRAM_8Gx16 8 | ||
84 | 86 | ||
85 | struct ast_fbdev; | 87 | struct ast_fbdev; |
86 | 88 | ||
diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index fd167008be31..8e8c0310245f 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c | |||
@@ -142,7 +142,10 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post) | |||
142 | ast->chip = AST1100; | 142 | ast->chip = AST1100; |
143 | DRM_INFO("AST 1180 detected\n"); | 143 | DRM_INFO("AST 1180 detected\n"); |
144 | } else { | 144 | } else { |
145 | if (dev->pdev->revision >= 0x30) { | 145 | if (dev->pdev->revision >= 0x40) { |
146 | ast->chip = AST2500; | ||
147 | DRM_INFO("AST 2500 detected\n"); | ||
148 | } else if (dev->pdev->revision >= 0x30) { | ||
146 | ast->chip = AST2400; | 149 | ast->chip = AST2400; |
147 | DRM_INFO("AST 2400 detected\n"); | 150 | DRM_INFO("AST 2400 detected\n"); |
148 | } else if (dev->pdev->revision >= 0x20) { | 151 | } else if (dev->pdev->revision >= 0x20) { |
@@ -196,6 +199,9 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post) | |||
196 | if (ast->chip == AST2400 && | 199 | if (ast->chip == AST2400 && |
197 | (scu_rev & 0x300) == 0x100) /* ast1400 */ | 200 | (scu_rev & 0x300) == 0x100) /* ast1400 */ |
198 | ast->support_wide_screen = true; | 201 | ast->support_wide_screen = true; |
202 | if (ast->chip == AST2500 && | ||
203 | scu_rev == 0x100) /* ast2510 */ | ||
204 | ast->support_wide_screen = true; | ||
199 | } | 205 | } |
200 | break; | 206 | break; |
201 | } | 207 | } |
@@ -291,7 +297,10 @@ static int ast_get_dram_info(struct drm_device *dev) | |||
291 | default: | 297 | default: |
292 | ast->dram_bus_width = 16; | 298 | ast->dram_bus_width = 16; |
293 | ast->dram_type = AST_DRAM_1Gx16; | 299 | ast->dram_type = AST_DRAM_1Gx16; |
294 | ast->mclk = 396; | 300 | if (ast->chip == AST2500) |
301 | ast->mclk = 800; | ||
302 | else | ||
303 | ast->mclk = 396; | ||
295 | return 0; | 304 | return 0; |
296 | } | 305 | } |
297 | 306 | ||
@@ -300,7 +309,23 @@ static int ast_get_dram_info(struct drm_device *dev) | |||
300 | else | 309 | else |
301 | ast->dram_bus_width = 32; | 310 | ast->dram_bus_width = 32; |
302 | 311 | ||
303 | if (ast->chip == AST2300 || ast->chip == AST2400) { | 312 | if (ast->chip == AST2500) { |
313 | switch (mcr_cfg & 0x03) { | ||
314 | case 0: | ||
315 | ast->dram_type = AST_DRAM_1Gx16; | ||
316 | break; | ||
317 | default: | ||
318 | case 1: | ||
319 | ast->dram_type = AST_DRAM_2Gx16; | ||
320 | break; | ||
321 | case 2: | ||
322 | ast->dram_type = AST_DRAM_4Gx16; | ||
323 | break; | ||
324 | case 3: | ||
325 | ast->dram_type = AST_DRAM_8Gx16; | ||
326 | break; | ||
327 | } | ||
328 | } else if (ast->chip == AST2300 || ast->chip == AST2400) { | ||
304 | switch (mcr_cfg & 0x03) { | 329 | switch (mcr_cfg & 0x03) { |
305 | case 0: | 330 | case 0: |
306 | ast->dram_type = AST_DRAM_512Mx16; | 331 | ast->dram_type = AST_DRAM_512Mx16; |
@@ -523,6 +548,7 @@ int ast_driver_load(struct drm_device *dev, unsigned long flags) | |||
523 | ast->chip == AST2200 || | 548 | ast->chip == AST2200 || |
524 | ast->chip == AST2300 || | 549 | ast->chip == AST2300 || |
525 | ast->chip == AST2400 || | 550 | ast->chip == AST2400 || |
551 | ast->chip == AST2500 || | ||
526 | ast->chip == AST1180) { | 552 | ast->chip == AST1180) { |
527 | dev->mode_config.max_width = 1920; | 553 | dev->mode_config.max_width = 1920; |
528 | dev->mode_config.max_height = 2048; | 554 | dev->mode_config.max_height = 2048; |
diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c index c25b8b06d55a..47b78e52691c 100644 --- a/drivers/gpu/drm/ast/ast_mode.c +++ b/drivers/gpu/drm/ast/ast_mode.c | |||
@@ -273,7 +273,11 @@ static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mod | |||
273 | { | 273 | { |
274 | struct ast_private *ast = crtc->dev->dev_private; | 274 | struct ast_private *ast = crtc->dev->dev_private; |
275 | u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0; | 275 | u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0; |
276 | u16 temp; | 276 | u16 temp, precache = 0; |
277 | |||
278 | if ((ast->chip == AST2500) && | ||
279 | (vbios_mode->enh_table->flags & AST2500PreCatchCRT)) | ||
280 | precache = 40; | ||
277 | 281 | ||
278 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00); | 282 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00); |
279 | 283 | ||
@@ -299,12 +303,12 @@ static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mod | |||
299 | jregAD |= 0x01; /* HBE D[5] */ | 303 | jregAD |= 0x01; /* HBE D[5] */ |
300 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f)); | 304 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f)); |
301 | 305 | ||
302 | temp = (mode->crtc_hsync_start >> 3) - 1; | 306 | temp = ((mode->crtc_hsync_start-precache) >> 3) - 1; |
303 | if (temp & 0x100) | 307 | if (temp & 0x100) |
304 | jregAC |= 0x40; /* HRS D[5] */ | 308 | jregAC |= 0x40; /* HRS D[5] */ |
305 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp); | 309 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp); |
306 | 310 | ||
307 | temp = ((mode->crtc_hsync_end >> 3) - 1) & 0x3f; | 311 | temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f; |
308 | if (temp & 0x20) | 312 | if (temp & 0x20) |
309 | jregAD |= 0x04; /* HRE D[5] */ | 313 | jregAD |= 0x04; /* HRE D[5] */ |
310 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05)); | 314 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05)); |
@@ -365,6 +369,11 @@ static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mod | |||
365 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09); | 369 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09); |
366 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80)); | 370 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80)); |
367 | 371 | ||
372 | if (precache) | ||
373 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x80); | ||
374 | else | ||
375 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x00); | ||
376 | |||
368 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80); | 377 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80); |
369 | } | 378 | } |
370 | 379 | ||
@@ -386,12 +395,16 @@ static void ast_set_dclk_reg(struct drm_device *dev, struct drm_display_mode *mo | |||
386 | struct ast_private *ast = dev->dev_private; | 395 | struct ast_private *ast = dev->dev_private; |
387 | const struct ast_vbios_dclk_info *clk_info; | 396 | const struct ast_vbios_dclk_info *clk_info; |
388 | 397 | ||
389 | clk_info = &dclk_table[vbios_mode->enh_table->dclk_index]; | 398 | if (ast->chip == AST2500) |
399 | clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index]; | ||
400 | else | ||
401 | clk_info = &dclk_table[vbios_mode->enh_table->dclk_index]; | ||
390 | 402 | ||
391 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1); | 403 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1); |
392 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2); | 404 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2); |
393 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f, | 405 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f, |
394 | (clk_info->param3 & 0x80) | ((clk_info->param3 & 0x3) << 4)); | 406 | (clk_info->param3 & 0xc0) | |
407 | ((clk_info->param3 & 0x3) << 4)); | ||
395 | } | 408 | } |
396 | 409 | ||
397 | static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, | 410 | static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, |
@@ -425,7 +438,8 @@ static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode | |||
425 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8); | 438 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8); |
426 | 439 | ||
427 | /* Set Threshold */ | 440 | /* Set Threshold */ |
428 | if (ast->chip == AST2300 || ast->chip == AST2400) { | 441 | if (ast->chip == AST2300 || ast->chip == AST2400 || |
442 | ast->chip == AST2500) { | ||
429 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78); | 443 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78); |
430 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60); | 444 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60); |
431 | } else if (ast->chip == AST2100 || | 445 | } else if (ast->chip == AST2100 || |
@@ -800,7 +814,9 @@ static int ast_mode_valid(struct drm_connector *connector, | |||
800 | if ((mode->hdisplay == 1600) && (mode->vdisplay == 900)) | 814 | if ((mode->hdisplay == 1600) && (mode->vdisplay == 900)) |
801 | return MODE_OK; | 815 | return MODE_OK; |
802 | 816 | ||
803 | if ((ast->chip == AST2100) || (ast->chip == AST2200) || (ast->chip == AST2300) || (ast->chip == AST2400) || (ast->chip == AST1180)) { | 817 | if ((ast->chip == AST2100) || (ast->chip == AST2200) || |
818 | (ast->chip == AST2300) || (ast->chip == AST2400) || | ||
819 | (ast->chip == AST2500) || (ast->chip == AST1180)) { | ||
804 | if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080)) | 820 | if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080)) |
805 | return MODE_OK; | 821 | return MODE_OK; |
806 | 822 | ||
diff --git a/drivers/gpu/drm/ast/ast_tables.h b/drivers/gpu/drm/ast/ast_tables.h index a4ddf901a54f..5f4c2e833a65 100644 --- a/drivers/gpu/drm/ast/ast_tables.h +++ b/drivers/gpu/drm/ast/ast_tables.h | |||
@@ -47,6 +47,7 @@ | |||
47 | #define SyncPN (PVSync | NHSync) | 47 | #define SyncPN (PVSync | NHSync) |
48 | #define SyncNP (NVSync | PHSync) | 48 | #define SyncNP (NVSync | PHSync) |
49 | #define SyncNN (NVSync | NHSync) | 49 | #define SyncNN (NVSync | NHSync) |
50 | #define AST2500PreCatchCRT 0x00004000 | ||
50 | 51 | ||
51 | /* DCLK Index */ | 52 | /* DCLK Index */ |
52 | #define VCLK25_175 0x00 | 53 | #define VCLK25_175 0x00 |
@@ -108,6 +109,36 @@ static const struct ast_vbios_dclk_info dclk_table[] = { | |||
108 | {0x3b, 0x2c, 0x81}, /* 1A: VCLK118_25 */ | 109 | {0x3b, 0x2c, 0x81}, /* 1A: VCLK118_25 */ |
109 | }; | 110 | }; |
110 | 111 | ||
112 | static const struct ast_vbios_dclk_info dclk_table_ast2500[] = { | ||
113 | {0x2C, 0xE7, 0x03}, /* 00: VCLK25_175 */ | ||
114 | {0x95, 0x62, 0x03}, /* 01: VCLK28_322 */ | ||
115 | {0x67, 0x63, 0x01}, /* 02: VCLK31_5 */ | ||
116 | {0x76, 0x63, 0x01}, /* 03: VCLK36 */ | ||
117 | {0xEE, 0x67, 0x01}, /* 04: VCLK40 */ | ||
118 | {0x82, 0x62, 0x01}, /* 05: VCLK49_5 */ | ||
119 | {0xC6, 0x64, 0x01}, /* 06: VCLK50 */ | ||
120 | {0x94, 0x62, 0x01}, /* 07: VCLK56_25 */ | ||
121 | {0x80, 0x64, 0x00}, /* 08: VCLK65 */ | ||
122 | {0x7B, 0x63, 0x00}, /* 09: VCLK75 */ | ||
123 | {0x67, 0x62, 0x00}, /* 0A: VCLK78_75 */ | ||
124 | {0x7C, 0x62, 0x00}, /* 0B: VCLK94_5 */ | ||
125 | {0x8E, 0x62, 0x00}, /* 0C: VCLK108 */ | ||
126 | {0x85, 0x24, 0x00}, /* 0D: VCLK135 */ | ||
127 | {0x67, 0x22, 0x00}, /* 0E: VCLK157_5 */ | ||
128 | {0x6A, 0x22, 0x00}, /* 0F: VCLK162 */ | ||
129 | {0x4d, 0x4c, 0x80}, /* 10: VCLK154 */ | ||
130 | {0xa7, 0x78, 0x80}, /* 11: VCLK83.5 */ | ||
131 | {0x28, 0x49, 0x80}, /* 12: VCLK106.5 */ | ||
132 | {0x37, 0x49, 0x80}, /* 13: VCLK146.25 */ | ||
133 | {0x1f, 0x45, 0x80}, /* 14: VCLK148.5 */ | ||
134 | {0x47, 0x6c, 0x80}, /* 15: VCLK71 */ | ||
135 | {0x25, 0x65, 0x80}, /* 16: VCLK88.75 */ | ||
136 | {0x58, 0x01, 0x42}, /* 17: VCLK119 */ | ||
137 | {0x32, 0x67, 0x80}, /* 18: VCLK85_5 */ | ||
138 | {0x6a, 0x6d, 0x80}, /* 19: VCLK97_75 */ | ||
139 | {0x44, 0x20, 0x43}, /* 1A: VCLK118_25 */ | ||
140 | }; | ||
141 | |||
111 | static const struct ast_vbios_stdtable vbios_stdtable[] = { | 142 | static const struct ast_vbios_stdtable vbios_stdtable[] = { |
112 | /* MD_2_3_400 */ | 143 | /* MD_2_3_400 */ |
113 | { | 144 | { |
@@ -246,12 +277,14 @@ static const struct ast_vbios_enhtable res_1360x768[] = { | |||
246 | {1792, 1360, 64, 112, 795, 768, 3, 6, VCLK85_5, /* 60Hz */ | 277 | {1792, 1360, 64, 112, 795, 768, 3, 6, VCLK85_5, /* 60Hz */ |
247 | (SyncPP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x39 }, | 278 | (SyncPP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x39 }, |
248 | {1792, 1360, 64, 112, 795, 768, 3, 6, VCLK85_5, /* end */ | 279 | {1792, 1360, 64, 112, 795, 768, 3, 6, VCLK85_5, /* end */ |
249 | (SyncPP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 1, 0x39 }, | 280 | (SyncPP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo | |
281 | AST2500PreCatchCRT), 0xFF, 1, 0x39 }, | ||
250 | }; | 282 | }; |
251 | 283 | ||
252 | static const struct ast_vbios_enhtable res_1600x900[] = { | 284 | static const struct ast_vbios_enhtable res_1600x900[] = { |
253 | {1760, 1600, 48, 32, 926, 900, 3, 5, VCLK97_75, /* 60Hz CVT RB */ | 285 | {1760, 1600, 48, 32, 926, 900, 3, 5, VCLK97_75, /* 60Hz CVT RB */ |
254 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x3A }, | 286 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo | |
287 | AST2500PreCatchCRT), 60, 1, 0x3A }, | ||
255 | {2112, 1600, 88, 168, 934, 900, 3, 5, VCLK118_25, /* 60Hz CVT */ | 288 | {2112, 1600, 88, 168, 934, 900, 3, 5, VCLK118_25, /* 60Hz CVT */ |
256 | (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x3A }, | 289 | (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x3A }, |
257 | {2112, 1600, 88, 168, 934, 900, 3, 5, VCLK118_25, /* 60Hz CVT */ | 290 | {2112, 1600, 88, 168, 934, 900, 3, 5, VCLK118_25, /* 60Hz CVT */ |
@@ -260,16 +293,19 @@ static const struct ast_vbios_enhtable res_1600x900[] = { | |||
260 | 293 | ||
261 | static const struct ast_vbios_enhtable res_1920x1080[] = { | 294 | static const struct ast_vbios_enhtable res_1920x1080[] = { |
262 | {2200, 1920, 88, 44, 1125, 1080, 4, 5, VCLK148_5, /* 60Hz */ | 295 | {2200, 1920, 88, 44, 1125, 1080, 4, 5, VCLK148_5, /* 60Hz */ |
263 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x38 }, | 296 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo | |
297 | AST2500PreCatchCRT), 60, 1, 0x38 }, | ||
264 | {2200, 1920, 88, 44, 1125, 1080, 4, 5, VCLK148_5, /* 60Hz */ | 298 | {2200, 1920, 88, 44, 1125, 1080, 4, 5, VCLK148_5, /* 60Hz */ |
265 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 1, 0x38 }, | 299 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo | |
300 | AST2500PreCatchCRT), 0xFF, 1, 0x38 }, | ||
266 | }; | 301 | }; |
267 | 302 | ||
268 | 303 | ||
269 | /* 16:10 */ | 304 | /* 16:10 */ |
270 | static const struct ast_vbios_enhtable res_1280x800[] = { | 305 | static const struct ast_vbios_enhtable res_1280x800[] = { |
271 | {1440, 1280, 48, 32, 823, 800, 3, 6, VCLK71, /* 60Hz RB */ | 306 | {1440, 1280, 48, 32, 823, 800, 3, 6, VCLK71, /* 60Hz RB */ |
272 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x35 }, | 307 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo | |
308 | AST2500PreCatchCRT), 60, 1, 0x35 }, | ||
273 | {1680, 1280, 72,128, 831, 800, 3, 6, VCLK83_5, /* 60Hz */ | 309 | {1680, 1280, 72,128, 831, 800, 3, 6, VCLK83_5, /* 60Hz */ |
274 | (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x35 }, | 310 | (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x35 }, |
275 | {1680, 1280, 72,128, 831, 800, 3, 6, VCLK83_5, /* 60Hz */ | 311 | {1680, 1280, 72,128, 831, 800, 3, 6, VCLK83_5, /* 60Hz */ |
@@ -279,7 +315,8 @@ static const struct ast_vbios_enhtable res_1280x800[] = { | |||
279 | 315 | ||
280 | static const struct ast_vbios_enhtable res_1440x900[] = { | 316 | static const struct ast_vbios_enhtable res_1440x900[] = { |
281 | {1600, 1440, 48, 32, 926, 900, 3, 6, VCLK88_75, /* 60Hz RB */ | 317 | {1600, 1440, 48, 32, 926, 900, 3, 6, VCLK88_75, /* 60Hz RB */ |
282 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x36 }, | 318 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo | |
319 | AST2500PreCatchCRT), 60, 1, 0x36 }, | ||
283 | {1904, 1440, 80,152, 934, 900, 3, 6, VCLK106_5, /* 60Hz */ | 320 | {1904, 1440, 80,152, 934, 900, 3, 6, VCLK106_5, /* 60Hz */ |
284 | (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x36 }, | 321 | (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x36 }, |
285 | {1904, 1440, 80,152, 934, 900, 3, 6, VCLK106_5, /* 60Hz */ | 322 | {1904, 1440, 80,152, 934, 900, 3, 6, VCLK106_5, /* 60Hz */ |
@@ -288,7 +325,8 @@ static const struct ast_vbios_enhtable res_1440x900[] = { | |||
288 | 325 | ||
289 | static const struct ast_vbios_enhtable res_1680x1050[] = { | 326 | static const struct ast_vbios_enhtable res_1680x1050[] = { |
290 | {1840, 1680, 48, 32, 1080, 1050, 3, 6, VCLK119, /* 60Hz RB */ | 327 | {1840, 1680, 48, 32, 1080, 1050, 3, 6, VCLK119, /* 60Hz RB */ |
291 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x37 }, | 328 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo | |
329 | AST2500PreCatchCRT), 60, 1, 0x37 }, | ||
292 | {2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25, /* 60Hz */ | 330 | {2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25, /* 60Hz */ |
293 | (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x37 }, | 331 | (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x37 }, |
294 | {2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25, /* 60Hz */ | 332 | {2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25, /* 60Hz */ |
@@ -297,9 +335,11 @@ static const struct ast_vbios_enhtable res_1680x1050[] = { | |||
297 | 335 | ||
298 | static const struct ast_vbios_enhtable res_1920x1200[] = { | 336 | static const struct ast_vbios_enhtable res_1920x1200[] = { |
299 | {2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz RB*/ | 337 | {2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz RB*/ |
300 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x34 }, | 338 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo | |
339 | AST2500PreCatchCRT), 60, 1, 0x34 }, | ||
301 | {2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz RB */ | 340 | {2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz RB */ |
302 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 1, 0x34 }, | 341 | (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo | |
342 | AST2500PreCatchCRT), 0xFF, 1, 0x34 }, | ||
303 | }; | 343 | }; |
304 | 344 | ||
305 | #endif | 345 | #endif |