1 files changed, 16 insertions, 8 deletions

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index d78c12e7cb5e..486cc4ded190 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2373,6 +2373,9 @@ static int of_dev_hwmod_lookup(struct device_node *np,
  * registers.  This address is needed early so the OCP registers that
  * are part of the device's address space can be ioremapped properly.
  *
+ * If SYSC access is not needed, the registers will not be remapped
+ * and non-availability of MPU access is not treated as an error.
+ *
  * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
  * -ENXIO on absent or invalid register target address space.
  */
@@ -2387,6 +2390,11 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
 
         _save_mpu_port_index(oh);
 
+        /* if we don't need sysc access we don't need to ioremap */
+        if (!oh->class->sysc)
+                return 0;
+
+        /* we can't continue without MPU PORT if we need sysc access */
         if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
                 return -ENXIO;
 
@@ -2396,8 +2404,10 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
                          oh->name);
 
                 /* Extract the IO space from device tree blob */
-                if (!np)
+                if (!np) {
+                        pr_err("omap_hwmod: %s: no dt node\n", oh->name);
                         return -ENXIO;
+                }
 
                 va_start = of_iomap(np, index + oh->mpu_rt_idx);
         } else {
@@ -2456,13 +2466,11 @@ static int __init _init(struct omap_hwmod *oh, void *data)
                                 oh->name, np->name);
         }
 
-        if (oh->class->sysc) {
-                r = _init_mpu_rt_base(oh, NULL, index, np);
-                if (r < 0) {
-                        WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
-                             oh->name);
-                        return 0;
-                }
+        r = _init_mpu_rt_base(oh, NULL, index, np);
+        if (r < 0) {
+                WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
+                     oh->name);
+                return 0;
         }
 
         r = _init_clocks(oh, NULL);