diff options
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6sl.dtsi | 12 |
2 files changed, 18 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 2dd30ecf0dc1..947e463a2b2f 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi | |||
| @@ -251,7 +251,9 @@ | |||
| 251 | }; | 251 | }; |
| 252 | 252 | ||
| 253 | ssi1: ssi@02028000 { | 253 | ssi1: ssi@02028000 { |
| 254 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; | 254 | compatible = "fsl,imx6q-ssi", |
| 255 | "fsl,imx51-ssi", | ||
| 256 | "fsl,imx21-ssi"; | ||
| 255 | reg = <0x02028000 0x4000>; | 257 | reg = <0x02028000 0x4000>; |
| 256 | interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; | 258 | interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; |
| 257 | clocks = <&clks 178>; | 259 | clocks = <&clks 178>; |
| @@ -264,7 +266,9 @@ | |||
| 264 | }; | 266 | }; |
| 265 | 267 | ||
| 266 | ssi2: ssi@0202c000 { | 268 | ssi2: ssi@0202c000 { |
| 267 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; | 269 | compatible = "fsl,imx6q-ssi", |
| 270 | "fsl,imx51-ssi", | ||
| 271 | "fsl,imx21-ssi"; | ||
| 268 | reg = <0x0202c000 0x4000>; | 272 | reg = <0x0202c000 0x4000>; |
| 269 | interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; | 273 | interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; |
| 270 | clocks = <&clks 179>; | 274 | clocks = <&clks 179>; |
| @@ -277,7 +281,9 @@ | |||
| 277 | }; | 281 | }; |
| 278 | 282 | ||
| 279 | ssi3: ssi@02030000 { | 283 | ssi3: ssi@02030000 { |
| 280 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; | 284 | compatible = "fsl,imx6q-ssi", |
| 285 | "fsl,imx51-ssi", | ||
| 286 | "fsl,imx21-ssi"; | ||
| 281 | reg = <0x02030000 0x4000>; | 287 | reg = <0x02030000 0x4000>; |
| 282 | interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>; | 288 | interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>; |
| 283 | clocks = <&clks 180>; | 289 | clocks = <&clks 180>; |
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index a655b5b969b1..3cb4941afeef 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi | |||
| @@ -225,7 +225,9 @@ | |||
| 225 | }; | 225 | }; |
| 226 | 226 | ||
| 227 | ssi1: ssi@02028000 { | 227 | ssi1: ssi@02028000 { |
| 228 | compatible = "fsl,imx6sl-ssi","fsl,imx21-ssi"; | 228 | compatible = "fsl,imx6sl-ssi", |
| 229 | "fsl,imx51-ssi", | ||
| 230 | "fsl,imx21-ssi"; | ||
| 229 | reg = <0x02028000 0x4000>; | 231 | reg = <0x02028000 0x4000>; |
| 230 | interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; | 232 | interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; |
| 231 | clocks = <&clks IMX6SL_CLK_SSI1>; | 233 | clocks = <&clks IMX6SL_CLK_SSI1>; |
| @@ -237,7 +239,9 @@ | |||
| 237 | }; | 239 | }; |
| 238 | 240 | ||
| 239 | ssi2: ssi@0202c000 { | 241 | ssi2: ssi@0202c000 { |
| 240 | compatible = "fsl,imx6sl-ssi","fsl,imx21-ssi"; | 242 | compatible = "fsl,imx6sl-ssi", |
| 243 | "fsl,imx51-ssi", | ||
| 244 | "fsl,imx21-ssi"; | ||
| 241 | reg = <0x0202c000 0x4000>; | 245 | reg = <0x0202c000 0x4000>; |
| 242 | interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; | 246 | interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; |
| 243 | clocks = <&clks IMX6SL_CLK_SSI2>; | 247 | clocks = <&clks IMX6SL_CLK_SSI2>; |
| @@ -249,7 +253,9 @@ | |||
| 249 | }; | 253 | }; |
| 250 | 254 | ||
| 251 | ssi3: ssi@02030000 { | 255 | ssi3: ssi@02030000 { |
| 252 | compatible = "fsl,imx6sl-ssi","fsl,imx21-ssi"; | 256 | compatible = "fsl,imx6sl-ssi", |
| 257 | "fsl,imx51-ssi", | ||
| 258 | "fsl,imx21-ssi"; | ||
| 253 | reg = <0x02030000 0x4000>; | 259 | reg = <0x02030000 0x4000>; |
| 254 | interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>; | 260 | interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>; |
| 255 | clocks = <&clks IMX6SL_CLK_SSI3>; | 261 | clocks = <&clks IMX6SL_CLK_SSI3>; |