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-rw-r--r--arch/powerpc/include/asm/ppc-opcode.h1
-rw-r--r--arch/powerpc/mm/tlb-radix.c4
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 0132831b3081..c56ea8c84abb 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -460,5 +460,6 @@
460 460
461#define PPC_SLBIA(IH) stringify_in_c(.long PPC_INST_SLBIA | \ 461#define PPC_SLBIA(IH) stringify_in_c(.long PPC_INST_SLBIA | \
462 ((IH & 0x7) << 21)) 462 ((IH & 0x7) << 21))
463#define PPC_INVALIDATE_ERAT PPC_SLBIA(7)
463 464
464#endif /* _ASM_POWERPC_PPC_OPCODE_H */ 465#endif /* _ASM_POWERPC_PPC_OPCODE_H */
diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
index bda8c43be78a..3493cf4e0452 100644
--- a/arch/powerpc/mm/tlb-radix.c
+++ b/arch/powerpc/mm/tlb-radix.c
@@ -50,6 +50,8 @@ static inline void _tlbiel_pid(unsigned long pid, unsigned long ric)
50 for (set = 0; set < POWER9_TLB_SETS_RADIX ; set++) { 50 for (set = 0; set < POWER9_TLB_SETS_RADIX ; set++) {
51 __tlbiel_pid(pid, set, ric); 51 __tlbiel_pid(pid, set, ric);
52 } 52 }
53 if (cpu_has_feature(CPU_FTR_POWER9_DD1))
54 asm volatile(PPC_INVALIDATE_ERAT : : :"memory");
53 return; 55 return;
54} 56}
55 57
@@ -83,6 +85,8 @@ static inline void _tlbiel_va(unsigned long va, unsigned long pid,
83 asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1) 85 asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1)
84 : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); 86 : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");
85 asm volatile("ptesync": : :"memory"); 87 asm volatile("ptesync": : :"memory");
88 if (cpu_has_feature(CPU_FTR_POWER9_DD1))
89 asm volatile(PPC_INVALIDATE_ERAT : : :"memory");
86} 90}
87 91
88static inline void _tlbie_va(unsigned long va, unsigned long pid, 92static inline void _tlbie_va(unsigned long va, unsigned long pid,