diff options
| -rw-r--r-- | arch/sparc/kernel/asm-offsets.c | 2 | ||||
| -rw-r--r-- | arch/sparc/mm/hypersparc.S | 8 | ||||
| -rw-r--r-- | arch/sparc/mm/swift.S | 8 | ||||
| -rw-r--r-- | arch/sparc/mm/tsunami.S | 6 | ||||
| -rw-r--r-- | arch/sparc/mm/viking.S | 10 |
5 files changed, 18 insertions, 16 deletions
diff --git a/arch/sparc/kernel/asm-offsets.c b/arch/sparc/kernel/asm-offsets.c index 961b87f99e69..f76389a32342 100644 --- a/arch/sparc/kernel/asm-offsets.c +++ b/arch/sparc/kernel/asm-offsets.c | |||
| @@ -49,6 +49,8 @@ int foo(void) | |||
| 49 | DEFINE(AOFF_task_thread, offsetof(struct task_struct, thread)); | 49 | DEFINE(AOFF_task_thread, offsetof(struct task_struct, thread)); |
| 50 | BLANK(); | 50 | BLANK(); |
| 51 | DEFINE(AOFF_mm_context, offsetof(struct mm_struct, context)); | 51 | DEFINE(AOFF_mm_context, offsetof(struct mm_struct, context)); |
| 52 | BLANK(); | ||
| 53 | DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm)); | ||
| 52 | 54 | ||
| 53 | /* DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28); */ | 55 | /* DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28); */ |
| 54 | return 0; | 56 | return 0; |
diff --git a/arch/sparc/mm/hypersparc.S b/arch/sparc/mm/hypersparc.S index 44aad32eeb4e..969f96450f69 100644 --- a/arch/sparc/mm/hypersparc.S +++ b/arch/sparc/mm/hypersparc.S | |||
| @@ -74,7 +74,7 @@ hypersparc_flush_cache_mm_out: | |||
| 74 | 74 | ||
| 75 | /* The things we do for performance... */ | 75 | /* The things we do for performance... */ |
| 76 | hypersparc_flush_cache_range: | 76 | hypersparc_flush_cache_range: |
| 77 | ld [%o0 + 0x0], %o0 /* XXX vma->vm_mm, GROSS XXX */ | 77 | ld [%o0 + VMA_VM_MM], %o0 |
| 78 | #ifndef CONFIG_SMP | 78 | #ifndef CONFIG_SMP |
| 79 | ld [%o0 + AOFF_mm_context], %g1 | 79 | ld [%o0 + AOFF_mm_context], %g1 |
| 80 | cmp %g1, -1 | 80 | cmp %g1, -1 |
| @@ -163,7 +163,7 @@ hypersparc_flush_cache_range_out: | |||
| 163 | */ | 163 | */ |
| 164 | /* Verified, my ass... */ | 164 | /* Verified, my ass... */ |
| 165 | hypersparc_flush_cache_page: | 165 | hypersparc_flush_cache_page: |
| 166 | ld [%o0 + 0x0], %o0 /* XXX vma->vm_mm, GROSS XXX */ | 166 | ld [%o0 + VMA_VM_MM], %o0 |
| 167 | ld [%o0 + AOFF_mm_context], %g2 | 167 | ld [%o0 + AOFF_mm_context], %g2 |
| 168 | #ifndef CONFIG_SMP | 168 | #ifndef CONFIG_SMP |
| 169 | cmp %g2, -1 | 169 | cmp %g2, -1 |
| @@ -284,7 +284,7 @@ hypersparc_flush_tlb_mm_out: | |||
| 284 | sta %g5, [%g1] ASI_M_MMUREGS | 284 | sta %g5, [%g1] ASI_M_MMUREGS |
| 285 | 285 | ||
| 286 | hypersparc_flush_tlb_range: | 286 | hypersparc_flush_tlb_range: |
| 287 | ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */ | 287 | ld [%o0 + VMA_VM_MM], %o0 |
| 288 | mov SRMMU_CTX_REG, %g1 | 288 | mov SRMMU_CTX_REG, %g1 |
| 289 | ld [%o0 + AOFF_mm_context], %o3 | 289 | ld [%o0 + AOFF_mm_context], %o3 |
| 290 | lda [%g1] ASI_M_MMUREGS, %g5 | 290 | lda [%g1] ASI_M_MMUREGS, %g5 |
| @@ -307,7 +307,7 @@ hypersparc_flush_tlb_range_out: | |||
| 307 | sta %g5, [%g1] ASI_M_MMUREGS | 307 | sta %g5, [%g1] ASI_M_MMUREGS |
| 308 | 308 | ||
| 309 | hypersparc_flush_tlb_page: | 309 | hypersparc_flush_tlb_page: |
| 310 | ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */ | 310 | ld [%o0 + VMA_VM_MM], %o0 |
| 311 | mov SRMMU_CTX_REG, %g1 | 311 | mov SRMMU_CTX_REG, %g1 |
| 312 | ld [%o0 + AOFF_mm_context], %o3 | 312 | ld [%o0 + AOFF_mm_context], %o3 |
| 313 | andn %o1, (PAGE_SIZE - 1), %o1 | 313 | andn %o1, (PAGE_SIZE - 1), %o1 |
diff --git a/arch/sparc/mm/swift.S b/arch/sparc/mm/swift.S index c801c3953a00..5d2b88d39424 100644 --- a/arch/sparc/mm/swift.S +++ b/arch/sparc/mm/swift.S | |||
| @@ -105,7 +105,7 @@ swift_flush_cache_mm_out: | |||
| 105 | 105 | ||
| 106 | .globl swift_flush_cache_range | 106 | .globl swift_flush_cache_range |
| 107 | swift_flush_cache_range: | 107 | swift_flush_cache_range: |
| 108 | ld [%o0 + 0x0], %o0 /* XXX vma->vm_mm, GROSS XXX */ | 108 | ld [%o0 + VMA_VM_MM], %o0 |
| 109 | sub %o2, %o1, %o2 | 109 | sub %o2, %o1, %o2 |
| 110 | sethi %hi(4096), %o3 | 110 | sethi %hi(4096), %o3 |
| 111 | cmp %o2, %o3 | 111 | cmp %o2, %o3 |
| @@ -116,7 +116,7 @@ swift_flush_cache_range: | |||
| 116 | 116 | ||
| 117 | .globl swift_flush_cache_page | 117 | .globl swift_flush_cache_page |
| 118 | swift_flush_cache_page: | 118 | swift_flush_cache_page: |
| 119 | ld [%o0 + 0x0], %o0 /* XXX vma->vm_mm, GROSS XXX */ | 119 | ld [%o0 + VMA_VM_MM], %o0 |
| 120 | 70: | 120 | 70: |
| 121 | ld [%o0 + AOFF_mm_context], %g2 | 121 | ld [%o0 + AOFF_mm_context], %g2 |
| 122 | cmp %g2, -1 | 122 | cmp %g2, -1 |
| @@ -219,7 +219,7 @@ swift_flush_sig_insns: | |||
| 219 | .globl swift_flush_tlb_range | 219 | .globl swift_flush_tlb_range |
| 220 | .globl swift_flush_tlb_all | 220 | .globl swift_flush_tlb_all |
| 221 | swift_flush_tlb_range: | 221 | swift_flush_tlb_range: |
| 222 | ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */ | 222 | ld [%o0 + VMA_VM_MM], %o0 |
| 223 | swift_flush_tlb_mm: | 223 | swift_flush_tlb_mm: |
| 224 | ld [%o0 + AOFF_mm_context], %g2 | 224 | ld [%o0 + AOFF_mm_context], %g2 |
| 225 | cmp %g2, -1 | 225 | cmp %g2, -1 |
| @@ -233,7 +233,7 @@ swift_flush_tlb_all_out: | |||
| 233 | 233 | ||
| 234 | .globl swift_flush_tlb_page | 234 | .globl swift_flush_tlb_page |
| 235 | swift_flush_tlb_page: | 235 | swift_flush_tlb_page: |
| 236 | ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */ | 236 | ld [%o0 + VMA_VM_MM], %o0 |
| 237 | mov SRMMU_CTX_REG, %g1 | 237 | mov SRMMU_CTX_REG, %g1 |
| 238 | ld [%o0 + AOFF_mm_context], %o3 | 238 | ld [%o0 + AOFF_mm_context], %o3 |
| 239 | andn %o1, (PAGE_SIZE - 1), %o1 | 239 | andn %o1, (PAGE_SIZE - 1), %o1 |
diff --git a/arch/sparc/mm/tsunami.S b/arch/sparc/mm/tsunami.S index 4e55e8f76648..bf10a345fa8b 100644 --- a/arch/sparc/mm/tsunami.S +++ b/arch/sparc/mm/tsunami.S | |||
| @@ -24,7 +24,7 @@ | |||
| 24 | /* Sliiick... */ | 24 | /* Sliiick... */ |
| 25 | tsunami_flush_cache_page: | 25 | tsunami_flush_cache_page: |
| 26 | tsunami_flush_cache_range: | 26 | tsunami_flush_cache_range: |
| 27 | ld [%o0 + 0x0], %o0 /* XXX vma->vm_mm, GROSS XXX */ | 27 | ld [%o0 + VMA_VM_MM], %o0 |
| 28 | tsunami_flush_cache_mm: | 28 | tsunami_flush_cache_mm: |
| 29 | ld [%o0 + AOFF_mm_context], %g2 | 29 | ld [%o0 + AOFF_mm_context], %g2 |
| 30 | cmp %g2, -1 | 30 | cmp %g2, -1 |
| @@ -46,7 +46,7 @@ tsunami_flush_sig_insns: | |||
| 46 | 46 | ||
| 47 | /* More slick stuff... */ | 47 | /* More slick stuff... */ |
| 48 | tsunami_flush_tlb_range: | 48 | tsunami_flush_tlb_range: |
| 49 | ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */ | 49 | ld [%o0 + VMA_VM_MM], %o0 |
| 50 | tsunami_flush_tlb_mm: | 50 | tsunami_flush_tlb_mm: |
| 51 | ld [%o0 + AOFF_mm_context], %g2 | 51 | ld [%o0 + AOFF_mm_context], %g2 |
| 52 | cmp %g2, -1 | 52 | cmp %g2, -1 |
| @@ -65,7 +65,7 @@ tsunami_flush_tlb_out: | |||
| 65 | 65 | ||
| 66 | /* This one can be done in a fine grained manner... */ | 66 | /* This one can be done in a fine grained manner... */ |
| 67 | tsunami_flush_tlb_page: | 67 | tsunami_flush_tlb_page: |
| 68 | ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */ | 68 | ld [%o0 + VMA_VM_MM], %o0 |
| 69 | mov SRMMU_CTX_REG, %g1 | 69 | mov SRMMU_CTX_REG, %g1 |
| 70 | ld [%o0 + AOFF_mm_context], %o3 | 70 | ld [%o0 + AOFF_mm_context], %o3 |
| 71 | andn %o1, (PAGE_SIZE - 1), %o1 | 71 | andn %o1, (PAGE_SIZE - 1), %o1 |
diff --git a/arch/sparc/mm/viking.S b/arch/sparc/mm/viking.S index bf8ee0613ae7..852257fcc82b 100644 --- a/arch/sparc/mm/viking.S +++ b/arch/sparc/mm/viking.S | |||
| @@ -108,7 +108,7 @@ viking_mxcc_flush_page: | |||
| 108 | viking_flush_cache_page: | 108 | viking_flush_cache_page: |
| 109 | viking_flush_cache_range: | 109 | viking_flush_cache_range: |
| 110 | #ifndef CONFIG_SMP | 110 | #ifndef CONFIG_SMP |
| 111 | ld [%o0 + 0x0], %o0 /* XXX vma->vm_mm, GROSS XXX */ | 111 | ld [%o0 + VMA_VM_MM], %o0 |
| 112 | #endif | 112 | #endif |
| 113 | viking_flush_cache_mm: | 113 | viking_flush_cache_mm: |
| 114 | #ifndef CONFIG_SMP | 114 | #ifndef CONFIG_SMP |
| @@ -148,7 +148,7 @@ viking_flush_tlb_mm: | |||
| 148 | #endif | 148 | #endif |
| 149 | 149 | ||
| 150 | viking_flush_tlb_range: | 150 | viking_flush_tlb_range: |
| 151 | ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */ | 151 | ld [%o0 + VMA_VM_MM], %o0 |
| 152 | mov SRMMU_CTX_REG, %g1 | 152 | mov SRMMU_CTX_REG, %g1 |
| 153 | ld [%o0 + AOFF_mm_context], %o3 | 153 | ld [%o0 + AOFF_mm_context], %o3 |
| 154 | lda [%g1] ASI_M_MMUREGS, %g5 | 154 | lda [%g1] ASI_M_MMUREGS, %g5 |
| @@ -173,7 +173,7 @@ viking_flush_tlb_range: | |||
| 173 | #endif | 173 | #endif |
| 174 | 174 | ||
| 175 | viking_flush_tlb_page: | 175 | viking_flush_tlb_page: |
| 176 | ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */ | 176 | ld [%o0 + VMA_VM_MM], %o0 |
| 177 | mov SRMMU_CTX_REG, %g1 | 177 | mov SRMMU_CTX_REG, %g1 |
| 178 | ld [%o0 + AOFF_mm_context], %o3 | 178 | ld [%o0 + AOFF_mm_context], %o3 |
| 179 | lda [%g1] ASI_M_MMUREGS, %g5 | 179 | lda [%g1] ASI_M_MMUREGS, %g5 |
| @@ -239,7 +239,7 @@ sun4dsmp_flush_tlb_range: | |||
| 239 | tst %g5 | 239 | tst %g5 |
| 240 | bne 3f | 240 | bne 3f |
| 241 | mov SRMMU_CTX_REG, %g1 | 241 | mov SRMMU_CTX_REG, %g1 |
| 242 | ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */ | 242 | ld [%o0 + VMA_VM_MM], %o0 |
| 243 | ld [%o0 + AOFF_mm_context], %o3 | 243 | ld [%o0 + AOFF_mm_context], %o3 |
| 244 | lda [%g1] ASI_M_MMUREGS, %g5 | 244 | lda [%g1] ASI_M_MMUREGS, %g5 |
| 245 | sethi %hi(~((1 << SRMMU_PGDIR_SHIFT) - 1)), %o4 | 245 | sethi %hi(~((1 << SRMMU_PGDIR_SHIFT) - 1)), %o4 |
| @@ -265,7 +265,7 @@ sun4dsmp_flush_tlb_page: | |||
| 265 | tst %g5 | 265 | tst %g5 |
| 266 | bne 2f | 266 | bne 2f |
| 267 | mov SRMMU_CTX_REG, %g1 | 267 | mov SRMMU_CTX_REG, %g1 |
| 268 | ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */ | 268 | ld [%o0 + VMA_VM_MM], %o0 |
| 269 | ld [%o0 + AOFF_mm_context], %o3 | 269 | ld [%o0 + AOFF_mm_context], %o3 |
| 270 | lda [%g1] ASI_M_MMUREGS, %g5 | 270 | lda [%g1] ASI_M_MMUREGS, %g5 |
| 271 | and %o1, PAGE_MASK, %o1 | 271 | and %o1, PAGE_MASK, %o1 |
