diff options
| -rw-r--r-- | drivers/dma/at_xdmac.c | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c index b5e132d4bae5..f2b6e7d22765 100644 --- a/drivers/dma/at_xdmac.c +++ b/drivers/dma/at_xdmac.c | |||
| @@ -863,8 +863,12 @@ at_xdmac_interleaved_queue_desc(struct dma_chan *chan, | |||
| 863 | * access. Hopefully we can access DDR through both ports (at least on | 863 | * access. Hopefully we can access DDR through both ports (at least on |
| 864 | * SAMA5D4x), so we can use the same interface for source and dest, | 864 | * SAMA5D4x), so we can use the same interface for source and dest, |
| 865 | * that solves the fact we don't know the direction. | 865 | * that solves the fact we don't know the direction. |
| 866 | * ERRATA: Even if useless for memory transfers, the PERID has to not | ||
| 867 | * match the one of another channel. If not, it could lead to spurious | ||
| 868 | * flag status. | ||
| 866 | */ | 869 | */ |
| 867 | u32 chan_cc = AT_XDMAC_CC_DIF(0) | 870 | u32 chan_cc = AT_XDMAC_CC_PERID(0x3f) |
| 871 | | AT_XDMAC_CC_DIF(0) | ||
| 868 | | AT_XDMAC_CC_SIF(0) | 872 | | AT_XDMAC_CC_SIF(0) |
| 869 | | AT_XDMAC_CC_MBSIZE_SIXTEEN | 873 | | AT_XDMAC_CC_MBSIZE_SIXTEEN |
| 870 | | AT_XDMAC_CC_TYPE_MEM_TRAN; | 874 | | AT_XDMAC_CC_TYPE_MEM_TRAN; |
| @@ -1039,8 +1043,12 @@ at_xdmac_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, | |||
| 1039 | * access DDR through both ports (at least on SAMA5D4x), so we can use | 1043 | * access DDR through both ports (at least on SAMA5D4x), so we can use |
| 1040 | * the same interface for source and dest, that solves the fact we | 1044 | * the same interface for source and dest, that solves the fact we |
| 1041 | * don't know the direction. | 1045 | * don't know the direction. |
| 1046 | * ERRATA: Even if useless for memory transfers, the PERID has to not | ||
| 1047 | * match the one of another channel. If not, it could lead to spurious | ||
| 1048 | * flag status. | ||
| 1042 | */ | 1049 | */ |
| 1043 | u32 chan_cc = AT_XDMAC_CC_DAM_INCREMENTED_AM | 1050 | u32 chan_cc = AT_XDMAC_CC_PERID(0x3f) |
| 1051 | | AT_XDMAC_CC_DAM_INCREMENTED_AM | ||
| 1044 | | AT_XDMAC_CC_SAM_INCREMENTED_AM | 1052 | | AT_XDMAC_CC_SAM_INCREMENTED_AM |
| 1045 | | AT_XDMAC_CC_DIF(0) | 1053 | | AT_XDMAC_CC_DIF(0) |
| 1046 | | AT_XDMAC_CC_SIF(0) | 1054 | | AT_XDMAC_CC_SIF(0) |
| @@ -1140,8 +1148,12 @@ static struct at_xdmac_desc *at_xdmac_memset_create_desc(struct dma_chan *chan, | |||
| 1140 | * access. Hopefully we can access DDR through both ports (at least on | 1148 | * access. Hopefully we can access DDR through both ports (at least on |
| 1141 | * SAMA5D4x), so we can use the same interface for source and dest, | 1149 | * SAMA5D4x), so we can use the same interface for source and dest, |
| 1142 | * that solves the fact we don't know the direction. | 1150 | * that solves the fact we don't know the direction. |
| 1151 | * ERRATA: Even if useless for memory transfers, the PERID has to not | ||
| 1152 | * match the one of another channel. If not, it could lead to spurious | ||
| 1153 | * flag status. | ||
| 1143 | */ | 1154 | */ |
| 1144 | u32 chan_cc = AT_XDMAC_CC_DAM_UBS_AM | 1155 | u32 chan_cc = AT_XDMAC_CC_PERID(0x3f) |
| 1156 | | AT_XDMAC_CC_DAM_UBS_AM | ||
| 1145 | | AT_XDMAC_CC_SAM_INCREMENTED_AM | 1157 | | AT_XDMAC_CC_SAM_INCREMENTED_AM |
| 1146 | | AT_XDMAC_CC_DIF(0) | 1158 | | AT_XDMAC_CC_DIF(0) |
| 1147 | | AT_XDMAC_CC_SIF(0) | 1159 | | AT_XDMAC_CC_SIF(0) |