diff options
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-cherryview.c | 16 | ||||
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-sunrisepoint.c | 45 | ||||
| -rw-r--r-- | drivers/pinctrl/meson/pinctrl-meson-axg.c | 2 |
3 files changed, 55 insertions, 8 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index b1ae1618fefe..fee9225ca559 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c | |||
| @@ -1622,22 +1622,30 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq) | |||
| 1622 | 1622 | ||
| 1623 | if (!need_valid_mask) { | 1623 | if (!need_valid_mask) { |
| 1624 | irq_base = devm_irq_alloc_descs(pctrl->dev, -1, 0, | 1624 | irq_base = devm_irq_alloc_descs(pctrl->dev, -1, 0, |
| 1625 | chip->ngpio, NUMA_NO_NODE); | 1625 | community->npins, NUMA_NO_NODE); |
| 1626 | if (irq_base < 0) { | 1626 | if (irq_base < 0) { |
| 1627 | dev_err(pctrl->dev, "Failed to allocate IRQ numbers\n"); | 1627 | dev_err(pctrl->dev, "Failed to allocate IRQ numbers\n"); |
| 1628 | return irq_base; | 1628 | return irq_base; |
| 1629 | } | 1629 | } |
| 1630 | } else { | ||
| 1631 | irq_base = 0; | ||
| 1632 | } | 1630 | } |
| 1633 | 1631 | ||
| 1634 | ret = gpiochip_irqchip_add(chip, &chv_gpio_irqchip, irq_base, | 1632 | ret = gpiochip_irqchip_add(chip, &chv_gpio_irqchip, 0, |
| 1635 | handle_bad_irq, IRQ_TYPE_NONE); | 1633 | handle_bad_irq, IRQ_TYPE_NONE); |
| 1636 | if (ret) { | 1634 | if (ret) { |
| 1637 | dev_err(pctrl->dev, "failed to add IRQ chip\n"); | 1635 | dev_err(pctrl->dev, "failed to add IRQ chip\n"); |
| 1638 | return ret; | 1636 | return ret; |
| 1639 | } | 1637 | } |
| 1640 | 1638 | ||
| 1639 | if (!need_valid_mask) { | ||
| 1640 | for (i = 0; i < community->ngpio_ranges; i++) { | ||
| 1641 | range = &community->gpio_ranges[i]; | ||
| 1642 | |||
| 1643 | irq_domain_associate_many(chip->irq.domain, irq_base, | ||
| 1644 | range->base, range->npins); | ||
| 1645 | irq_base += range->npins; | ||
| 1646 | } | ||
| 1647 | } | ||
| 1648 | |||
| 1641 | gpiochip_set_chained_irqchip(chip, &chv_gpio_irqchip, irq, | 1649 | gpiochip_set_chained_irqchip(chip, &chv_gpio_irqchip, irq, |
| 1642 | chv_gpio_irq_handler); | 1650 | chv_gpio_irq_handler); |
| 1643 | return 0; | 1651 | return 0; |
diff --git a/drivers/pinctrl/intel/pinctrl-sunrisepoint.c b/drivers/pinctrl/intel/pinctrl-sunrisepoint.c index 8870a4100164..fee3435a6f15 100644 --- a/drivers/pinctrl/intel/pinctrl-sunrisepoint.c +++ b/drivers/pinctrl/intel/pinctrl-sunrisepoint.c | |||
| @@ -36,6 +36,27 @@ | |||
| 36 | .npins = ((e) - (s) + 1), \ | 36 | .npins = ((e) - (s) + 1), \ |
| 37 | } | 37 | } |
| 38 | 38 | ||
| 39 | #define SPTH_GPP(r, s, e, g) \ | ||
| 40 | { \ | ||
| 41 | .reg_num = (r), \ | ||
| 42 | .base = (s), \ | ||
| 43 | .size = ((e) - (s) + 1), \ | ||
| 44 | .gpio_base = (g), \ | ||
| 45 | } | ||
| 46 | |||
| 47 | #define SPTH_COMMUNITY(b, s, e, g) \ | ||
| 48 | { \ | ||
| 49 | .barno = (b), \ | ||
| 50 | .padown_offset = SPT_PAD_OWN, \ | ||
| 51 | .padcfglock_offset = SPT_PADCFGLOCK, \ | ||
| 52 | .hostown_offset = SPT_HOSTSW_OWN, \ | ||
| 53 | .ie_offset = SPT_GPI_IE, \ | ||
| 54 | .pin_base = (s), \ | ||
| 55 | .npins = ((e) - (s) + 1), \ | ||
| 56 | .gpps = (g), \ | ||
| 57 | .ngpps = ARRAY_SIZE(g), \ | ||
| 58 | } | ||
| 59 | |||
| 39 | /* Sunrisepoint-LP */ | 60 | /* Sunrisepoint-LP */ |
| 40 | static const struct pinctrl_pin_desc sptlp_pins[] = { | 61 | static const struct pinctrl_pin_desc sptlp_pins[] = { |
| 41 | /* GPP_A */ | 62 | /* GPP_A */ |
| @@ -531,10 +552,28 @@ static const struct intel_function spth_functions[] = { | |||
| 531 | FUNCTION("i2c2", spth_i2c2_groups), | 552 | FUNCTION("i2c2", spth_i2c2_groups), |
| 532 | }; | 553 | }; |
| 533 | 554 | ||
| 555 | static const struct intel_padgroup spth_community0_gpps[] = { | ||
| 556 | SPTH_GPP(0, 0, 23, 0), /* GPP_A */ | ||
| 557 | SPTH_GPP(1, 24, 47, 24), /* GPP_B */ | ||
| 558 | }; | ||
| 559 | |||
| 560 | static const struct intel_padgroup spth_community1_gpps[] = { | ||
| 561 | SPTH_GPP(0, 48, 71, 48), /* GPP_C */ | ||
| 562 | SPTH_GPP(1, 72, 95, 72), /* GPP_D */ | ||
| 563 | SPTH_GPP(2, 96, 108, 96), /* GPP_E */ | ||
| 564 | SPTH_GPP(3, 109, 132, 120), /* GPP_F */ | ||
| 565 | SPTH_GPP(4, 133, 156, 144), /* GPP_G */ | ||
| 566 | SPTH_GPP(5, 157, 180, 168), /* GPP_H */ | ||
| 567 | }; | ||
| 568 | |||
| 569 | static const struct intel_padgroup spth_community3_gpps[] = { | ||
| 570 | SPTH_GPP(0, 181, 191, 192), /* GPP_I */ | ||
| 571 | }; | ||
| 572 | |||
| 534 | static const struct intel_community spth_communities[] = { | 573 | static const struct intel_community spth_communities[] = { |
| 535 | SPT_COMMUNITY(0, 0, 47), | 574 | SPTH_COMMUNITY(0, 0, 47, spth_community0_gpps), |
| 536 | SPT_COMMUNITY(1, 48, 180), | 575 | SPTH_COMMUNITY(1, 48, 180, spth_community1_gpps), |
| 537 | SPT_COMMUNITY(2, 181, 191), | 576 | SPTH_COMMUNITY(2, 181, 191, spth_community3_gpps), |
| 538 | }; | 577 | }; |
| 539 | 578 | ||
| 540 | static const struct intel_pinctrl_soc_data spth_soc_data = { | 579 | static const struct intel_pinctrl_soc_data spth_soc_data = { |
diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg.c b/drivers/pinctrl/meson/pinctrl-meson-axg.c index 4b91ff74779b..99a6ceac8e53 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-axg.c +++ b/drivers/pinctrl/meson/pinctrl-meson-axg.c | |||
| @@ -898,7 +898,7 @@ static struct meson_bank meson_axg_periphs_banks[] = { | |||
| 898 | 898 | ||
| 899 | static struct meson_bank meson_axg_aobus_banks[] = { | 899 | static struct meson_bank meson_axg_aobus_banks[] = { |
| 900 | /* name first last irq pullen pull dir out in */ | 900 | /* name first last irq pullen pull dir out in */ |
| 901 | BANK("AO", GPIOAO_0, GPIOAO_9, 0, 13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0), | 901 | BANK("AO", GPIOAO_0, GPIOAO_13, 0, 13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0), |
| 902 | }; | 902 | }; |
| 903 | 903 | ||
| 904 | static struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = { | 904 | static struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = { |
