diff options
| -rw-r--r-- | arch/x86/events/intel/uncore.h | 123 |
1 files changed, 122 insertions, 1 deletions
diff --git a/arch/x86/events/intel/uncore.h b/arch/x86/events/intel/uncore.h index 414dc7e7c950..eb0265359019 100644 --- a/arch/x86/events/intel/uncore.h +++ b/arch/x86/events/intel/uncore.h | |||
| @@ -12,8 +12,13 @@ | |||
| 12 | 12 | ||
| 13 | #define UNCORE_FIXED_EVENT 0xff | 13 | #define UNCORE_FIXED_EVENT 0xff |
| 14 | #define UNCORE_PMC_IDX_MAX_GENERIC 8 | 14 | #define UNCORE_PMC_IDX_MAX_GENERIC 8 |
| 15 | #define UNCORE_PMC_IDX_MAX_FIXED 1 | ||
| 16 | #define UNCORE_PMC_IDX_MAX_FREERUNNING 1 | ||
| 15 | #define UNCORE_PMC_IDX_FIXED UNCORE_PMC_IDX_MAX_GENERIC | 17 | #define UNCORE_PMC_IDX_FIXED UNCORE_PMC_IDX_MAX_GENERIC |
| 16 | #define UNCORE_PMC_IDX_MAX (UNCORE_PMC_IDX_FIXED + 1) | 18 | #define UNCORE_PMC_IDX_FREERUNNING (UNCORE_PMC_IDX_FIXED + \ |
| 19 | UNCORE_PMC_IDX_MAX_FIXED) | ||
| 20 | #define UNCORE_PMC_IDX_MAX (UNCORE_PMC_IDX_FREERUNNING + \ | ||
| 21 | UNCORE_PMC_IDX_MAX_FREERUNNING) | ||
| 17 | 22 | ||
| 18 | #define UNCORE_PCI_DEV_FULL_DATA(dev, func, type, idx) \ | 23 | #define UNCORE_PCI_DEV_FULL_DATA(dev, func, type, idx) \ |
| 19 | ((dev << 24) | (func << 16) | (type << 8) | idx) | 24 | ((dev << 24) | (func << 16) | (type << 8) | idx) |
| @@ -35,6 +40,7 @@ struct intel_uncore_ops; | |||
| 35 | struct intel_uncore_pmu; | 40 | struct intel_uncore_pmu; |
| 36 | struct intel_uncore_box; | 41 | struct intel_uncore_box; |
| 37 | struct uncore_event_desc; | 42 | struct uncore_event_desc; |
| 43 | struct freerunning_counters; | ||
| 38 | 44 | ||
| 39 | struct intel_uncore_type { | 45 | struct intel_uncore_type { |
| 40 | const char *name; | 46 | const char *name; |
| @@ -42,6 +48,7 @@ struct intel_uncore_type { | |||
| 42 | int num_boxes; | 48 | int num_boxes; |
| 43 | int perf_ctr_bits; | 49 | int perf_ctr_bits; |
| 44 | int fixed_ctr_bits; | 50 | int fixed_ctr_bits; |
| 51 | int num_freerunning_types; | ||
| 45 | unsigned perf_ctr; | 52 | unsigned perf_ctr; |
| 46 | unsigned event_ctl; | 53 | unsigned event_ctl; |
| 47 | unsigned event_mask; | 54 | unsigned event_mask; |
| @@ -59,6 +66,7 @@ struct intel_uncore_type { | |||
| 59 | struct intel_uncore_pmu *pmus; | 66 | struct intel_uncore_pmu *pmus; |
| 60 | struct intel_uncore_ops *ops; | 67 | struct intel_uncore_ops *ops; |
| 61 | struct uncore_event_desc *event_descs; | 68 | struct uncore_event_desc *event_descs; |
| 69 | struct freerunning_counters *freerunning; | ||
| 62 | const struct attribute_group *attr_groups[4]; | 70 | const struct attribute_group *attr_groups[4]; |
| 63 | struct pmu *pmu; /* for custom pmu ops */ | 71 | struct pmu *pmu; /* for custom pmu ops */ |
| 64 | }; | 72 | }; |
| @@ -129,6 +137,14 @@ struct uncore_event_desc { | |||
| 129 | const char *config; | 137 | const char *config; |
| 130 | }; | 138 | }; |
| 131 | 139 | ||
| 140 | struct freerunning_counters { | ||
| 141 | unsigned int counter_base; | ||
| 142 | unsigned int counter_offset; | ||
| 143 | unsigned int box_offset; | ||
| 144 | unsigned int num_counters; | ||
| 145 | unsigned int bits; | ||
| 146 | }; | ||
| 147 | |||
| 132 | struct pci2phy_map { | 148 | struct pci2phy_map { |
| 133 | struct list_head list; | 149 | struct list_head list; |
| 134 | int segment; | 150 | int segment; |
| @@ -157,6 +173,16 @@ static ssize_t __uncore_##_var##_show(struct kobject *kobj, \ | |||
| 157 | static struct kobj_attribute format_attr_##_var = \ | 173 | static struct kobj_attribute format_attr_##_var = \ |
| 158 | __ATTR(_name, 0444, __uncore_##_var##_show, NULL) | 174 | __ATTR(_name, 0444, __uncore_##_var##_show, NULL) |
| 159 | 175 | ||
| 176 | static inline bool uncore_pmc_fixed(int idx) | ||
| 177 | { | ||
| 178 | return idx == UNCORE_PMC_IDX_FIXED; | ||
| 179 | } | ||
| 180 | |||
| 181 | static inline bool uncore_pmc_freerunning(int idx) | ||
| 182 | { | ||
| 183 | return idx == UNCORE_PMC_IDX_FREERUNNING; | ||
| 184 | } | ||
| 185 | |||
| 160 | static inline unsigned uncore_pci_box_ctl(struct intel_uncore_box *box) | 186 | static inline unsigned uncore_pci_box_ctl(struct intel_uncore_box *box) |
| 161 | { | 187 | { |
| 162 | return box->pmu->type->box_ctl; | 188 | return box->pmu->type->box_ctl; |
| @@ -214,6 +240,60 @@ static inline unsigned uncore_msr_fixed_ctr(struct intel_uncore_box *box) | |||
| 214 | return box->pmu->type->fixed_ctr + uncore_msr_box_offset(box); | 240 | return box->pmu->type->fixed_ctr + uncore_msr_box_offset(box); |
| 215 | } | 241 | } |
| 216 | 242 | ||
| 243 | |||
| 244 | /* | ||
| 245 | * In the uncore document, there is no event-code assigned to free running | ||
| 246 | * counters. Some events need to be defined to indicate the free running | ||
| 247 | * counters. The events are encoded as event-code + umask-code. | ||
| 248 | * | ||
| 249 | * The event-code for all free running counters is 0xff, which is the same as | ||
| 250 | * the fixed counters. | ||
| 251 | * | ||
| 252 | * The umask-code is used to distinguish a fixed counter and a free running | ||
| 253 | * counter, and different types of free running counters. | ||
| 254 | * - For fixed counters, the umask-code is 0x0X. | ||
| 255 | * X indicates the index of the fixed counter, which starts from 0. | ||
| 256 | * - For free running counters, the umask-code uses the rest of the space. | ||
| 257 | * It would bare the format of 0xXY. | ||
| 258 | * X stands for the type of free running counters, which starts from 1. | ||
| 259 | * Y stands for the index of free running counters of same type, which | ||
| 260 | * starts from 0. | ||
| 261 | * | ||
| 262 | * For example, there are three types of IIO free running counters on Skylake | ||
| 263 | * server, IO CLOCKS counters, BANDWIDTH counters and UTILIZATION counters. | ||
| 264 | * The event-code for all the free running counters is 0xff. | ||
| 265 | * 'ioclk' is the first counter of IO CLOCKS. IO CLOCKS is the first type, | ||
| 266 | * which umask-code starts from 0x10. | ||
| 267 | * So 'ioclk' is encoded as event=0xff,umask=0x10 | ||
| 268 | * 'bw_in_port2' is the third counter of BANDWIDTH counters. BANDWIDTH is | ||
| 269 | * the second type, which umask-code starts from 0x20. | ||
| 270 | * So 'bw_in_port2' is encoded as event=0xff,umask=0x22 | ||
| 271 | */ | ||
| 272 | static inline unsigned int uncore_freerunning_idx(u64 config) | ||
| 273 | { | ||
| 274 | return ((config >> 8) & 0xf); | ||
| 275 | } | ||
| 276 | |||
| 277 | #define UNCORE_FREERUNNING_UMASK_START 0x10 | ||
| 278 | |||
| 279 | static inline unsigned int uncore_freerunning_type(u64 config) | ||
| 280 | { | ||
| 281 | return ((((config >> 8) - UNCORE_FREERUNNING_UMASK_START) >> 4) & 0xf); | ||
| 282 | } | ||
| 283 | |||
| 284 | static inline | ||
| 285 | unsigned int uncore_freerunning_counter(struct intel_uncore_box *box, | ||
| 286 | struct perf_event *event) | ||
| 287 | { | ||
| 288 | unsigned int type = uncore_freerunning_type(event->attr.config); | ||
| 289 | unsigned int idx = uncore_freerunning_idx(event->attr.config); | ||
| 290 | struct intel_uncore_pmu *pmu = box->pmu; | ||
| 291 | |||
| 292 | return pmu->type->freerunning[type].counter_base + | ||
| 293 | pmu->type->freerunning[type].counter_offset * idx + | ||
| 294 | pmu->type->freerunning[type].box_offset * pmu->pmu_idx; | ||
| 295 | } | ||
| 296 | |||
| 217 | static inline | 297 | static inline |
| 218 | unsigned uncore_msr_event_ctl(struct intel_uncore_box *box, int idx) | 298 | unsigned uncore_msr_event_ctl(struct intel_uncore_box *box, int idx) |
| 219 | { | 299 | { |
| @@ -276,11 +356,52 @@ static inline int uncore_fixed_ctr_bits(struct intel_uncore_box *box) | |||
| 276 | return box->pmu->type->fixed_ctr_bits; | 356 | return box->pmu->type->fixed_ctr_bits; |
| 277 | } | 357 | } |
| 278 | 358 | ||
| 359 | static inline | ||
| 360 | unsigned int uncore_freerunning_bits(struct intel_uncore_box *box, | ||
| 361 | struct perf_event *event) | ||
| 362 | { | ||
| 363 | unsigned int type = uncore_freerunning_type(event->attr.config); | ||
| 364 | |||
| 365 | return box->pmu->type->freerunning[type].bits; | ||
| 366 | } | ||
| 367 | |||
| 368 | static inline int uncore_num_freerunning(struct intel_uncore_box *box, | ||
| 369 | struct perf_event *event) | ||
| 370 | { | ||
| 371 | unsigned int type = uncore_freerunning_type(event->attr.config); | ||
| 372 | |||
| 373 | return box->pmu->type->freerunning[type].num_counters; | ||
| 374 | } | ||
| 375 | |||
| 376 | static inline int uncore_num_freerunning_types(struct intel_uncore_box *box, | ||
| 377 | struct perf_event *event) | ||
| 378 | { | ||
| 379 | return box->pmu->type->num_freerunning_types; | ||
| 380 | } | ||
| 381 | |||
| 382 | static inline bool check_valid_freerunning_event(struct intel_uncore_box *box, | ||
| 383 | struct perf_event *event) | ||
| 384 | { | ||
| 385 | unsigned int type = uncore_freerunning_type(event->attr.config); | ||
| 386 | unsigned int idx = uncore_freerunning_idx(event->attr.config); | ||
| 387 | |||
| 388 | return (type < uncore_num_freerunning_types(box, event)) && | ||
| 389 | (idx < uncore_num_freerunning(box, event)); | ||
| 390 | } | ||
| 391 | |||
| 279 | static inline int uncore_num_counters(struct intel_uncore_box *box) | 392 | static inline int uncore_num_counters(struct intel_uncore_box *box) |
| 280 | { | 393 | { |
| 281 | return box->pmu->type->num_counters; | 394 | return box->pmu->type->num_counters; |
| 282 | } | 395 | } |
| 283 | 396 | ||
| 397 | static inline bool is_freerunning_event(struct perf_event *event) | ||
| 398 | { | ||
| 399 | u64 cfg = event->attr.config; | ||
| 400 | |||
| 401 | return ((cfg & UNCORE_FIXED_EVENT) == UNCORE_FIXED_EVENT) && | ||
| 402 | (((cfg >> 8) & 0xff) >= UNCORE_FREERUNNING_UMASK_START); | ||
| 403 | } | ||
| 404 | |||
| 284 | static inline void uncore_disable_box(struct intel_uncore_box *box) | 405 | static inline void uncore_disable_box(struct intel_uncore_box *box) |
| 285 | { | 406 | { |
| 286 | if (box->pmu->type->ops->disable_box) | 407 | if (box->pmu->type->ops->disable_box) |
