diff options
| -rw-r--r-- | drivers/net/ethernet/allwinner/sun4i-emac.c | 25 | ||||
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/chain_mode.c | 55 | ||||
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/descs.h | 20 | ||||
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/descs_com.h | 48 | ||||
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c | 60 | ||||
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/enh_desc.c | 55 | ||||
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/norm_desc.c | 48 | ||||
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/ring_mode.c | 39 | ||||
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 51 |
9 files changed, 218 insertions, 183 deletions
diff --git a/drivers/net/ethernet/allwinner/sun4i-emac.c b/drivers/net/ethernet/allwinner/sun4i-emac.c index af27f9dbedf2..c8f4d26fc9d4 100644 --- a/drivers/net/ethernet/allwinner/sun4i-emac.c +++ b/drivers/net/ethernet/allwinner/sun4i-emac.c | |||
| @@ -37,6 +37,11 @@ | |||
| 37 | 37 | ||
| 38 | #define EMAC_MAX_FRAME_LEN 0x0600 | 38 | #define EMAC_MAX_FRAME_LEN 0x0600 |
| 39 | 39 | ||
| 40 | #define EMAC_DEFAULT_MSG_ENABLE 0x0000 | ||
| 41 | static int debug = -1; /* defaults above */; | ||
| 42 | module_param(debug, int, 0); | ||
| 43 | MODULE_PARM_DESC(debug, "debug message flags"); | ||
| 44 | |||
| 40 | /* Transmit timeout, default 5 seconds. */ | 45 | /* Transmit timeout, default 5 seconds. */ |
| 41 | static int watchdog = 5000; | 46 | static int watchdog = 5000; |
| 42 | module_param(watchdog, int, 0400); | 47 | module_param(watchdog, int, 0400); |
| @@ -225,11 +230,27 @@ static void emac_get_drvinfo(struct net_device *dev, | |||
| 225 | strlcpy(info->bus_info, dev_name(&dev->dev), sizeof(info->bus_info)); | 230 | strlcpy(info->bus_info, dev_name(&dev->dev), sizeof(info->bus_info)); |
| 226 | } | 231 | } |
| 227 | 232 | ||
| 233 | static u32 emac_get_msglevel(struct net_device *dev) | ||
| 234 | { | ||
| 235 | struct emac_board_info *db = netdev_priv(dev); | ||
| 236 | |||
| 237 | return db->msg_enable; | ||
| 238 | } | ||
| 239 | |||
| 240 | static void emac_set_msglevel(struct net_device *dev, u32 value) | ||
| 241 | { | ||
| 242 | struct emac_board_info *db = netdev_priv(dev); | ||
| 243 | |||
| 244 | db->msg_enable = value; | ||
| 245 | } | ||
| 246 | |||
| 228 | static const struct ethtool_ops emac_ethtool_ops = { | 247 | static const struct ethtool_ops emac_ethtool_ops = { |
| 229 | .get_drvinfo = emac_get_drvinfo, | 248 | .get_drvinfo = emac_get_drvinfo, |
| 230 | .get_link = ethtool_op_get_link, | 249 | .get_link = ethtool_op_get_link, |
| 231 | .get_link_ksettings = phy_ethtool_get_link_ksettings, | 250 | .get_link_ksettings = phy_ethtool_get_link_ksettings, |
| 232 | .set_link_ksettings = phy_ethtool_set_link_ksettings, | 251 | .set_link_ksettings = phy_ethtool_set_link_ksettings, |
| 252 | .get_msglevel = emac_get_msglevel, | ||
| 253 | .set_msglevel = emac_set_msglevel, | ||
| 233 | }; | 254 | }; |
| 234 | 255 | ||
| 235 | static unsigned int emac_setup(struct net_device *ndev) | 256 | static unsigned int emac_setup(struct net_device *ndev) |
| @@ -571,8 +592,7 @@ static void emac_rx(struct net_device *dev) | |||
| 571 | /* A packet ready now & Get status/length */ | 592 | /* A packet ready now & Get status/length */ |
| 572 | good_packet = true; | 593 | good_packet = true; |
| 573 | 594 | ||
| 574 | emac_inblk_32bit(db->membase + EMAC_RX_IO_DATA_REG, | 595 | rxhdr = readl(db->membase + EMAC_RX_IO_DATA_REG); |
| 575 | &rxhdr, sizeof(rxhdr)); | ||
| 576 | 596 | ||
| 577 | if (netif_msg_rx_status(db)) | 597 | if (netif_msg_rx_status(db)) |
| 578 | dev_dbg(db->dev, "rxhdr: %x\n", *((int *)(&rxhdr))); | 598 | dev_dbg(db->dev, "rxhdr: %x\n", *((int *)(&rxhdr))); |
| @@ -804,6 +824,7 @@ static int emac_probe(struct platform_device *pdev) | |||
| 804 | db->dev = &pdev->dev; | 824 | db->dev = &pdev->dev; |
| 805 | db->ndev = ndev; | 825 | db->ndev = ndev; |
| 806 | db->pdev = pdev; | 826 | db->pdev = pdev; |
| 827 | db->msg_enable = netif_msg_init(debug, EMAC_DEFAULT_MSG_ENABLE); | ||
| 807 | 828 | ||
| 808 | spin_lock_init(&db->lock); | 829 | spin_lock_init(&db->lock); |
| 809 | 830 | ||
diff --git a/drivers/net/ethernet/stmicro/stmmac/chain_mode.c b/drivers/net/ethernet/stmicro/stmmac/chain_mode.c index b3e669af3005..026e8e9cb942 100644 --- a/drivers/net/ethernet/stmicro/stmmac/chain_mode.c +++ b/drivers/net/ethernet/stmicro/stmmac/chain_mode.c | |||
| @@ -34,7 +34,7 @@ static int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
| 34 | unsigned int entry = priv->cur_tx; | 34 | unsigned int entry = priv->cur_tx; |
| 35 | struct dma_desc *desc = priv->dma_tx + entry; | 35 | struct dma_desc *desc = priv->dma_tx + entry; |
| 36 | unsigned int nopaged_len = skb_headlen(skb); | 36 | unsigned int nopaged_len = skb_headlen(skb); |
| 37 | unsigned int bmax; | 37 | unsigned int bmax, des2; |
| 38 | unsigned int i = 1, len; | 38 | unsigned int i = 1, len; |
| 39 | 39 | ||
| 40 | if (priv->plat->enh_desc) | 40 | if (priv->plat->enh_desc) |
| @@ -44,11 +44,12 @@ static int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
| 44 | 44 | ||
| 45 | len = nopaged_len - bmax; | 45 | len = nopaged_len - bmax; |
| 46 | 46 | ||
| 47 | desc->des2 = dma_map_single(priv->device, skb->data, | 47 | des2 = dma_map_single(priv->device, skb->data, |
| 48 | bmax, DMA_TO_DEVICE); | 48 | bmax, DMA_TO_DEVICE); |
| 49 | if (dma_mapping_error(priv->device, desc->des2)) | 49 | desc->des2 = cpu_to_le32(des2); |
| 50 | if (dma_mapping_error(priv->device, des2)) | ||
| 50 | return -1; | 51 | return -1; |
| 51 | priv->tx_skbuff_dma[entry].buf = desc->des2; | 52 | priv->tx_skbuff_dma[entry].buf = des2; |
| 52 | priv->tx_skbuff_dma[entry].len = bmax; | 53 | priv->tx_skbuff_dma[entry].len = bmax; |
| 53 | /* do not close the descriptor and do not set own bit */ | 54 | /* do not close the descriptor and do not set own bit */ |
| 54 | priv->hw->desc->prepare_tx_desc(desc, 1, bmax, csum, STMMAC_CHAIN_MODE, | 55 | priv->hw->desc->prepare_tx_desc(desc, 1, bmax, csum, STMMAC_CHAIN_MODE, |
| @@ -60,12 +61,13 @@ static int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
| 60 | desc = priv->dma_tx + entry; | 61 | desc = priv->dma_tx + entry; |
| 61 | 62 | ||
| 62 | if (len > bmax) { | 63 | if (len > bmax) { |
| 63 | desc->des2 = dma_map_single(priv->device, | 64 | des2 = dma_map_single(priv->device, |
| 64 | (skb->data + bmax * i), | 65 | (skb->data + bmax * i), |
| 65 | bmax, DMA_TO_DEVICE); | 66 | bmax, DMA_TO_DEVICE); |
| 66 | if (dma_mapping_error(priv->device, desc->des2)) | 67 | desc->des2 = cpu_to_le32(des2); |
| 68 | if (dma_mapping_error(priv->device, des2)) | ||
| 67 | return -1; | 69 | return -1; |
| 68 | priv->tx_skbuff_dma[entry].buf = desc->des2; | 70 | priv->tx_skbuff_dma[entry].buf = des2; |
| 69 | priv->tx_skbuff_dma[entry].len = bmax; | 71 | priv->tx_skbuff_dma[entry].len = bmax; |
| 70 | priv->hw->desc->prepare_tx_desc(desc, 0, bmax, csum, | 72 | priv->hw->desc->prepare_tx_desc(desc, 0, bmax, csum, |
| 71 | STMMAC_CHAIN_MODE, 1, | 73 | STMMAC_CHAIN_MODE, 1, |
| @@ -73,12 +75,13 @@ static int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
| 73 | len -= bmax; | 75 | len -= bmax; |
| 74 | i++; | 76 | i++; |
| 75 | } else { | 77 | } else { |
| 76 | desc->des2 = dma_map_single(priv->device, | 78 | des2 = dma_map_single(priv->device, |
| 77 | (skb->data + bmax * i), len, | 79 | (skb->data + bmax * i), len, |
| 78 | DMA_TO_DEVICE); | 80 | DMA_TO_DEVICE); |
| 79 | if (dma_mapping_error(priv->device, desc->des2)) | 81 | desc->des2 = cpu_to_le32(des2); |
| 82 | if (dma_mapping_error(priv->device, des2)) | ||
| 80 | return -1; | 83 | return -1; |
| 81 | priv->tx_skbuff_dma[entry].buf = desc->des2; | 84 | priv->tx_skbuff_dma[entry].buf = des2; |
| 82 | priv->tx_skbuff_dma[entry].len = len; | 85 | priv->tx_skbuff_dma[entry].len = len; |
| 83 | /* last descriptor can be set now */ | 86 | /* last descriptor can be set now */ |
| 84 | priv->hw->desc->prepare_tx_desc(desc, 0, len, csum, | 87 | priv->hw->desc->prepare_tx_desc(desc, 0, len, csum, |
| @@ -119,19 +122,19 @@ static void stmmac_init_dma_chain(void *des, dma_addr_t phy_addr, | |||
| 119 | struct dma_extended_desc *p = (struct dma_extended_desc *)des; | 122 | struct dma_extended_desc *p = (struct dma_extended_desc *)des; |
| 120 | for (i = 0; i < (size - 1); i++) { | 123 | for (i = 0; i < (size - 1); i++) { |
| 121 | dma_phy += sizeof(struct dma_extended_desc); | 124 | dma_phy += sizeof(struct dma_extended_desc); |
| 122 | p->basic.des3 = (unsigned int)dma_phy; | 125 | p->basic.des3 = cpu_to_le32((unsigned int)dma_phy); |
| 123 | p++; | 126 | p++; |
| 124 | } | 127 | } |
| 125 | p->basic.des3 = (unsigned int)phy_addr; | 128 | p->basic.des3 = cpu_to_le32((unsigned int)phy_addr); |
| 126 | 129 | ||
| 127 | } else { | 130 | } else { |
| 128 | struct dma_desc *p = (struct dma_desc *)des; | 131 | struct dma_desc *p = (struct dma_desc *)des; |
| 129 | for (i = 0; i < (size - 1); i++) { | 132 | for (i = 0; i < (size - 1); i++) { |
| 130 | dma_phy += sizeof(struct dma_desc); | 133 | dma_phy += sizeof(struct dma_desc); |
| 131 | p->des3 = (unsigned int)dma_phy; | 134 | p->des3 = cpu_to_le32((unsigned int)dma_phy); |
| 132 | p++; | 135 | p++; |
| 133 | } | 136 | } |
| 134 | p->des3 = (unsigned int)phy_addr; | 137 | p->des3 = cpu_to_le32((unsigned int)phy_addr); |
| 135 | } | 138 | } |
| 136 | } | 139 | } |
| 137 | 140 | ||
| @@ -144,10 +147,10 @@ static void stmmac_refill_desc3(void *priv_ptr, struct dma_desc *p) | |||
| 144 | * 1588-2002 time stamping is enabled, hence reinitialize it | 147 | * 1588-2002 time stamping is enabled, hence reinitialize it |
| 145 | * to keep explicit chaining in the descriptor. | 148 | * to keep explicit chaining in the descriptor. |
| 146 | */ | 149 | */ |
| 147 | p->des3 = (unsigned int)(priv->dma_rx_phy + | 150 | p->des3 = cpu_to_le32((unsigned int)(priv->dma_rx_phy + |
| 148 | (((priv->dirty_rx) + 1) % | 151 | (((priv->dirty_rx) + 1) % |
| 149 | DMA_RX_SIZE) * | 152 | DMA_RX_SIZE) * |
| 150 | sizeof(struct dma_desc)); | 153 | sizeof(struct dma_desc))); |
| 151 | } | 154 | } |
| 152 | 155 | ||
| 153 | static void stmmac_clean_desc3(void *priv_ptr, struct dma_desc *p) | 156 | static void stmmac_clean_desc3(void *priv_ptr, struct dma_desc *p) |
| @@ -161,9 +164,9 @@ static void stmmac_clean_desc3(void *priv_ptr, struct dma_desc *p) | |||
| 161 | * 1588-2002 time stamping is enabled, hence reinitialize it | 164 | * 1588-2002 time stamping is enabled, hence reinitialize it |
| 162 | * to keep explicit chaining in the descriptor. | 165 | * to keep explicit chaining in the descriptor. |
| 163 | */ | 166 | */ |
| 164 | p->des3 = (unsigned int)((priv->dma_tx_phy + | 167 | p->des3 = cpu_to_le32((unsigned int)((priv->dma_tx_phy + |
| 165 | ((priv->dirty_tx + 1) % DMA_TX_SIZE)) | 168 | ((priv->dirty_tx + 1) % DMA_TX_SIZE)) |
| 166 | * sizeof(struct dma_desc)); | 169 | * sizeof(struct dma_desc))); |
| 167 | } | 170 | } |
| 168 | 171 | ||
| 169 | const struct stmmac_mode_ops chain_mode_ops = { | 172 | const struct stmmac_mode_ops chain_mode_ops = { |
diff --git a/drivers/net/ethernet/stmicro/stmmac/descs.h b/drivers/net/ethernet/stmicro/stmmac/descs.h index 2e4c171a2b41..4000af4cc6cf 100644 --- a/drivers/net/ethernet/stmicro/stmmac/descs.h +++ b/drivers/net/ethernet/stmicro/stmmac/descs.h | |||
| @@ -87,7 +87,7 @@ | |||
| 87 | #define TDES0_ERROR_SUMMARY BIT(15) | 87 | #define TDES0_ERROR_SUMMARY BIT(15) |
| 88 | #define TDES0_IP_HEADER_ERROR BIT(16) | 88 | #define TDES0_IP_HEADER_ERROR BIT(16) |
| 89 | #define TDES0_TIME_STAMP_STATUS BIT(17) | 89 | #define TDES0_TIME_STAMP_STATUS BIT(17) |
| 90 | #define TDES0_OWN BIT(31) | 90 | #define TDES0_OWN ((u32)BIT(31)) /* silence sparse */ |
| 91 | /* TDES1 */ | 91 | /* TDES1 */ |
| 92 | #define TDES1_BUFFER1_SIZE_MASK GENMASK(10, 0) | 92 | #define TDES1_BUFFER1_SIZE_MASK GENMASK(10, 0) |
| 93 | #define TDES1_BUFFER2_SIZE_MASK GENMASK(21, 11) | 93 | #define TDES1_BUFFER2_SIZE_MASK GENMASK(21, 11) |
| @@ -130,7 +130,7 @@ | |||
| 130 | #define ETDES0_FIRST_SEGMENT BIT(28) | 130 | #define ETDES0_FIRST_SEGMENT BIT(28) |
| 131 | #define ETDES0_LAST_SEGMENT BIT(29) | 131 | #define ETDES0_LAST_SEGMENT BIT(29) |
| 132 | #define ETDES0_INTERRUPT BIT(30) | 132 | #define ETDES0_INTERRUPT BIT(30) |
| 133 | #define ETDES0_OWN BIT(31) | 133 | #define ETDES0_OWN ((u32)BIT(31)) /* silence sparse */ |
| 134 | /* TDES1 */ | 134 | /* TDES1 */ |
| 135 | #define ETDES1_BUFFER1_SIZE_MASK GENMASK(12, 0) | 135 | #define ETDES1_BUFFER1_SIZE_MASK GENMASK(12, 0) |
| 136 | #define ETDES1_BUFFER2_SIZE_MASK GENMASK(28, 16) | 136 | #define ETDES1_BUFFER2_SIZE_MASK GENMASK(28, 16) |
| @@ -166,19 +166,19 @@ | |||
| 166 | 166 | ||
| 167 | /* Basic descriptor structure for normal and alternate descriptors */ | 167 | /* Basic descriptor structure for normal and alternate descriptors */ |
| 168 | struct dma_desc { | 168 | struct dma_desc { |
| 169 | unsigned int des0; | 169 | __le32 des0; |
| 170 | unsigned int des1; | 170 | __le32 des1; |
| 171 | unsigned int des2; | 171 | __le32 des2; |
| 172 | unsigned int des3; | 172 | __le32 des3; |
| 173 | }; | 173 | }; |
| 174 | 174 | ||
| 175 | /* Extended descriptor structure (e.g. >= databook 3.50a) */ | 175 | /* Extended descriptor structure (e.g. >= databook 3.50a) */ |
| 176 | struct dma_extended_desc { | 176 | struct dma_extended_desc { |
| 177 | struct dma_desc basic; /* Basic descriptors */ | 177 | struct dma_desc basic; /* Basic descriptors */ |
| 178 | unsigned int des4; /* Extended Status */ | 178 | __le32 des4; /* Extended Status */ |
| 179 | unsigned int des5; /* Reserved */ | 179 | __le32 des5; /* Reserved */ |
| 180 | unsigned int des6; /* Tx/Rx Timestamp Low */ | 180 | __le32 des6; /* Tx/Rx Timestamp Low */ |
| 181 | unsigned int des7; /* Tx/Rx Timestamp High */ | 181 | __le32 des7; /* Tx/Rx Timestamp High */ |
| 182 | }; | 182 | }; |
| 183 | 183 | ||
| 184 | /* Transmit checksum insertion control */ | 184 | /* Transmit checksum insertion control */ |
diff --git a/drivers/net/ethernet/stmicro/stmmac/descs_com.h b/drivers/net/ethernet/stmicro/stmmac/descs_com.h index 7635a464ce41..1d181e205d6e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/descs_com.h +++ b/drivers/net/ethernet/stmicro/stmmac/descs_com.h | |||
| @@ -35,47 +35,50 @@ | |||
| 35 | /* Enhanced descriptors */ | 35 | /* Enhanced descriptors */ |
| 36 | static inline void ehn_desc_rx_set_on_ring(struct dma_desc *p, int end) | 36 | static inline void ehn_desc_rx_set_on_ring(struct dma_desc *p, int end) |
| 37 | { | 37 | { |
| 38 | p->des1 |= ((BUF_SIZE_8KiB - 1) << ERDES1_BUFFER2_SIZE_SHIFT) | 38 | p->des1 |= cpu_to_le32(((BUF_SIZE_8KiB - 1) |
| 39 | & ERDES1_BUFFER2_SIZE_MASK; | 39 | << ERDES1_BUFFER2_SIZE_SHIFT) |
| 40 | & ERDES1_BUFFER2_SIZE_MASK); | ||
| 40 | 41 | ||
| 41 | if (end) | 42 | if (end) |
| 42 | p->des1 |= ERDES1_END_RING; | 43 | p->des1 |= cpu_to_le32(ERDES1_END_RING); |
| 43 | } | 44 | } |
| 44 | 45 | ||
| 45 | static inline void enh_desc_end_tx_desc_on_ring(struct dma_desc *p, int end) | 46 | static inline void enh_desc_end_tx_desc_on_ring(struct dma_desc *p, int end) |
| 46 | { | 47 | { |
| 47 | if (end) | 48 | if (end) |
| 48 | p->des0 |= ETDES0_END_RING; | 49 | p->des0 |= cpu_to_le32(ETDES0_END_RING); |
| 49 | else | 50 | else |
| 50 | p->des0 &= ~ETDES0_END_RING; | 51 | p->des0 &= cpu_to_le32(~ETDES0_END_RING); |
| 51 | } | 52 | } |
| 52 | 53 | ||
| 53 | static inline void enh_set_tx_desc_len_on_ring(struct dma_desc *p, int len) | 54 | static inline void enh_set_tx_desc_len_on_ring(struct dma_desc *p, int len) |
| 54 | { | 55 | { |
| 55 | if (unlikely(len > BUF_SIZE_4KiB)) { | 56 | if (unlikely(len > BUF_SIZE_4KiB)) { |
| 56 | p->des1 |= (((len - BUF_SIZE_4KiB) << ETDES1_BUFFER2_SIZE_SHIFT) | 57 | p->des1 |= cpu_to_le32((((len - BUF_SIZE_4KiB) |
| 58 | << ETDES1_BUFFER2_SIZE_SHIFT) | ||
| 57 | & ETDES1_BUFFER2_SIZE_MASK) | (BUF_SIZE_4KiB | 59 | & ETDES1_BUFFER2_SIZE_MASK) | (BUF_SIZE_4KiB |
| 58 | & ETDES1_BUFFER1_SIZE_MASK); | 60 | & ETDES1_BUFFER1_SIZE_MASK)); |
| 59 | } else | 61 | } else |
| 60 | p->des1 |= (len & ETDES1_BUFFER1_SIZE_MASK); | 62 | p->des1 |= cpu_to_le32((len & ETDES1_BUFFER1_SIZE_MASK)); |
| 61 | } | 63 | } |
| 62 | 64 | ||
| 63 | /* Normal descriptors */ | 65 | /* Normal descriptors */ |
| 64 | static inline void ndesc_rx_set_on_ring(struct dma_desc *p, int end) | 66 | static inline void ndesc_rx_set_on_ring(struct dma_desc *p, int end) |
| 65 | { | 67 | { |
| 66 | p->des1 |= ((BUF_SIZE_2KiB - 1) << RDES1_BUFFER2_SIZE_SHIFT) | 68 | p->des1 |= cpu_to_le32(((BUF_SIZE_2KiB - 1) |
| 67 | & RDES1_BUFFER2_SIZE_MASK; | 69 | << RDES1_BUFFER2_SIZE_SHIFT) |
| 70 | & RDES1_BUFFER2_SIZE_MASK); | ||
| 68 | 71 | ||
| 69 | if (end) | 72 | if (end) |
| 70 | p->des1 |= RDES1_END_RING; | 73 | p->des1 |= cpu_to_le32(RDES1_END_RING); |
| 71 | } | 74 | } |
| 72 | 75 | ||
| 73 | static inline void ndesc_end_tx_desc_on_ring(struct dma_desc *p, int end) | 76 | static inline void ndesc_end_tx_desc_on_ring(struct dma_desc *p, int end) |
| 74 | { | 77 | { |
| 75 | if (end) | 78 | if (end) |
| 76 | p->des1 |= TDES1_END_RING; | 79 | p->des1 |= cpu_to_le32(TDES1_END_RING); |
| 77 | else | 80 | else |
| 78 | p->des1 &= ~TDES1_END_RING; | 81 | p->des1 &= cpu_to_le32(~TDES1_END_RING); |
| 79 | } | 82 | } |
| 80 | 83 | ||
| 81 | static inline void norm_set_tx_desc_len_on_ring(struct dma_desc *p, int len) | 84 | static inline void norm_set_tx_desc_len_on_ring(struct dma_desc *p, int len) |
| @@ -83,10 +86,11 @@ static inline void norm_set_tx_desc_len_on_ring(struct dma_desc *p, int len) | |||
| 83 | if (unlikely(len > BUF_SIZE_2KiB)) { | 86 | if (unlikely(len > BUF_SIZE_2KiB)) { |
| 84 | unsigned int buffer1 = (BUF_SIZE_2KiB - 1) | 87 | unsigned int buffer1 = (BUF_SIZE_2KiB - 1) |
| 85 | & TDES1_BUFFER1_SIZE_MASK; | 88 | & TDES1_BUFFER1_SIZE_MASK; |
| 86 | p->des1 |= ((((len - buffer1) << TDES1_BUFFER2_SIZE_SHIFT) | 89 | p->des1 |= cpu_to_le32((((len - buffer1) |
| 87 | & TDES1_BUFFER2_SIZE_MASK) | buffer1); | 90 | << TDES1_BUFFER2_SIZE_SHIFT) |
| 91 | & TDES1_BUFFER2_SIZE_MASK) | buffer1); | ||
| 88 | } else | 92 | } else |
| 89 | p->des1 |= (len & TDES1_BUFFER1_SIZE_MASK); | 93 | p->des1 |= cpu_to_le32((len & TDES1_BUFFER1_SIZE_MASK)); |
| 90 | } | 94 | } |
| 91 | 95 | ||
| 92 | /* Specific functions used for Chain mode */ | 96 | /* Specific functions used for Chain mode */ |
| @@ -94,32 +98,32 @@ static inline void norm_set_tx_desc_len_on_ring(struct dma_desc *p, int len) | |||
| 94 | /* Enhanced descriptors */ | 98 | /* Enhanced descriptors */ |
| 95 | static inline void ehn_desc_rx_set_on_chain(struct dma_desc *p) | 99 | static inline void ehn_desc_rx_set_on_chain(struct dma_desc *p) |
| 96 | { | 100 | { |
| 97 | p->des1 |= ERDES1_SECOND_ADDRESS_CHAINED; | 101 | p->des1 |= cpu_to_le32(ERDES1_SECOND_ADDRESS_CHAINED); |
| 98 | } | 102 | } |
| 99 | 103 | ||
| 100 | static inline void enh_desc_end_tx_desc_on_chain(struct dma_desc *p) | 104 | static inline void enh_desc_end_tx_desc_on_chain(struct dma_desc *p) |
| 101 | { | 105 | { |
| 102 | p->des0 |= ETDES0_SECOND_ADDRESS_CHAINED; | 106 | p->des0 |= cpu_to_le32(ETDES0_SECOND_ADDRESS_CHAINED); |
| 103 | } | 107 | } |
| 104 | 108 | ||
| 105 | static inline void enh_set_tx_desc_len_on_chain(struct dma_desc *p, int len) | 109 | static inline void enh_set_tx_desc_len_on_chain(struct dma_desc *p, int len) |
| 106 | { | 110 | { |
| 107 | p->des1 |= (len & ETDES1_BUFFER1_SIZE_MASK); | 111 | p->des1 |= cpu_to_le32(len & ETDES1_BUFFER1_SIZE_MASK); |
| 108 | } | 112 | } |
| 109 | 113 | ||
| 110 | /* Normal descriptors */ | 114 | /* Normal descriptors */ |
| 111 | static inline void ndesc_rx_set_on_chain(struct dma_desc *p, int end) | 115 | static inline void ndesc_rx_set_on_chain(struct dma_desc *p, int end) |
| 112 | { | 116 | { |
| 113 | p->des1 |= RDES1_SECOND_ADDRESS_CHAINED; | 117 | p->des1 |= cpu_to_le32(RDES1_SECOND_ADDRESS_CHAINED); |
| 114 | } | 118 | } |
| 115 | 119 | ||
| 116 | static inline void ndesc_tx_set_on_chain(struct dma_desc *p) | 120 | static inline void ndesc_tx_set_on_chain(struct dma_desc *p) |
| 117 | { | 121 | { |
| 118 | p->des1 |= TDES1_SECOND_ADDRESS_CHAINED; | 122 | p->des1 |= cpu_to_le32(TDES1_SECOND_ADDRESS_CHAINED); |
| 119 | } | 123 | } |
| 120 | 124 | ||
| 121 | static inline void norm_set_tx_desc_len_on_chain(struct dma_desc *p, int len) | 125 | static inline void norm_set_tx_desc_len_on_chain(struct dma_desc *p, int len) |
| 122 | { | 126 | { |
| 123 | p->des1 |= len & TDES1_BUFFER1_SIZE_MASK; | 127 | p->des1 |= cpu_to_le32(len & TDES1_BUFFER1_SIZE_MASK); |
| 124 | } | 128 | } |
| 125 | #endif /* __DESC_COM_H__ */ | 129 | #endif /* __DESC_COM_H__ */ |
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c index a1b17cd7886b..bec72d3103a1 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c | |||
| @@ -23,7 +23,7 @@ static int dwmac4_wrback_get_tx_status(void *data, struct stmmac_extra_stats *x, | |||
| 23 | unsigned int tdes3; | 23 | unsigned int tdes3; |
| 24 | int ret = tx_done; | 24 | int ret = tx_done; |
| 25 | 25 | ||
| 26 | tdes3 = p->des3; | 26 | tdes3 = le32_to_cpu(p->des3); |
| 27 | 27 | ||
| 28 | /* Get tx owner first */ | 28 | /* Get tx owner first */ |
| 29 | if (unlikely(tdes3 & TDES3_OWN)) | 29 | if (unlikely(tdes3 & TDES3_OWN)) |
| @@ -77,9 +77,9 @@ static int dwmac4_wrback_get_rx_status(void *data, struct stmmac_extra_stats *x, | |||
| 77 | struct dma_desc *p) | 77 | struct dma_desc *p) |
| 78 | { | 78 | { |
| 79 | struct net_device_stats *stats = (struct net_device_stats *)data; | 79 | struct net_device_stats *stats = (struct net_device_stats *)data; |
| 80 | unsigned int rdes1 = p->des1; | 80 | unsigned int rdes1 = le32_to_cpu(p->des1); |
| 81 | unsigned int rdes2 = p->des2; | 81 | unsigned int rdes2 = le32_to_cpu(p->des2); |
| 82 | unsigned int rdes3 = p->des3; | 82 | unsigned int rdes3 = le32_to_cpu(p->des3); |
| 83 | int message_type; | 83 | int message_type; |
| 84 | int ret = good_frame; | 84 | int ret = good_frame; |
| 85 | 85 | ||
| @@ -169,42 +169,43 @@ static int dwmac4_wrback_get_rx_status(void *data, struct stmmac_extra_stats *x, | |||
| 169 | 169 | ||
| 170 | static int dwmac4_rd_get_tx_len(struct dma_desc *p) | 170 | static int dwmac4_rd_get_tx_len(struct dma_desc *p) |
| 171 | { | 171 | { |
| 172 | return (p->des2 & TDES2_BUFFER1_SIZE_MASK); | 172 | return (le32_to_cpu(p->des2) & TDES2_BUFFER1_SIZE_MASK); |
| 173 | } | 173 | } |
| 174 | 174 | ||
| 175 | static int dwmac4_get_tx_owner(struct dma_desc *p) | 175 | static int dwmac4_get_tx_owner(struct dma_desc *p) |
| 176 | { | 176 | { |
| 177 | return (p->des3 & TDES3_OWN) >> TDES3_OWN_SHIFT; | 177 | return (le32_to_cpu(p->des3) & TDES3_OWN) >> TDES3_OWN_SHIFT; |
| 178 | } | 178 | } |
| 179 | 179 | ||
| 180 | static void dwmac4_set_tx_owner(struct dma_desc *p) | 180 | static void dwmac4_set_tx_owner(struct dma_desc *p) |
| 181 | { | 181 | { |
| 182 | p->des3 |= TDES3_OWN; | 182 | p->des3 |= cpu_to_le32(TDES3_OWN); |
| 183 | } | 183 | } |
| 184 | 184 | ||
| 185 | static void dwmac4_set_rx_owner(struct dma_desc *p) | 185 | static void dwmac4_set_rx_owner(struct dma_desc *p) |
| 186 | { | 186 | { |
| 187 | p->des3 |= RDES3_OWN; | 187 | p->des3 |= cpu_to_le32(RDES3_OWN); |
| 188 | } | 188 | } |
| 189 | 189 | ||
| 190 | static int dwmac4_get_tx_ls(struct dma_desc *p) | 190 | static int dwmac4_get_tx_ls(struct dma_desc *p) |
| 191 | { | 191 | { |
| 192 | return (p->des3 & TDES3_LAST_DESCRIPTOR) >> TDES3_LAST_DESCRIPTOR_SHIFT; | 192 | return (le32_to_cpu(p->des3) & TDES3_LAST_DESCRIPTOR) |
| 193 | >> TDES3_LAST_DESCRIPTOR_SHIFT; | ||
| 193 | } | 194 | } |
| 194 | 195 | ||
| 195 | static int dwmac4_wrback_get_rx_frame_len(struct dma_desc *p, int rx_coe) | 196 | static int dwmac4_wrback_get_rx_frame_len(struct dma_desc *p, int rx_coe) |
| 196 | { | 197 | { |
| 197 | return (p->des3 & RDES3_PACKET_SIZE_MASK); | 198 | return (le32_to_cpu(p->des3) & RDES3_PACKET_SIZE_MASK); |
| 198 | } | 199 | } |
| 199 | 200 | ||
| 200 | static void dwmac4_rd_enable_tx_timestamp(struct dma_desc *p) | 201 | static void dwmac4_rd_enable_tx_timestamp(struct dma_desc *p) |
| 201 | { | 202 | { |
| 202 | p->des2 |= TDES2_TIMESTAMP_ENABLE; | 203 | p->des2 |= cpu_to_le32(TDES2_TIMESTAMP_ENABLE); |
| 203 | } | 204 | } |
| 204 | 205 | ||
| 205 | static int dwmac4_wrback_get_tx_timestamp_status(struct dma_desc *p) | 206 | static int dwmac4_wrback_get_tx_timestamp_status(struct dma_desc *p) |
| 206 | { | 207 | { |
| 207 | return (p->des3 & TDES3_TIMESTAMP_STATUS) | 208 | return (le32_to_cpu(p->des3) & TDES3_TIMESTAMP_STATUS) |
| 208 | >> TDES3_TIMESTAMP_STATUS_SHIFT; | 209 | >> TDES3_TIMESTAMP_STATUS_SHIFT; |
| 209 | } | 210 | } |
| 210 | 211 | ||
| @@ -216,9 +217,9 @@ static u64 dwmac4_wrback_get_timestamp(void *desc, u32 ats) | |||
| 216 | struct dma_desc *p = (struct dma_desc *)desc; | 217 | struct dma_desc *p = (struct dma_desc *)desc; |
| 217 | u64 ns; | 218 | u64 ns; |
| 218 | 219 | ||
| 219 | ns = p->des0; | 220 | ns = le32_to_cpu(p->des0); |
| 220 | /* convert high/sec time stamp value to nanosecond */ | 221 | /* convert high/sec time stamp value to nanosecond */ |
| 221 | ns += p->des1 * 1000000000ULL; | 222 | ns += le32_to_cpu(p->des1) * 1000000000ULL; |
| 222 | 223 | ||
| 223 | return ns; | 224 | return ns; |
| 224 | } | 225 | } |
| @@ -227,17 +228,17 @@ static int dwmac4_context_get_rx_timestamp_status(void *desc, u32 ats) | |||
| 227 | { | 228 | { |
| 228 | struct dma_desc *p = (struct dma_desc *)desc; | 229 | struct dma_desc *p = (struct dma_desc *)desc; |
| 229 | 230 | ||
| 230 | return (p->des1 & RDES1_TIMESTAMP_AVAILABLE) | 231 | return (le32_to_cpu(p->des1) & RDES1_TIMESTAMP_AVAILABLE) |
| 231 | >> RDES1_TIMESTAMP_AVAILABLE_SHIFT; | 232 | >> RDES1_TIMESTAMP_AVAILABLE_SHIFT; |
| 232 | } | 233 | } |
| 233 | 234 | ||
| 234 | static void dwmac4_rd_init_rx_desc(struct dma_desc *p, int disable_rx_ic, | 235 | static void dwmac4_rd_init_rx_desc(struct dma_desc *p, int disable_rx_ic, |
| 235 | int mode, int end) | 236 | int mode, int end) |
| 236 | { | 237 | { |
| 237 | p->des3 = RDES3_OWN | RDES3_BUFFER1_VALID_ADDR; | 238 | p->des3 = cpu_to_le32(RDES3_OWN | RDES3_BUFFER1_VALID_ADDR); |
| 238 | 239 | ||
| 239 | if (!disable_rx_ic) | 240 | if (!disable_rx_ic) |
| 240 | p->des3 |= RDES3_INT_ON_COMPLETION_EN; | 241 | p->des3 |= cpu_to_le32(RDES3_INT_ON_COMPLETION_EN); |
| 241 | } | 242 | } |
| 242 | 243 | ||
| 243 | static void dwmac4_rd_init_tx_desc(struct dma_desc *p, int mode, int end) | 244 | static void dwmac4_rd_init_tx_desc(struct dma_desc *p, int mode, int end) |
| @@ -252,9 +253,9 @@ static void dwmac4_rd_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, | |||
| 252 | bool csum_flag, int mode, bool tx_own, | 253 | bool csum_flag, int mode, bool tx_own, |
| 253 | bool ls) | 254 | bool ls) |
| 254 | { | 255 | { |
| 255 | unsigned int tdes3 = p->des3; | 256 | unsigned int tdes3 = le32_to_cpu(p->des3); |
| 256 | 257 | ||
| 257 | p->des2 |= (len & TDES2_BUFFER1_SIZE_MASK); | 258 | p->des2 |= cpu_to_le32(len & TDES2_BUFFER1_SIZE_MASK); |
| 258 | 259 | ||
| 259 | if (is_fs) | 260 | if (is_fs) |
| 260 | tdes3 |= TDES3_FIRST_DESCRIPTOR; | 261 | tdes3 |= TDES3_FIRST_DESCRIPTOR; |
| @@ -282,7 +283,7 @@ static void dwmac4_rd_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, | |||
| 282 | */ | 283 | */ |
| 283 | wmb(); | 284 | wmb(); |
| 284 | 285 | ||
| 285 | p->des3 = tdes3; | 286 | p->des3 = cpu_to_le32(tdes3); |
| 286 | } | 287 | } |
| 287 | 288 | ||
| 288 | static void dwmac4_rd_prepare_tso_tx_desc(struct dma_desc *p, int is_fs, | 289 | static void dwmac4_rd_prepare_tso_tx_desc(struct dma_desc *p, int is_fs, |
| @@ -290,14 +291,14 @@ static void dwmac4_rd_prepare_tso_tx_desc(struct dma_desc *p, int is_fs, | |||
| 290 | bool ls, unsigned int tcphdrlen, | 291 | bool ls, unsigned int tcphdrlen, |
| 291 | unsigned int tcppayloadlen) | 292 | unsigned int tcppayloadlen) |
| 292 | { | 293 | { |
| 293 | unsigned int tdes3 = p->des3; | 294 | unsigned int tdes3 = le32_to_cpu(p->des3); |
| 294 | 295 | ||
| 295 | if (len1) | 296 | if (len1) |
| 296 | p->des2 |= (len1 & TDES2_BUFFER1_SIZE_MASK); | 297 | p->des2 |= cpu_to_le32((len1 & TDES2_BUFFER1_SIZE_MASK)); |
| 297 | 298 | ||
| 298 | if (len2) | 299 | if (len2) |
| 299 | p->des2 |= (len2 << TDES2_BUFFER2_SIZE_MASK_SHIFT) | 300 | p->des2 |= cpu_to_le32((len2 << TDES2_BUFFER2_SIZE_MASK_SHIFT) |
| 300 | & TDES2_BUFFER2_SIZE_MASK; | 301 | & TDES2_BUFFER2_SIZE_MASK); |
| 301 | 302 | ||
| 302 | if (is_fs) { | 303 | if (is_fs) { |
| 303 | tdes3 |= TDES3_FIRST_DESCRIPTOR | | 304 | tdes3 |= TDES3_FIRST_DESCRIPTOR | |
| @@ -325,7 +326,7 @@ static void dwmac4_rd_prepare_tso_tx_desc(struct dma_desc *p, int is_fs, | |||
| 325 | */ | 326 | */ |
| 326 | wmb(); | 327 | wmb(); |
| 327 | 328 | ||
| 328 | p->des3 = tdes3; | 329 | p->des3 = cpu_to_le32(tdes3); |
| 329 | } | 330 | } |
| 330 | 331 | ||
| 331 | static void dwmac4_release_tx_desc(struct dma_desc *p, int mode) | 332 | static void dwmac4_release_tx_desc(struct dma_desc *p, int mode) |
| @@ -336,7 +337,7 @@ static void dwmac4_release_tx_desc(struct dma_desc *p, int mode) | |||
| 336 | 337 | ||
| 337 | static void dwmac4_rd_set_tx_ic(struct dma_desc *p) | 338 | static void dwmac4_rd_set_tx_ic(struct dma_desc *p) |
| 338 | { | 339 | { |
| 339 | p->des2 |= TDES2_INTERRUPT_ON_COMPLETION; | 340 | p->des2 |= cpu_to_le32(TDES2_INTERRUPT_ON_COMPLETION); |
| 340 | } | 341 | } |
| 341 | 342 | ||
| 342 | static void dwmac4_display_ring(void *head, unsigned int size, bool rx) | 343 | static void dwmac4_display_ring(void *head, unsigned int size, bool rx) |
| @@ -349,7 +350,8 @@ static void dwmac4_display_ring(void *head, unsigned int size, bool rx) | |||
| 349 | for (i = 0; i < size; i++) { | 350 | for (i = 0; i < size; i++) { |
| 350 | pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n", | 351 | pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n", |
| 351 | i, (unsigned int)virt_to_phys(p), | 352 | i, (unsigned int)virt_to_phys(p), |
| 352 | p->des0, p->des1, p->des2, p->des3); | 353 | le32_to_cpu(p->des0), le32_to_cpu(p->des1), |
| 354 | le32_to_cpu(p->des2), le32_to_cpu(p->des3)); | ||
| 353 | p++; | 355 | p++; |
| 354 | } | 356 | } |
| 355 | } | 357 | } |
| @@ -358,8 +360,8 @@ static void dwmac4_set_mss_ctxt(struct dma_desc *p, unsigned int mss) | |||
| 358 | { | 360 | { |
| 359 | p->des0 = 0; | 361 | p->des0 = 0; |
| 360 | p->des1 = 0; | 362 | p->des1 = 0; |
| 361 | p->des2 = mss; | 363 | p->des2 = cpu_to_le32(mss); |
| 362 | p->des3 = TDES3_CONTEXT_TYPE | TDES3_CTXT_TCMSSV; | 364 | p->des3 = cpu_to_le32(TDES3_CONTEXT_TYPE | TDES3_CTXT_TCMSSV); |
| 363 | } | 365 | } |
| 364 | 366 | ||
| 365 | const struct stmmac_desc_ops dwmac4_desc_ops = { | 367 | const struct stmmac_desc_ops dwmac4_desc_ops = { |
diff --git a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c index 38f19c99cf59..8295aa9e0780 100644 --- a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c +++ b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c | |||
| @@ -30,7 +30,7 @@ static int enh_desc_get_tx_status(void *data, struct stmmac_extra_stats *x, | |||
| 30 | struct dma_desc *p, void __iomem *ioaddr) | 30 | struct dma_desc *p, void __iomem *ioaddr) |
| 31 | { | 31 | { |
| 32 | struct net_device_stats *stats = (struct net_device_stats *)data; | 32 | struct net_device_stats *stats = (struct net_device_stats *)data; |
| 33 | unsigned int tdes0 = p->des0; | 33 | unsigned int tdes0 = le32_to_cpu(p->des0); |
| 34 | int ret = tx_done; | 34 | int ret = tx_done; |
| 35 | 35 | ||
| 36 | /* Get tx owner first */ | 36 | /* Get tx owner first */ |
| @@ -95,7 +95,7 @@ static int enh_desc_get_tx_status(void *data, struct stmmac_extra_stats *x, | |||
| 95 | 95 | ||
| 96 | static int enh_desc_get_tx_len(struct dma_desc *p) | 96 | static int enh_desc_get_tx_len(struct dma_desc *p) |
| 97 | { | 97 | { |
| 98 | return (p->des1 & ETDES1_BUFFER1_SIZE_MASK); | 98 | return (le32_to_cpu(p->des1) & ETDES1_BUFFER1_SIZE_MASK); |
| 99 | } | 99 | } |
| 100 | 100 | ||
| 101 | static int enh_desc_coe_rdes0(int ipc_err, int type, int payload_err) | 101 | static int enh_desc_coe_rdes0(int ipc_err, int type, int payload_err) |
| @@ -134,8 +134,8 @@ static int enh_desc_coe_rdes0(int ipc_err, int type, int payload_err) | |||
| 134 | static void enh_desc_get_ext_status(void *data, struct stmmac_extra_stats *x, | 134 | static void enh_desc_get_ext_status(void *data, struct stmmac_extra_stats *x, |
| 135 | struct dma_extended_desc *p) | 135 | struct dma_extended_desc *p) |
| 136 | { | 136 | { |
| 137 | unsigned int rdes0 = p->basic.des0; | 137 | unsigned int rdes0 = le32_to_cpu(p->basic.des0); |
| 138 | unsigned int rdes4 = p->des4; | 138 | unsigned int rdes4 = le32_to_cpu(p->des4); |
| 139 | 139 | ||
| 140 | if (unlikely(rdes0 & ERDES0_RX_MAC_ADDR)) { | 140 | if (unlikely(rdes0 & ERDES0_RX_MAC_ADDR)) { |
| 141 | int message_type = (rdes4 & ERDES4_MSG_TYPE_MASK) >> 8; | 141 | int message_type = (rdes4 & ERDES4_MSG_TYPE_MASK) >> 8; |
| @@ -191,7 +191,7 @@ static int enh_desc_get_rx_status(void *data, struct stmmac_extra_stats *x, | |||
| 191 | struct dma_desc *p) | 191 | struct dma_desc *p) |
| 192 | { | 192 | { |
| 193 | struct net_device_stats *stats = (struct net_device_stats *)data; | 193 | struct net_device_stats *stats = (struct net_device_stats *)data; |
| 194 | unsigned int rdes0 = p->des0; | 194 | unsigned int rdes0 = le32_to_cpu(p->des0); |
| 195 | int ret = good_frame; | 195 | int ret = good_frame; |
| 196 | 196 | ||
| 197 | if (unlikely(rdes0 & RDES0_OWN)) | 197 | if (unlikely(rdes0 & RDES0_OWN)) |
| @@ -257,8 +257,8 @@ static int enh_desc_get_rx_status(void *data, struct stmmac_extra_stats *x, | |||
| 257 | static void enh_desc_init_rx_desc(struct dma_desc *p, int disable_rx_ic, | 257 | static void enh_desc_init_rx_desc(struct dma_desc *p, int disable_rx_ic, |
| 258 | int mode, int end) | 258 | int mode, int end) |
| 259 | { | 259 | { |
| 260 | p->des0 |= RDES0_OWN; | 260 | p->des0 |= cpu_to_le32(RDES0_OWN); |
| 261 | p->des1 |= ((BUF_SIZE_8KiB - 1) & ERDES1_BUFFER1_SIZE_MASK); | 261 | p->des1 |= cpu_to_le32((BUF_SIZE_8KiB - 1) & ERDES1_BUFFER1_SIZE_MASK); |
| 262 | 262 | ||
| 263 | if (mode == STMMAC_CHAIN_MODE) | 263 | if (mode == STMMAC_CHAIN_MODE) |
| 264 | ehn_desc_rx_set_on_chain(p); | 264 | ehn_desc_rx_set_on_chain(p); |
| @@ -266,12 +266,12 @@ static void enh_desc_init_rx_desc(struct dma_desc *p, int disable_rx_ic, | |||
| 266 | ehn_desc_rx_set_on_ring(p, end); | 266 | ehn_desc_rx_set_on_ring(p, end); |
| 267 | 267 | ||
| 268 | if (disable_rx_ic) | 268 | if (disable_rx_ic) |
| 269 | p->des1 |= ERDES1_DISABLE_IC; | 269 | p->des1 |= cpu_to_le32(ERDES1_DISABLE_IC); |
| 270 | } | 270 | } |
| 271 | 271 | ||
| 272 | static void enh_desc_init_tx_desc(struct dma_desc *p, int mode, int end) | 272 | static void enh_desc_init_tx_desc(struct dma_desc *p, int mode, int end) |
| 273 | { | 273 | { |
| 274 | p->des0 &= ~ETDES0_OWN; | 274 | p->des0 &= cpu_to_le32(~ETDES0_OWN); |
| 275 | if (mode == STMMAC_CHAIN_MODE) | 275 | if (mode == STMMAC_CHAIN_MODE) |
| 276 | enh_desc_end_tx_desc_on_chain(p); | 276 | enh_desc_end_tx_desc_on_chain(p); |
| 277 | else | 277 | else |
| @@ -280,27 +280,27 @@ static void enh_desc_init_tx_desc(struct dma_desc *p, int mode, int end) | |||
| 280 | 280 | ||
| 281 | static int enh_desc_get_tx_owner(struct dma_desc *p) | 281 | static int enh_desc_get_tx_owner(struct dma_desc *p) |
| 282 | { | 282 | { |
| 283 | return (p->des0 & ETDES0_OWN) >> 31; | 283 | return (le32_to_cpu(p->des0) & ETDES0_OWN) >> 31; |
| 284 | } | 284 | } |
| 285 | 285 | ||
| 286 | static void enh_desc_set_tx_owner(struct dma_desc *p) | 286 | static void enh_desc_set_tx_owner(struct dma_desc *p) |
| 287 | { | 287 | { |
| 288 | p->des0 |= ETDES0_OWN; | 288 | p->des0 |= cpu_to_le32(ETDES0_OWN); |
| 289 | } | 289 | } |
| 290 | 290 | ||
| 291 | static void enh_desc_set_rx_owner(struct dma_desc *p) | 291 | static void enh_desc_set_rx_owner(struct dma_desc *p) |
| 292 | { | 292 | { |
| 293 | p->des0 |= RDES0_OWN; | 293 | p->des0 |= cpu_to_le32(RDES0_OWN); |
| 294 | } | 294 | } |
| 295 | 295 | ||
| 296 | static int enh_desc_get_tx_ls(struct dma_desc *p) | 296 | static int enh_desc_get_tx_ls(struct dma_desc *p) |
| 297 | { | 297 | { |
| 298 | return (p->des0 & ETDES0_LAST_SEGMENT) >> 29; | 298 | return (le32_to_cpu(p->des0) & ETDES0_LAST_SEGMENT) >> 29; |
| 299 | } | 299 | } |
| 300 | 300 | ||
| 301 | static void enh_desc_release_tx_desc(struct dma_desc *p, int mode) | 301 | static void enh_desc_release_tx_desc(struct dma_desc *p, int mode) |
| 302 | { | 302 | { |
| 303 | int ter = (p->des0 & ETDES0_END_RING) >> 21; | 303 | int ter = (le32_to_cpu(p->des0) & ETDES0_END_RING) >> 21; |
| 304 | 304 | ||
| 305 | memset(p, 0, offsetof(struct dma_desc, des2)); | 305 | memset(p, 0, offsetof(struct dma_desc, des2)); |
| 306 | if (mode == STMMAC_CHAIN_MODE) | 306 | if (mode == STMMAC_CHAIN_MODE) |
| @@ -313,7 +313,7 @@ static void enh_desc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, | |||
| 313 | bool csum_flag, int mode, bool tx_own, | 313 | bool csum_flag, int mode, bool tx_own, |
| 314 | bool ls) | 314 | bool ls) |
| 315 | { | 315 | { |
| 316 | unsigned int tdes0 = p->des0; | 316 | unsigned int tdes0 = le32_to_cpu(p->des0); |
| 317 | 317 | ||
| 318 | if (mode == STMMAC_CHAIN_MODE) | 318 | if (mode == STMMAC_CHAIN_MODE) |
| 319 | enh_set_tx_desc_len_on_chain(p, len); | 319 | enh_set_tx_desc_len_on_chain(p, len); |
| @@ -344,12 +344,12 @@ static void enh_desc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, | |||
| 344 | */ | 344 | */ |
| 345 | wmb(); | 345 | wmb(); |
| 346 | 346 | ||
| 347 | p->des0 = tdes0; | 347 | p->des0 = cpu_to_le32(tdes0); |
| 348 | } | 348 | } |
| 349 | 349 | ||
| 350 | static void enh_desc_set_tx_ic(struct dma_desc *p) | 350 | static void enh_desc_set_tx_ic(struct dma_desc *p) |
| 351 | { | 351 | { |
| 352 | p->des0 |= ETDES0_INTERRUPT; | 352 | p->des0 |= cpu_to_le32(ETDES0_INTERRUPT); |
| 353 | } | 353 | } |
| 354 | 354 | ||
| 355 | static int enh_desc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type) | 355 | static int enh_desc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type) |
| @@ -364,18 +364,18 @@ static int enh_desc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type) | |||
| 364 | if (rx_coe_type == STMMAC_RX_COE_TYPE1) | 364 | if (rx_coe_type == STMMAC_RX_COE_TYPE1) |
| 365 | csum = 2; | 365 | csum = 2; |
| 366 | 366 | ||
| 367 | return (((p->des0 & RDES0_FRAME_LEN_MASK) >> RDES0_FRAME_LEN_SHIFT) - | 367 | return (((le32_to_cpu(p->des0) & RDES0_FRAME_LEN_MASK) |
| 368 | csum); | 368 | >> RDES0_FRAME_LEN_SHIFT) - csum); |
| 369 | } | 369 | } |
| 370 | 370 | ||
| 371 | static void enh_desc_enable_tx_timestamp(struct dma_desc *p) | 371 | static void enh_desc_enable_tx_timestamp(struct dma_desc *p) |
| 372 | { | 372 | { |
| 373 | p->des0 |= ETDES0_TIME_STAMP_ENABLE; | 373 | p->des0 |= cpu_to_le32(ETDES0_TIME_STAMP_ENABLE); |
| 374 | } | 374 | } |
| 375 | 375 | ||
| 376 | static int enh_desc_get_tx_timestamp_status(struct dma_desc *p) | 376 | static int enh_desc_get_tx_timestamp_status(struct dma_desc *p) |
| 377 | { | 377 | { |
| 378 | return (p->des0 & ETDES0_TIME_STAMP_STATUS) >> 17; | 378 | return (le32_to_cpu(p->des0) & ETDES0_TIME_STAMP_STATUS) >> 17; |
| 379 | } | 379 | } |
| 380 | 380 | ||
| 381 | static u64 enh_desc_get_timestamp(void *desc, u32 ats) | 381 | static u64 enh_desc_get_timestamp(void *desc, u32 ats) |
| @@ -384,13 +384,13 @@ static u64 enh_desc_get_timestamp(void *desc, u32 ats) | |||
| 384 | 384 | ||
| 385 | if (ats) { | 385 | if (ats) { |
| 386 | struct dma_extended_desc *p = (struct dma_extended_desc *)desc; | 386 | struct dma_extended_desc *p = (struct dma_extended_desc *)desc; |
| 387 | ns = p->des6; | 387 | ns = le32_to_cpu(p->des6); |
| 388 | /* convert high/sec time stamp value to nanosecond */ | 388 | /* convert high/sec time stamp value to nanosecond */ |
| 389 | ns += p->des7 * 1000000000ULL; | 389 | ns += le32_to_cpu(p->des7) * 1000000000ULL; |
| 390 | } else { | 390 | } else { |
| 391 | struct dma_desc *p = (struct dma_desc *)desc; | 391 | struct dma_desc *p = (struct dma_desc *)desc; |
| 392 | ns = p->des2; | 392 | ns = le32_to_cpu(p->des2); |
| 393 | ns += p->des3 * 1000000000ULL; | 393 | ns += le32_to_cpu(p->des3) * 1000000000ULL; |
| 394 | } | 394 | } |
| 395 | 395 | ||
| 396 | return ns; | 396 | return ns; |
| @@ -400,10 +400,11 @@ static int enh_desc_get_rx_timestamp_status(void *desc, u32 ats) | |||
| 400 | { | 400 | { |
| 401 | if (ats) { | 401 | if (ats) { |
| 402 | struct dma_extended_desc *p = (struct dma_extended_desc *)desc; | 402 | struct dma_extended_desc *p = (struct dma_extended_desc *)desc; |
| 403 | return (p->basic.des0 & RDES0_IPC_CSUM_ERROR) >> 7; | 403 | return (le32_to_cpu(p->basic.des0) & RDES0_IPC_CSUM_ERROR) >> 7; |
| 404 | } else { | 404 | } else { |
| 405 | struct dma_desc *p = (struct dma_desc *)desc; | 405 | struct dma_desc *p = (struct dma_desc *)desc; |
| 406 | if ((p->des2 == 0xffffffff) && (p->des3 == 0xffffffff)) | 406 | if ((le32_to_cpu(p->des2) == 0xffffffff) && |
| 407 | (le32_to_cpu(p->des3) == 0xffffffff)) | ||
| 407 | /* timestamp is corrupted, hence don't store it */ | 408 | /* timestamp is corrupted, hence don't store it */ |
| 408 | return 0; | 409 | return 0; |
| 409 | else | 410 | else |
diff --git a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c index 2beacd0d3043..fd78406e2e9a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c +++ b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c | |||
| @@ -30,8 +30,8 @@ static int ndesc_get_tx_status(void *data, struct stmmac_extra_stats *x, | |||
| 30 | struct dma_desc *p, void __iomem *ioaddr) | 30 | struct dma_desc *p, void __iomem *ioaddr) |
| 31 | { | 31 | { |
| 32 | struct net_device_stats *stats = (struct net_device_stats *)data; | 32 | struct net_device_stats *stats = (struct net_device_stats *)data; |
| 33 | unsigned int tdes0 = p->des0; | 33 | unsigned int tdes0 = le32_to_cpu(p->des0); |
| 34 | unsigned int tdes1 = p->des1; | 34 | unsigned int tdes1 = le32_to_cpu(p->des1); |
| 35 | int ret = tx_done; | 35 | int ret = tx_done; |
| 36 | 36 | ||
| 37 | /* Get tx owner first */ | 37 | /* Get tx owner first */ |
| @@ -77,7 +77,7 @@ static int ndesc_get_tx_status(void *data, struct stmmac_extra_stats *x, | |||
| 77 | 77 | ||
| 78 | static int ndesc_get_tx_len(struct dma_desc *p) | 78 | static int ndesc_get_tx_len(struct dma_desc *p) |
| 79 | { | 79 | { |
| 80 | return (p->des1 & RDES1_BUFFER1_SIZE_MASK); | 80 | return (le32_to_cpu(p->des1) & RDES1_BUFFER1_SIZE_MASK); |
| 81 | } | 81 | } |
| 82 | 82 | ||
| 83 | /* This function verifies if each incoming frame has some errors | 83 | /* This function verifies if each incoming frame has some errors |
| @@ -88,7 +88,7 @@ static int ndesc_get_rx_status(void *data, struct stmmac_extra_stats *x, | |||
| 88 | struct dma_desc *p) | 88 | struct dma_desc *p) |
| 89 | { | 89 | { |
| 90 | int ret = good_frame; | 90 | int ret = good_frame; |
| 91 | unsigned int rdes0 = p->des0; | 91 | unsigned int rdes0 = le32_to_cpu(p->des0); |
| 92 | struct net_device_stats *stats = (struct net_device_stats *)data; | 92 | struct net_device_stats *stats = (struct net_device_stats *)data; |
| 93 | 93 | ||
| 94 | if (unlikely(rdes0 & RDES0_OWN)) | 94 | if (unlikely(rdes0 & RDES0_OWN)) |
| @@ -141,8 +141,8 @@ static int ndesc_get_rx_status(void *data, struct stmmac_extra_stats *x, | |||
| 141 | static void ndesc_init_rx_desc(struct dma_desc *p, int disable_rx_ic, int mode, | 141 | static void ndesc_init_rx_desc(struct dma_desc *p, int disable_rx_ic, int mode, |
| 142 | int end) | 142 | int end) |
| 143 | { | 143 | { |
| 144 | p->des0 |= RDES0_OWN; | 144 | p->des0 |= cpu_to_le32(RDES0_OWN); |
| 145 | p->des1 |= (BUF_SIZE_2KiB - 1) & RDES1_BUFFER1_SIZE_MASK; | 145 | p->des1 |= cpu_to_le32((BUF_SIZE_2KiB - 1) & RDES1_BUFFER1_SIZE_MASK); |
| 146 | 146 | ||
| 147 | if (mode == STMMAC_CHAIN_MODE) | 147 | if (mode == STMMAC_CHAIN_MODE) |
| 148 | ndesc_rx_set_on_chain(p, end); | 148 | ndesc_rx_set_on_chain(p, end); |
| @@ -150,12 +150,12 @@ static void ndesc_init_rx_desc(struct dma_desc *p, int disable_rx_ic, int mode, | |||
| 150 | ndesc_rx_set_on_ring(p, end); | 150 | ndesc_rx_set_on_ring(p, end); |
| 151 | 151 | ||
| 152 | if (disable_rx_ic) | 152 | if (disable_rx_ic) |
| 153 | p->des1 |= RDES1_DISABLE_IC; | 153 | p->des1 |= cpu_to_le32(RDES1_DISABLE_IC); |
| 154 | } | 154 | } |
| 155 | 155 | ||
| 156 | static void ndesc_init_tx_desc(struct dma_desc *p, int mode, int end) | 156 | static void ndesc_init_tx_desc(struct dma_desc *p, int mode, int end) |
| 157 | { | 157 | { |
| 158 | p->des0 &= ~TDES0_OWN; | 158 | p->des0 &= cpu_to_le32(~TDES0_OWN); |
| 159 | if (mode == STMMAC_CHAIN_MODE) | 159 | if (mode == STMMAC_CHAIN_MODE) |
| 160 | ndesc_tx_set_on_chain(p); | 160 | ndesc_tx_set_on_chain(p); |
| 161 | else | 161 | else |
| @@ -164,27 +164,27 @@ static void ndesc_init_tx_desc(struct dma_desc *p, int mode, int end) | |||
| 164 | 164 | ||
| 165 | static int ndesc_get_tx_owner(struct dma_desc *p) | 165 | static int ndesc_get_tx_owner(struct dma_desc *p) |
| 166 | { | 166 | { |
| 167 | return (p->des0 & TDES0_OWN) >> 31; | 167 | return (le32_to_cpu(p->des0) & TDES0_OWN) >> 31; |
| 168 | } | 168 | } |
| 169 | 169 | ||
| 170 | static void ndesc_set_tx_owner(struct dma_desc *p) | 170 | static void ndesc_set_tx_owner(struct dma_desc *p) |
| 171 | { | 171 | { |
| 172 | p->des0 |= TDES0_OWN; | 172 | p->des0 |= cpu_to_le32(TDES0_OWN); |
| 173 | } | 173 | } |
| 174 | 174 | ||
| 175 | static void ndesc_set_rx_owner(struct dma_desc *p) | 175 | static void ndesc_set_rx_owner(struct dma_desc *p) |
| 176 | { | 176 | { |
| 177 | p->des0 |= RDES0_OWN; | 177 | p->des0 |= cpu_to_le32(RDES0_OWN); |
| 178 | } | 178 | } |
| 179 | 179 | ||
| 180 | static int ndesc_get_tx_ls(struct dma_desc *p) | 180 | static int ndesc_get_tx_ls(struct dma_desc *p) |
| 181 | { | 181 | { |
| 182 | return (p->des1 & TDES1_LAST_SEGMENT) >> 30; | 182 | return (le32_to_cpu(p->des1) & TDES1_LAST_SEGMENT) >> 30; |
| 183 | } | 183 | } |
| 184 | 184 | ||
| 185 | static void ndesc_release_tx_desc(struct dma_desc *p, int mode) | 185 | static void ndesc_release_tx_desc(struct dma_desc *p, int mode) |
| 186 | { | 186 | { |
| 187 | int ter = (p->des1 & TDES1_END_RING) >> 25; | 187 | int ter = (le32_to_cpu(p->des1) & TDES1_END_RING) >> 25; |
| 188 | 188 | ||
| 189 | memset(p, 0, offsetof(struct dma_desc, des2)); | 189 | memset(p, 0, offsetof(struct dma_desc, des2)); |
| 190 | if (mode == STMMAC_CHAIN_MODE) | 190 | if (mode == STMMAC_CHAIN_MODE) |
| @@ -197,7 +197,7 @@ static void ndesc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, | |||
| 197 | bool csum_flag, int mode, bool tx_own, | 197 | bool csum_flag, int mode, bool tx_own, |
| 198 | bool ls) | 198 | bool ls) |
| 199 | { | 199 | { |
| 200 | unsigned int tdes1 = p->des1; | 200 | unsigned int tdes1 = le32_to_cpu(p->des1); |
| 201 | 201 | ||
| 202 | if (is_fs) | 202 | if (is_fs) |
| 203 | tdes1 |= TDES1_FIRST_SEGMENT; | 203 | tdes1 |= TDES1_FIRST_SEGMENT; |
| @@ -212,7 +212,7 @@ static void ndesc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, | |||
| 212 | if (ls) | 212 | if (ls) |
| 213 | tdes1 |= TDES1_LAST_SEGMENT; | 213 | tdes1 |= TDES1_LAST_SEGMENT; |
| 214 | 214 | ||
| 215 | p->des1 = tdes1; | 215 | p->des1 = cpu_to_le32(tdes1); |
| 216 | 216 | ||
| 217 | if (mode == STMMAC_CHAIN_MODE) | 217 | if (mode == STMMAC_CHAIN_MODE) |
| 218 | norm_set_tx_desc_len_on_chain(p, len); | 218 | norm_set_tx_desc_len_on_chain(p, len); |
| @@ -220,12 +220,12 @@ static void ndesc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, | |||
| 220 | norm_set_tx_desc_len_on_ring(p, len); | 220 | norm_set_tx_desc_len_on_ring(p, len); |
| 221 | 221 | ||
| 222 | if (tx_own) | 222 | if (tx_own) |
| 223 | p->des0 |= TDES0_OWN; | 223 | p->des0 |= cpu_to_le32(TDES0_OWN); |
| 224 | } | 224 | } |
| 225 | 225 | ||
| 226 | static void ndesc_set_tx_ic(struct dma_desc *p) | 226 | static void ndesc_set_tx_ic(struct dma_desc *p) |
| 227 | { | 227 | { |
| 228 | p->des1 |= TDES1_INTERRUPT; | 228 | p->des1 |= cpu_to_le32(TDES1_INTERRUPT); |
| 229 | } | 229 | } |
| 230 | 230 | ||
| 231 | static int ndesc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type) | 231 | static int ndesc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type) |
| @@ -241,19 +241,20 @@ static int ndesc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type) | |||
| 241 | if (rx_coe_type == STMMAC_RX_COE_TYPE1) | 241 | if (rx_coe_type == STMMAC_RX_COE_TYPE1) |
| 242 | csum = 2; | 242 | csum = 2; |
| 243 | 243 | ||
| 244 | return (((p->des0 & RDES0_FRAME_LEN_MASK) >> RDES0_FRAME_LEN_SHIFT) - | 244 | return (((le32_to_cpu(p->des0) & RDES0_FRAME_LEN_MASK) |
| 245 | >> RDES0_FRAME_LEN_SHIFT) - | ||
| 245 | csum); | 246 | csum); |
| 246 | 247 | ||
| 247 | } | 248 | } |
| 248 | 249 | ||
| 249 | static void ndesc_enable_tx_timestamp(struct dma_desc *p) | 250 | static void ndesc_enable_tx_timestamp(struct dma_desc *p) |
| 250 | { | 251 | { |
| 251 | p->des1 |= TDES1_TIME_STAMP_ENABLE; | 252 | p->des1 |= cpu_to_le32(TDES1_TIME_STAMP_ENABLE); |
| 252 | } | 253 | } |
| 253 | 254 | ||
| 254 | static int ndesc_get_tx_timestamp_status(struct dma_desc *p) | 255 | static int ndesc_get_tx_timestamp_status(struct dma_desc *p) |
| 255 | { | 256 | { |
| 256 | return (p->des0 & TDES0_TIME_STAMP_STATUS) >> 17; | 257 | return (le32_to_cpu(p->des0) & TDES0_TIME_STAMP_STATUS) >> 17; |
| 257 | } | 258 | } |
| 258 | 259 | ||
| 259 | static u64 ndesc_get_timestamp(void *desc, u32 ats) | 260 | static u64 ndesc_get_timestamp(void *desc, u32 ats) |
| @@ -261,9 +262,9 @@ static u64 ndesc_get_timestamp(void *desc, u32 ats) | |||
| 261 | struct dma_desc *p = (struct dma_desc *)desc; | 262 | struct dma_desc *p = (struct dma_desc *)desc; |
| 262 | u64 ns; | 263 | u64 ns; |
| 263 | 264 | ||
| 264 | ns = p->des2; | 265 | ns = le32_to_cpu(p->des2); |
| 265 | /* convert high/sec time stamp value to nanosecond */ | 266 | /* convert high/sec time stamp value to nanosecond */ |
| 266 | ns += p->des3 * 1000000000ULL; | 267 | ns += le32_to_cpu(p->des3) * 1000000000ULL; |
| 267 | 268 | ||
| 268 | return ns; | 269 | return ns; |
| 269 | } | 270 | } |
| @@ -272,7 +273,8 @@ static int ndesc_get_rx_timestamp_status(void *desc, u32 ats) | |||
| 272 | { | 273 | { |
| 273 | struct dma_desc *p = (struct dma_desc *)desc; | 274 | struct dma_desc *p = (struct dma_desc *)desc; |
| 274 | 275 | ||
| 275 | if ((p->des2 == 0xffffffff) && (p->des3 == 0xffffffff)) | 276 | if ((le32_to_cpu(p->des2) == 0xffffffff) && |
| 277 | (le32_to_cpu(p->des3) == 0xffffffff)) | ||
| 276 | /* timestamp is corrupted, hence don't store it */ | 278 | /* timestamp is corrupted, hence don't store it */ |
| 277 | return 0; | 279 | return 0; |
| 278 | else | 280 | else |
diff --git a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c index 7723b5d2499a..9983ce9bd90d 100644 --- a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c +++ b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c | |||
| @@ -34,7 +34,7 @@ static int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
| 34 | unsigned int entry = priv->cur_tx; | 34 | unsigned int entry = priv->cur_tx; |
| 35 | struct dma_desc *desc; | 35 | struct dma_desc *desc; |
| 36 | unsigned int nopaged_len = skb_headlen(skb); | 36 | unsigned int nopaged_len = skb_headlen(skb); |
| 37 | unsigned int bmax, len; | 37 | unsigned int bmax, len, des2; |
| 38 | 38 | ||
| 39 | if (priv->extend_desc) | 39 | if (priv->extend_desc) |
| 40 | desc = (struct dma_desc *)(priv->dma_etx + entry); | 40 | desc = (struct dma_desc *)(priv->dma_etx + entry); |
| @@ -50,16 +50,17 @@ static int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
| 50 | 50 | ||
| 51 | if (nopaged_len > BUF_SIZE_8KiB) { | 51 | if (nopaged_len > BUF_SIZE_8KiB) { |
| 52 | 52 | ||
| 53 | desc->des2 = dma_map_single(priv->device, skb->data, | 53 | des2 = dma_map_single(priv->device, skb->data, bmax, |
| 54 | bmax, DMA_TO_DEVICE); | 54 | DMA_TO_DEVICE); |
| 55 | if (dma_mapping_error(priv->device, desc->des2)) | 55 | desc->des2 = cpu_to_le32(des2); |
| 56 | if (dma_mapping_error(priv->device, des2)) | ||
| 56 | return -1; | 57 | return -1; |
| 57 | 58 | ||
| 58 | priv->tx_skbuff_dma[entry].buf = desc->des2; | 59 | priv->tx_skbuff_dma[entry].buf = des2; |
| 59 | priv->tx_skbuff_dma[entry].len = bmax; | 60 | priv->tx_skbuff_dma[entry].len = bmax; |
| 60 | priv->tx_skbuff_dma[entry].is_jumbo = true; | 61 | priv->tx_skbuff_dma[entry].is_jumbo = true; |
| 61 | 62 | ||
| 62 | desc->des3 = desc->des2 + BUF_SIZE_4KiB; | 63 | desc->des3 = cpu_to_le32(des2 + BUF_SIZE_4KiB); |
| 63 | priv->hw->desc->prepare_tx_desc(desc, 1, bmax, csum, | 64 | priv->hw->desc->prepare_tx_desc(desc, 1, bmax, csum, |
| 64 | STMMAC_RING_MODE, 0, false); | 65 | STMMAC_RING_MODE, 0, false); |
| 65 | priv->tx_skbuff[entry] = NULL; | 66 | priv->tx_skbuff[entry] = NULL; |
| @@ -70,26 +71,28 @@ static int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
| 70 | else | 71 | else |
| 71 | desc = priv->dma_tx + entry; | 72 | desc = priv->dma_tx + entry; |
| 72 | 73 | ||
| 73 | desc->des2 = dma_map_single(priv->device, skb->data + bmax, | 74 | des2 = dma_map_single(priv->device, skb->data + bmax, len, |
| 74 | len, DMA_TO_DEVICE); | 75 | DMA_TO_DEVICE); |
| 75 | if (dma_mapping_error(priv->device, desc->des2)) | 76 | desc->des2 = cpu_to_le32(des2); |
| 77 | if (dma_mapping_error(priv->device, des2)) | ||
| 76 | return -1; | 78 | return -1; |
| 77 | priv->tx_skbuff_dma[entry].buf = desc->des2; | 79 | priv->tx_skbuff_dma[entry].buf = des2; |
| 78 | priv->tx_skbuff_dma[entry].len = len; | 80 | priv->tx_skbuff_dma[entry].len = len; |
| 79 | priv->tx_skbuff_dma[entry].is_jumbo = true; | 81 | priv->tx_skbuff_dma[entry].is_jumbo = true; |
| 80 | 82 | ||
| 81 | desc->des3 = desc->des2 + BUF_SIZE_4KiB; | 83 | desc->des3 = cpu_to_le32(des2 + BUF_SIZE_4KiB); |
| 82 | priv->hw->desc->prepare_tx_desc(desc, 0, len, csum, | 84 | priv->hw->desc->prepare_tx_desc(desc, 0, len, csum, |
| 83 | STMMAC_RING_MODE, 1, true); | 85 | STMMAC_RING_MODE, 1, true); |
| 84 | } else { | 86 | } else { |
| 85 | desc->des2 = dma_map_single(priv->device, skb->data, | 87 | des2 = dma_map_single(priv->device, skb->data, |
| 86 | nopaged_len, DMA_TO_DEVICE); | 88 | nopaged_len, DMA_TO_DEVICE); |
| 87 | if (dma_mapping_error(priv->device, desc->des2)) | 89 | desc->des2 = cpu_to_le32(des2); |
| 90 | if (dma_mapping_error(priv->device, des2)) | ||
| 88 | return -1; | 91 | return -1; |
| 89 | priv->tx_skbuff_dma[entry].buf = desc->des2; | 92 | priv->tx_skbuff_dma[entry].buf = des2; |
| 90 | priv->tx_skbuff_dma[entry].len = nopaged_len; | 93 | priv->tx_skbuff_dma[entry].len = nopaged_len; |
| 91 | priv->tx_skbuff_dma[entry].is_jumbo = true; | 94 | priv->tx_skbuff_dma[entry].is_jumbo = true; |
| 92 | desc->des3 = desc->des2 + BUF_SIZE_4KiB; | 95 | desc->des3 = cpu_to_le32(des2 + BUF_SIZE_4KiB); |
| 93 | priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len, csum, | 96 | priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len, csum, |
| 94 | STMMAC_RING_MODE, 0, true); | 97 | STMMAC_RING_MODE, 0, true); |
| 95 | } | 98 | } |
| @@ -115,13 +118,13 @@ static void stmmac_refill_desc3(void *priv_ptr, struct dma_desc *p) | |||
| 115 | 118 | ||
| 116 | /* Fill DES3 in case of RING mode */ | 119 | /* Fill DES3 in case of RING mode */ |
| 117 | if (priv->dma_buf_sz >= BUF_SIZE_8KiB) | 120 | if (priv->dma_buf_sz >= BUF_SIZE_8KiB) |
| 118 | p->des3 = p->des2 + BUF_SIZE_8KiB; | 121 | p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + BUF_SIZE_8KiB); |
| 119 | } | 122 | } |
| 120 | 123 | ||
| 121 | /* In ring mode we need to fill the desc3 because it is used as buffer */ | 124 | /* In ring mode we need to fill the desc3 because it is used as buffer */ |
| 122 | static void stmmac_init_desc3(struct dma_desc *p) | 125 | static void stmmac_init_desc3(struct dma_desc *p) |
| 123 | { | 126 | { |
| 124 | p->des3 = p->des2 + BUF_SIZE_8KiB; | 127 | p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + BUF_SIZE_8KiB); |
| 125 | } | 128 | } |
| 126 | 129 | ||
| 127 | static void stmmac_clean_desc3(void *priv_ptr, struct dma_desc *p) | 130 | static void stmmac_clean_desc3(void *priv_ptr, struct dma_desc *p) |
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 03dbf8e89c4c..8eb12353896b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | |||
| @@ -990,9 +990,9 @@ static int stmmac_init_rx_buffers(struct stmmac_priv *priv, struct dma_desc *p, | |||
| 990 | } | 990 | } |
| 991 | 991 | ||
| 992 | if (priv->synopsys_id >= DWMAC_CORE_4_00) | 992 | if (priv->synopsys_id >= DWMAC_CORE_4_00) |
| 993 | p->des0 = priv->rx_skbuff_dma[i]; | 993 | p->des0 = cpu_to_le32(priv->rx_skbuff_dma[i]); |
| 994 | else | 994 | else |
| 995 | p->des2 = priv->rx_skbuff_dma[i]; | 995 | p->des2 = cpu_to_le32(priv->rx_skbuff_dma[i]); |
| 996 | 996 | ||
| 997 | if ((priv->hw->mode->init_desc3) && | 997 | if ((priv->hw->mode->init_desc3) && |
| 998 | (priv->dma_buf_sz == BUF_SIZE_16KiB)) | 998 | (priv->dma_buf_sz == BUF_SIZE_16KiB)) |
| @@ -1946,7 +1946,7 @@ static void stmmac_tso_allocator(struct stmmac_priv *priv, unsigned int des, | |||
| 1946 | priv->cur_tx = STMMAC_GET_ENTRY(priv->cur_tx, DMA_TX_SIZE); | 1946 | priv->cur_tx = STMMAC_GET_ENTRY(priv->cur_tx, DMA_TX_SIZE); |
| 1947 | desc = priv->dma_tx + priv->cur_tx; | 1947 | desc = priv->dma_tx + priv->cur_tx; |
| 1948 | 1948 | ||
| 1949 | desc->des0 = des + (total_len - tmp_len); | 1949 | desc->des0 = cpu_to_le32(des + (total_len - tmp_len)); |
| 1950 | buff_size = tmp_len >= TSO_MAX_BUFF_SIZE ? | 1950 | buff_size = tmp_len >= TSO_MAX_BUFF_SIZE ? |
| 1951 | TSO_MAX_BUFF_SIZE : tmp_len; | 1951 | TSO_MAX_BUFF_SIZE : tmp_len; |
| 1952 | 1952 | ||
| @@ -2048,11 +2048,11 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev) | |||
| 2048 | priv->tx_skbuff_dma[first_entry].len = skb_headlen(skb); | 2048 | priv->tx_skbuff_dma[first_entry].len = skb_headlen(skb); |
| 2049 | priv->tx_skbuff[first_entry] = skb; | 2049 | priv->tx_skbuff[first_entry] = skb; |
| 2050 | 2050 | ||
| 2051 | first->des0 = des; | 2051 | first->des0 = cpu_to_le32(des); |
| 2052 | 2052 | ||
| 2053 | /* Fill start of payload in buff2 of first descriptor */ | 2053 | /* Fill start of payload in buff2 of first descriptor */ |
| 2054 | if (pay_len) | 2054 | if (pay_len) |
| 2055 | first->des1 = des + proto_hdr_len; | 2055 | first->des1 = cpu_to_le32(des + proto_hdr_len); |
| 2056 | 2056 | ||
| 2057 | /* If needed take extra descriptors to fill the remaining payload */ | 2057 | /* If needed take extra descriptors to fill the remaining payload */ |
| 2058 | tmp_pay_len = pay_len - TSO_MAX_BUFF_SIZE; | 2058 | tmp_pay_len = pay_len - TSO_MAX_BUFF_SIZE; |
| @@ -2241,13 +2241,11 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) | |||
| 2241 | 2241 | ||
| 2242 | priv->tx_skbuff[entry] = NULL; | 2242 | priv->tx_skbuff[entry] = NULL; |
| 2243 | 2243 | ||
| 2244 | if (unlikely(priv->synopsys_id >= DWMAC_CORE_4_00)) { | 2244 | priv->tx_skbuff_dma[entry].buf = des; |
| 2245 | desc->des0 = des; | 2245 | if (unlikely(priv->synopsys_id >= DWMAC_CORE_4_00)) |
| 2246 | priv->tx_skbuff_dma[entry].buf = desc->des0; | 2246 | desc->des0 = cpu_to_le32(des); |
| 2247 | } else { | 2247 | else |
| 2248 | desc->des2 = des; | 2248 | desc->des2 = cpu_to_le32(des); |
| 2249 | priv->tx_skbuff_dma[entry].buf = desc->des2; | ||
| 2250 | } | ||
| 2251 | 2249 | ||
| 2252 | priv->tx_skbuff_dma[entry].map_as_page = true; | 2250 | priv->tx_skbuff_dma[entry].map_as_page = true; |
| 2253 | priv->tx_skbuff_dma[entry].len = len; | 2251 | priv->tx_skbuff_dma[entry].len = len; |
| @@ -2318,13 +2316,11 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) | |||
| 2318 | if (dma_mapping_error(priv->device, des)) | 2316 | if (dma_mapping_error(priv->device, des)) |
| 2319 | goto dma_map_err; | 2317 | goto dma_map_err; |
| 2320 | 2318 | ||
| 2321 | if (unlikely(priv->synopsys_id >= DWMAC_CORE_4_00)) { | 2319 | priv->tx_skbuff_dma[first_entry].buf = des; |
| 2322 | first->des0 = des; | 2320 | if (unlikely(priv->synopsys_id >= DWMAC_CORE_4_00)) |
| 2323 | priv->tx_skbuff_dma[first_entry].buf = first->des0; | 2321 | first->des0 = cpu_to_le32(des); |
| 2324 | } else { | 2322 | else |
| 2325 | first->des2 = des; | 2323 | first->des2 = cpu_to_le32(des); |
| 2326 | priv->tx_skbuff_dma[first_entry].buf = first->des2; | ||
| 2327 | } | ||
| 2328 | 2324 | ||
| 2329 | priv->tx_skbuff_dma[first_entry].len = nopaged_len; | 2325 | priv->tx_skbuff_dma[first_entry].len = nopaged_len; |
| 2330 | priv->tx_skbuff_dma[first_entry].last_segment = last_segment; | 2326 | priv->tx_skbuff_dma[first_entry].last_segment = last_segment; |
| @@ -2438,10 +2434,10 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv) | |||
| 2438 | } | 2434 | } |
| 2439 | 2435 | ||
| 2440 | if (unlikely(priv->synopsys_id >= DWMAC_CORE_4_00)) { | 2436 | if (unlikely(priv->synopsys_id >= DWMAC_CORE_4_00)) { |
| 2441 | p->des0 = priv->rx_skbuff_dma[entry]; | 2437 | p->des0 = cpu_to_le32(priv->rx_skbuff_dma[entry]); |
| 2442 | p->des1 = 0; | 2438 | p->des1 = 0; |
| 2443 | } else { | 2439 | } else { |
| 2444 | p->des2 = priv->rx_skbuff_dma[entry]; | 2440 | p->des2 = cpu_to_le32(priv->rx_skbuff_dma[entry]); |
| 2445 | } | 2441 | } |
| 2446 | if (priv->hw->mode->refill_desc3) | 2442 | if (priv->hw->mode->refill_desc3) |
| 2447 | priv->hw->mode->refill_desc3(priv, p); | 2443 | priv->hw->mode->refill_desc3(priv, p); |
| @@ -2542,9 +2538,9 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit) | |||
| 2542 | unsigned int des; | 2538 | unsigned int des; |
| 2543 | 2539 | ||
| 2544 | if (unlikely(priv->synopsys_id >= DWMAC_CORE_4_00)) | 2540 | if (unlikely(priv->synopsys_id >= DWMAC_CORE_4_00)) |
| 2545 | des = p->des0; | 2541 | des = le32_to_cpu(p->des0); |
| 2546 | else | 2542 | else |
| 2547 | des = p->des2; | 2543 | des = le32_to_cpu(p->des2); |
| 2548 | 2544 | ||
| 2549 | frame_len = priv->hw->desc->get_rx_frame_len(p, coe); | 2545 | frame_len = priv->hw->desc->get_rx_frame_len(p, coe); |
| 2550 | 2546 | ||
| @@ -2901,14 +2897,17 @@ static void sysfs_display_ring(void *head, int size, int extend_desc, | |||
| 2901 | x = *(u64 *) ep; | 2897 | x = *(u64 *) ep; |
| 2902 | seq_printf(seq, "%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n", | 2898 | seq_printf(seq, "%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n", |
| 2903 | i, (unsigned int)virt_to_phys(ep), | 2899 | i, (unsigned int)virt_to_phys(ep), |
| 2904 | ep->basic.des0, ep->basic.des1, | 2900 | le32_to_cpu(ep->basic.des0), |
| 2905 | ep->basic.des2, ep->basic.des3); | 2901 | le32_to_cpu(ep->basic.des1), |
| 2902 | le32_to_cpu(ep->basic.des2), | ||
| 2903 | le32_to_cpu(ep->basic.des3)); | ||
| 2906 | ep++; | 2904 | ep++; |
| 2907 | } else { | 2905 | } else { |
| 2908 | x = *(u64 *) p; | 2906 | x = *(u64 *) p; |
| 2909 | seq_printf(seq, "%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n", | 2907 | seq_printf(seq, "%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n", |
| 2910 | i, (unsigned int)virt_to_phys(ep), | 2908 | i, (unsigned int)virt_to_phys(ep), |
| 2911 | p->des0, p->des1, p->des2, p->des3); | 2909 | le32_to_cpu(p->des0), le32_to_cpu(p->des1), |
| 2910 | le32_to_cpu(p->des2), le32_to_cpu(p->des3)); | ||
| 2912 | p++; | 2911 | p++; |
| 2913 | } | 2912 | } |
| 2914 | seq_printf(seq, "\n"); | 2913 | seq_printf(seq, "\n"); |
