aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--arch/arm64/boot/dts/renesas/Makefile4
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts19
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts19
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7795.dtsi16
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts19
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796.dtsi32
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77970-eagle.dts57
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77970.dtsi16
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77995-draak.dts27
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77995.dtsi56
-rw-r--r--arch/arm64/boot/dts/renesas/salvator-common.dtsi16
-rw-r--r--arch/arm64/boot/dts/renesas/ulcb-kf.dtsi169
-rw-r--r--arch/arm64/boot/dts/renesas/ulcb.dtsi5
13 files changed, 431 insertions, 24 deletions
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 381928bc1358..53a91225ec06 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -1,7 +1,11 @@
1dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb 1dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
2dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf.dtb
2dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-xs.dtb 3dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-xs.dtb
3dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb 4dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
5dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb
4dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb 6dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
7dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb
8dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb
5dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb 9dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
6 10
7always := $(dtb-y) 11always := $(dtb-y)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
new file mode 100644
index 000000000000..009cb1cb0dde
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
@@ -0,0 +1,19 @@
1/*
2 * Device Tree Source for the H3ULCB Kingfisher board
3 *
4 * Copyright (C) 2017 Renesas Electronics Corp.
5 * Copyright (C) 2017 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12#include "r8a7795-es1-h3ulcb.dts"
13#include "ulcb-kf.dtsi"
14
15/ {
16 model = "Renesas H3ULCB Kingfisher board based on r8a7795 ES1.x";
17 compatible = "shimafuji,kingfisher", "renesas,h3ulcb",
18 "renesas,r8a7795";
19};
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
new file mode 100644
index 000000000000..4403227c0f97
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
@@ -0,0 +1,19 @@
1/*
2 * Device Tree Source for the H3ULCB Kingfisher board
3 *
4 * Copyright (C) 2017 Renesas Electronics Corp.
5 * Copyright (C) 2017 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12#include "r8a7795-h3ulcb.dts"
13#include "ulcb-kf.dtsi"
14
15/ {
16 model = "Renesas H3ULCB Kingfisher board based on r8a7795 ES2.0+";
17 compatible = "shimafuji,kingfisher", "renesas,h3ulcb",
18 "renesas,r8a7795";
19};
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index d5cfd1a1c539..15ef292a8d9f 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -220,7 +220,7 @@
220 220
221 gpio0: gpio@e6050000 { 221 gpio0: gpio@e6050000 {
222 compatible = "renesas,gpio-r8a7795", 222 compatible = "renesas,gpio-r8a7795",
223 "renesas,gpio-rcar"; 223 "renesas,rcar-gen3-gpio";
224 reg = <0 0xe6050000 0 0x50>; 224 reg = <0 0xe6050000 0 0x50>;
225 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 225 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
226 #gpio-cells = <2>; 226 #gpio-cells = <2>;
@@ -235,7 +235,7 @@
235 235
236 gpio1: gpio@e6051000 { 236 gpio1: gpio@e6051000 {
237 compatible = "renesas,gpio-r8a7795", 237 compatible = "renesas,gpio-r8a7795",
238 "renesas,gpio-rcar"; 238 "renesas,rcar-gen3-gpio";
239 reg = <0 0xe6051000 0 0x50>; 239 reg = <0 0xe6051000 0 0x50>;
240 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 240 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
241 #gpio-cells = <2>; 241 #gpio-cells = <2>;
@@ -250,7 +250,7 @@
250 250
251 gpio2: gpio@e6052000 { 251 gpio2: gpio@e6052000 {
252 compatible = "renesas,gpio-r8a7795", 252 compatible = "renesas,gpio-r8a7795",
253 "renesas,gpio-rcar"; 253 "renesas,rcar-gen3-gpio";
254 reg = <0 0xe6052000 0 0x50>; 254 reg = <0 0xe6052000 0 0x50>;
255 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 255 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
256 #gpio-cells = <2>; 256 #gpio-cells = <2>;
@@ -265,7 +265,7 @@
265 265
266 gpio3: gpio@e6053000 { 266 gpio3: gpio@e6053000 {
267 compatible = "renesas,gpio-r8a7795", 267 compatible = "renesas,gpio-r8a7795",
268 "renesas,gpio-rcar"; 268 "renesas,rcar-gen3-gpio";
269 reg = <0 0xe6053000 0 0x50>; 269 reg = <0 0xe6053000 0 0x50>;
270 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 270 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
271 #gpio-cells = <2>; 271 #gpio-cells = <2>;
@@ -280,7 +280,7 @@
280 280
281 gpio4: gpio@e6054000 { 281 gpio4: gpio@e6054000 {
282 compatible = "renesas,gpio-r8a7795", 282 compatible = "renesas,gpio-r8a7795",
283 "renesas,gpio-rcar"; 283 "renesas,rcar-gen3-gpio";
284 reg = <0 0xe6054000 0 0x50>; 284 reg = <0 0xe6054000 0 0x50>;
285 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 285 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
286 #gpio-cells = <2>; 286 #gpio-cells = <2>;
@@ -295,7 +295,7 @@
295 295
296 gpio5: gpio@e6055000 { 296 gpio5: gpio@e6055000 {
297 compatible = "renesas,gpio-r8a7795", 297 compatible = "renesas,gpio-r8a7795",
298 "renesas,gpio-rcar"; 298 "renesas,rcar-gen3-gpio";
299 reg = <0 0xe6055000 0 0x50>; 299 reg = <0 0xe6055000 0 0x50>;
300 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 300 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
301 #gpio-cells = <2>; 301 #gpio-cells = <2>;
@@ -310,7 +310,7 @@
310 310
311 gpio6: gpio@e6055400 { 311 gpio6: gpio@e6055400 {
312 compatible = "renesas,gpio-r8a7795", 312 compatible = "renesas,gpio-r8a7795",
313 "renesas,gpio-rcar"; 313 "renesas,rcar-gen3-gpio";
314 reg = <0 0xe6055400 0 0x50>; 314 reg = <0 0xe6055400 0 0x50>;
315 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 315 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
316 #gpio-cells = <2>; 316 #gpio-cells = <2>;
@@ -325,7 +325,7 @@
325 325
326 gpio7: gpio@e6055800 { 326 gpio7: gpio@e6055800 {
327 compatible = "renesas,gpio-r8a7795", 327 compatible = "renesas,gpio-r8a7795",
328 "renesas,gpio-rcar"; 328 "renesas,rcar-gen3-gpio";
329 reg = <0 0xe6055800 0 0x50>; 329 reg = <0 0xe6055800 0 0x50>;
330 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 330 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
331 #gpio-cells = <2>; 331 #gpio-cells = <2>;
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
new file mode 100644
index 000000000000..de2390f009e7
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
@@ -0,0 +1,19 @@
1/*
2 * Device Tree Source for the M3ULCB Kingfisher board
3 *
4 * Copyright (C) 2017 Renesas Electronics Corp.
5 * Copyright (C) 2017 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12#include "r8a7796-m3ulcb.dts"
13#include "ulcb-kf.dtsi"
14
15/ {
16 model = "Renesas M3ULCB Kingfisher board based on r8a7796";
17 compatible = "shimafuji,kingfisher", "renesas,m3ulcb",
18 "renesas,r8a7796";
19};
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 57ac5ca6ed98..f2b2e40c655e 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -214,7 +214,7 @@
214 214
215 gpio0: gpio@e6050000 { 215 gpio0: gpio@e6050000 {
216 compatible = "renesas,gpio-r8a7796", 216 compatible = "renesas,gpio-r8a7796",
217 "renesas,gpio-rcar"; 217 "renesas,rcar-gen3-gpio";
218 reg = <0 0xe6050000 0 0x50>; 218 reg = <0 0xe6050000 0 0x50>;
219 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 219 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
220 #gpio-cells = <2>; 220 #gpio-cells = <2>;
@@ -229,7 +229,7 @@
229 229
230 gpio1: gpio@e6051000 { 230 gpio1: gpio@e6051000 {
231 compatible = "renesas,gpio-r8a7796", 231 compatible = "renesas,gpio-r8a7796",
232 "renesas,gpio-rcar"; 232 "renesas,rcar-gen3-gpio";
233 reg = <0 0xe6051000 0 0x50>; 233 reg = <0 0xe6051000 0 0x50>;
234 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 234 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
235 #gpio-cells = <2>; 235 #gpio-cells = <2>;
@@ -244,7 +244,7 @@
244 244
245 gpio2: gpio@e6052000 { 245 gpio2: gpio@e6052000 {
246 compatible = "renesas,gpio-r8a7796", 246 compatible = "renesas,gpio-r8a7796",
247 "renesas,gpio-rcar"; 247 "renesas,rcar-gen3-gpio";
248 reg = <0 0xe6052000 0 0x50>; 248 reg = <0 0xe6052000 0 0x50>;
249 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 249 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
250 #gpio-cells = <2>; 250 #gpio-cells = <2>;
@@ -259,7 +259,7 @@
259 259
260 gpio3: gpio@e6053000 { 260 gpio3: gpio@e6053000 {
261 compatible = "renesas,gpio-r8a7796", 261 compatible = "renesas,gpio-r8a7796",
262 "renesas,gpio-rcar"; 262 "renesas,rcar-gen3-gpio";
263 reg = <0 0xe6053000 0 0x50>; 263 reg = <0 0xe6053000 0 0x50>;
264 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 264 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
265 #gpio-cells = <2>; 265 #gpio-cells = <2>;
@@ -274,7 +274,7 @@
274 274
275 gpio4: gpio@e6054000 { 275 gpio4: gpio@e6054000 {
276 compatible = "renesas,gpio-r8a7796", 276 compatible = "renesas,gpio-r8a7796",
277 "renesas,gpio-rcar"; 277 "renesas,rcar-gen3-gpio";
278 reg = <0 0xe6054000 0 0x50>; 278 reg = <0 0xe6054000 0 0x50>;
279 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 279 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
280 #gpio-cells = <2>; 280 #gpio-cells = <2>;
@@ -289,7 +289,7 @@
289 289
290 gpio5: gpio@e6055000 { 290 gpio5: gpio@e6055000 {
291 compatible = "renesas,gpio-r8a7796", 291 compatible = "renesas,gpio-r8a7796",
292 "renesas,gpio-rcar"; 292 "renesas,rcar-gen3-gpio";
293 reg = <0 0xe6055000 0 0x50>; 293 reg = <0 0xe6055000 0 0x50>;
294 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 294 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
295 #gpio-cells = <2>; 295 #gpio-cells = <2>;
@@ -304,7 +304,7 @@
304 304
305 gpio6: gpio@e6055400 { 305 gpio6: gpio@e6055400 {
306 compatible = "renesas,gpio-r8a7796", 306 compatible = "renesas,gpio-r8a7796",
307 "renesas,gpio-rcar"; 307 "renesas,rcar-gen3-gpio";
308 reg = <0 0xe6055400 0 0x50>; 308 reg = <0 0xe6055400 0 0x50>;
309 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 309 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
310 #gpio-cells = <2>; 310 #gpio-cells = <2>;
@@ -319,7 +319,7 @@
319 319
320 gpio7: gpio@e6055800 { 320 gpio7: gpio@e6055800 {
321 compatible = "renesas,gpio-r8a7796", 321 compatible = "renesas,gpio-r8a7796",
322 "renesas,gpio-rcar"; 322 "renesas,rcar-gen3-gpio";
323 reg = <0 0xe6055800 0 0x50>; 323 reg = <0 0xe6055800 0 0x50>;
324 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 324 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
325 #gpio-cells = <2>; 325 #gpio-cells = <2>;
@@ -383,6 +383,22 @@
383 #power-domain-cells = <1>; 383 #power-domain-cells = <1>;
384 }; 384 };
385 385
386 intc_ex: interrupt-controller@e61c0000 {
387 compatible = "renesas,intc-ex-r8a7796", "renesas,irqc";
388 #interrupt-cells = <2>;
389 interrupt-controller;
390 reg = <0 0xe61c0000 0 0x200>;
391 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
392 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
393 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
394 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
395 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
396 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
397 clocks = <&cpg CPG_MOD 407>;
398 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
399 resets = <&cpg 407>;
400 };
401
386 i2c_dvfs: i2c@e60b0000 { 402 i2c_dvfs: i2c@e60b0000 {
387 #address-cells = <1>; 403 #address-cells = <1>;
388 #size-cells = <0>; 404 #size-cells = <0>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
new file mode 100644
index 000000000000..a711e77cc6a5
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
@@ -0,0 +1,57 @@
1/*
2 * Device Tree Source for the Eagle board
3 *
4 * Copyright (C) 2016-2017 Renesas Electronics Corp.
5 * Copyright (C) 2017 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12/dts-v1/;
13#include "r8a77970.dtsi"
14
15/ {
16 model = "Renesas Eagle board based on r8a77970";
17 compatible = "renesas,eagle", "renesas,r8a77970";
18
19 aliases {
20 serial0 = &scif0;
21 ethernet0 = &avb;
22 };
23
24 chosen {
25 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
26 stdout-path = "serial0:115200n8";
27 };
28
29 memory@48000000 {
30 device_type = "memory";
31 /* first 128MB is reserved for secure area. */
32 reg = <0x0 0x48000000 0x0 0x38000000>;
33 };
34};
35
36&extal_clk {
37 clock-frequency = <16666666>;
38};
39
40&extalr_clk {
41 clock-frequency = <32768>;
42};
43
44&scif0 {
45 status = "okay";
46};
47
48&avb {
49 renesas,no-ether-link;
50 phy-handle = <&phy0>;
51 status = "okay";
52
53 phy0: ethernet-phy@0 {
54 rxc-skew-ps = <1500>;
55 reg = <0>;
56 };
57};
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index aa9032d34189..97e6981938e7 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -124,6 +124,22 @@
124 #power-domain-cells = <1>; 124 #power-domain-cells = <1>;
125 }; 125 };
126 126
127 intc_ex: interrupt-controller@e61c0000 {
128 compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
129 #interrupt-cells = <2>;
130 interrupt-controller;
131 reg = <0 0xe61c0000 0 0x200>;
132 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
133 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
134 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
135 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
136 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
137 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
138 clocks = <&cpg CPG_MOD 407>;
139 power-domains = <&sysc 32>;
140 resets = <&cpg 407>;
141 };
142
127 prr: chipid@fff00044 { 143 prr: chipid@fff00044 {
128 compatible = "renesas,prr"; 144 compatible = "renesas,prr";
129 reg = <0 0xfff00044 0 4>; 145 reg = <0 0xfff00044 0 4>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 96b7ff5cc321..09de73b11db8 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -41,12 +41,21 @@
41&pfc { 41&pfc {
42 avb0_pins: avb { 42 avb0_pins: avb {
43 mux { 43 mux {
44 groups = "avb0_link", "avb0_phy_int", "avb0_mdc", 44 groups = "avb0_link", "avb0_mdc", "avb0_mii";
45 "avb0_mii";
46 function = "avb0"; 45 function = "avb0";
47 }; 46 };
48 }; 47 };
49 48
49 pwm0_pins: pwm0 {
50 groups = "pwm0_c";
51 function = "pwm0";
52 };
53
54 pwm1_pins: pwm1 {
55 groups = "pwm1_c";
56 function = "pwm1";
57 };
58
50 scif2_pins: scif2 { 59 scif2_pins: scif2 {
51 groups = "scif2_data"; 60 groups = "scif2_data";
52 function = "scif2"; 61 function = "scif2";
@@ -95,6 +104,20 @@
95 status = "okay"; 104 status = "okay";
96}; 105};
97 106
107&pwm0 {
108 pinctrl-0 = <&pwm0_pins>;
109 pinctrl-names = "default";
110
111 status = "okay";
112};
113
114&pwm1 {
115 pinctrl-0 = <&pwm1_pins>;
116 pinctrl-names = "default";
117
118 status = "okay";
119};
120
98&rwdt { 121&rwdt {
99 timeout-sec = <60>; 122 timeout-sec = <60>;
100 status = "okay"; 123 status = "okay";
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 56e42921e879..788e3afae6e3 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -139,6 +139,22 @@
139 #power-domain-cells = <1>; 139 #power-domain-cells = <1>;
140 }; 140 };
141 141
142 intc_ex: interrupt-controller@e61c0000 {
143 compatible = "renesas,intc-ex-r8a77995", "renesas,irqc";
144 #interrupt-cells = <2>;
145 interrupt-controller;
146 reg = <0 0xe61c0000 0 0x200>;
147 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
148 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
149 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
150 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
151 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
152 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
153 clocks = <&cpg CPG_MOD 407>;
154 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
155 resets = <&cpg 407>;
156 };
157
142 gpio0: gpio@e6050000 { 158 gpio0: gpio@e6050000 {
143 compatible = "renesas,gpio-r8a77995", 159 compatible = "renesas,gpio-r8a77995",
144 "renesas,rcar-gen3-gpio", 160 "renesas,rcar-gen3-gpio",
@@ -310,6 +326,46 @@
310 status = "disabled"; 326 status = "disabled";
311 }; 327 };
312 328
329 pwm0: pwm@e6e30000 {
330 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
331 reg = <0 0xe6e30000 0 0x8>;
332 #pwm-cells = <2>;
333 clocks = <&cpg CPG_MOD 523>;
334 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
335 resets = <&cpg 523>;
336 status = "disabled";
337 };
338
339 pwm1: pwm@e6e31000 {
340 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
341 reg = <0 0xe6e31000 0 0x8>;
342 #pwm-cells = <2>;
343 clocks = <&cpg CPG_MOD 523>;
344 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
345 resets = <&cpg 523>;
346 status = "disabled";
347 };
348
349 pwm2: pwm@e6e32000 {
350 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
351 reg = <0 0xe6e32000 0 0x8>;
352 #pwm-cells = <2>;
353 clocks = <&cpg CPG_MOD 523>;
354 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
355 resets = <&cpg 523>;
356 status = "disabled";
357 };
358
359 pwm3: pwm@e6e33000 {
360 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
361 reg = <0 0xe6e33000 0 0x8>;
362 #pwm-cells = <2>;
363 clocks = <&cpg CPG_MOD 523>;
364 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
365 resets = <&cpg 523>;
366 status = "disabled";
367 };
368
313 ehci0: usb@ee080100 { 369 ehci0: usb@ee080100 {
314 compatible = "generic-ehci"; 370 compatible = "generic-ehci";
315 reg = <0 0xee080100 0 0x100>; 371 reg = <0 0xee080100 0 0x100>;
diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index 4786c67b5e65..2fbb6e3b5dbe 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -52,7 +52,7 @@
52 */ 52 */
53 compatible = "fixed-clock"; 53 compatible = "fixed-clock";
54 #clock-cells = <0>; 54 #clock-cells = <0>;
55 clock-frequency = <11289600>; 55 clock-frequency = <12288000>;
56 }; 56 };
57 57
58 backlight: backlight { 58 backlight: backlight {
@@ -272,6 +272,7 @@
272}; 272};
273 273
274&ehci0 { 274&ehci0 {
275 dr_mode = "otg";
275 status = "okay"; 276 status = "okay";
276}; 277};
277 278
@@ -284,6 +285,7 @@
284}; 285};
285 286
286&hsusb { 287&hsusb {
288 dr_mode = "otg";
287 status = "okay"; 289 status = "okay";
288}; 290};
289 291
@@ -346,6 +348,7 @@
346}; 348};
347 349
348&ohci0 { 350&ohci0 {
351 dr_mode = "otg";
349 status = "okay"; 352 status = "okay";
350}; 353};
351 354
@@ -371,8 +374,7 @@
371 374
372 avb_pins: avb { 375 avb_pins: avb {
373 mux { 376 mux {
374 groups = "avb_link", "avb_phy_int", "avb_mdc", 377 groups = "avb_link", "avb_mdc", "avb_mii";
375 "avb_mii";
376 function = "avb"; 378 function = "avb";
377 }; 379 };
378 380
@@ -486,6 +488,11 @@
486 bias-pull-down; 488 bias-pull-down;
487 }; 489 };
488 }; 490 };
491
492 usb30_pins: usb30 {
493 groups = "usb30";
494 function = "usb30";
495 };
489}; 496};
490 497
491&pwm1 { 498&pwm1 {
@@ -621,5 +628,8 @@
621}; 628};
622 629
623&xhci0 { 630&xhci0 {
631 pinctrl-0 = <&usb30_pins>;
632 pinctrl-names = "default";
633
624 status = "okay"; 634 status = "okay";
625}; 635};
diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
new file mode 100644
index 000000000000..657ad1041965
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
@@ -0,0 +1,169 @@
1/*
2 * Device Tree Source for the Kingfisher (ULCB extension) board
3 *
4 * Copyright (C) 2017 Renesas Electronics Corp.
5 * Copyright (C) 2017 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12/ {
13 aliases {
14 serial1 = &hscif0;
15 serial2 = &scif1;
16 };
17};
18
19&can0 {
20 pinctrl-0 = <&can0_pins>;
21 pinctrl-names = "default";
22 status = "okay";
23};
24
25&can1 {
26 pinctrl-0 = <&can1_pins>;
27 pinctrl-names = "default";
28 status = "okay";
29};
30
31&ehci0 {
32 status = "okay";
33};
34
35&hscif0 {
36 pinctrl-0 = <&hscif0_pins>;
37 pinctrl-names = "default";
38 uart-has-rtscts;
39
40 status = "okay";
41};
42
43&hsusb {
44 status = "okay";
45};
46
47&i2c2 {
48 gpio_exp_74: gpio@74 {
49 compatible = "ti,tca9539";
50 reg = <0x74>;
51 gpio-controller;
52 #gpio-cells = <2>;
53 interrupt-controller;
54 interrupt-parent = <&gpio6>;
55 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
56
57 hub_pwen {
58 gpio-hog;
59 gpios = <6 GPIO_ACTIVE_HIGH>;
60 output-high;
61 line-name = "HUB pwen";
62 };
63
64 hub_rst {
65 gpio-hog;
66 gpios = <7 GPIO_ACTIVE_HIGH>;
67 output-high;
68 line-name = "HUB rst";
69 };
70 };
71
72 gpio_exp_75: gpio@75 {
73 compatible = "ti,tca9539";
74 reg = <0x75>;
75 gpio-controller;
76 #gpio-cells = <2>;
77 interrupt-controller;
78 interrupt-parent = <&gpio6>;
79 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
80 };
81
82 i2cswitch2: i2c-switch@71 {
83 compatible = "nxp,pca9548";
84 #address-cells = <1>;
85 #size-cells = <0>;
86 reg = <0x71>;
87 reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
88 };
89};
90
91&i2c4 {
92 gpio_exp_76: gpio@76 {
93 compatible = "ti,tca9539";
94 reg = <0x76>;
95 gpio-controller;
96 #gpio-cells = <2>;
97 interrupt-controller;
98 interrupt-parent = <&gpio7>;
99 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
100 };
101
102 gpio_exp_77: gpio@77 {
103 compatible = "ti,tca9539";
104 reg = <0x77>;
105 gpio-controller;
106 #gpio-cells = <2>;
107 interrupt-controller;
108 interrupt-parent = <&gpio5>;
109 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
110 };
111
112 i2cswitch4: i2c-switch@71 {
113 compatible = "nxp,pca9548";
114 #address-cells = <1>;
115 #size-cells = <0>;
116 reg = <0x71>;
117 reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
118 };
119};
120
121&ohci0 {
122 status = "okay";
123};
124
125&pcie_bus_clk {
126 clock-frequency = <100000000>;
127};
128
129&pciec0 {
130 status = "okay";
131};
132
133&pciec1 {
134 status = "okay";
135};
136
137&pfc {
138 can0_pins: can0 {
139 groups = "can0_data_a";
140 function = "can0";
141 };
142
143 can1_pins: can1 {
144 groups = "can1_data";
145 function = "can1";
146 };
147
148 hscif0_pins: hscif0 {
149 groups = "hscif0_data", "hscif0_ctrl";
150 function = "hscif0";
151 };
152
153 scif1_pins: scif1 {
154 groups = "scif1_data_b", "scif1_ctrl";
155 function = "scif1";
156 };
157};
158
159&scif1 {
160 pinctrl-0 = <&scif1_pins>;
161 pinctrl-names = "default";
162 uart-has-rtscts;
163
164 status = "okay";
165};
166
167&xhci0 {
168 status = "okay";
169};
diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index dfec9072718b..0d85b315ce71 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -31,7 +31,7 @@
31 */ 31 */
32 compatible = "fixed-clock"; 32 compatible = "fixed-clock";
33 #clock-cells = <0>; 33 #clock-cells = <0>;
34 clock-frequency = <11289600>; 34 clock-frequency = <12288000>;
35 }; 35 };
36 36
37 hdmi0-out { 37 hdmi0-out {
@@ -254,8 +254,7 @@
254 254
255 avb_pins: avb { 255 avb_pins: avb {
256 mux { 256 mux {
257 groups = "avb_link", "avb_phy_int", "avb_mdc", 257 groups = "avb_link", "avb_mdc", "avb_mii";
258 "avb_mii";
259 function = "avb"; 258 function = "avb";
260 }; 259 };
261 260
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-26 18:41:19 -0400