diff options
| -rw-r--r-- | arch/s390/pci/pci.c | 49 |
1 files changed, 6 insertions, 43 deletions
diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c index 9ddc51eeb8d6..30de42730b2f 100644 --- a/arch/s390/pci/pci.c +++ b/arch/s390/pci/pci.c | |||
| @@ -48,13 +48,10 @@ | |||
| 48 | static LIST_HEAD(zpci_list); | 48 | static LIST_HEAD(zpci_list); |
| 49 | static DEFINE_SPINLOCK(zpci_list_lock); | 49 | static DEFINE_SPINLOCK(zpci_list_lock); |
| 50 | 50 | ||
| 51 | static void zpci_enable_irq(struct irq_data *data); | ||
| 52 | static void zpci_disable_irq(struct irq_data *data); | ||
| 53 | |||
| 54 | static struct irq_chip zpci_irq_chip = { | 51 | static struct irq_chip zpci_irq_chip = { |
| 55 | .name = "zPCI", | 52 | .name = "zPCI", |
| 56 | .irq_unmask = zpci_enable_irq, | 53 | .irq_unmask = unmask_msi_irq, |
| 57 | .irq_mask = zpci_disable_irq, | 54 | .irq_mask = mask_msi_irq, |
| 58 | }; | 55 | }; |
| 59 | 56 | ||
| 60 | static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES); | 57 | static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES); |
| @@ -244,43 +241,6 @@ static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len) | |||
| 244 | return rc; | 241 | return rc; |
| 245 | } | 242 | } |
| 246 | 243 | ||
| 247 | static int zpci_msi_set_mask_bits(struct msi_desc *msi, u32 mask, u32 flag) | ||
| 248 | { | ||
| 249 | int offset, pos; | ||
| 250 | u32 mask_bits; | ||
| 251 | |||
| 252 | if (msi->msi_attrib.is_msix) { | ||
| 253 | offset = msi->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + | ||
| 254 | PCI_MSIX_ENTRY_VECTOR_CTRL; | ||
| 255 | msi->masked = readl(msi->mask_base + offset); | ||
| 256 | writel(flag, msi->mask_base + offset); | ||
| 257 | } else if (msi->msi_attrib.maskbit) { | ||
| 258 | pos = (long) msi->mask_base; | ||
| 259 | pci_read_config_dword(msi->dev, pos, &mask_bits); | ||
| 260 | mask_bits &= ~(mask); | ||
| 261 | mask_bits |= flag & mask; | ||
| 262 | pci_write_config_dword(msi->dev, pos, mask_bits); | ||
| 263 | } else | ||
| 264 | return 0; | ||
| 265 | |||
| 266 | msi->msi_attrib.maskbit = !!flag; | ||
| 267 | return 1; | ||
| 268 | } | ||
| 269 | |||
| 270 | static void zpci_enable_irq(struct irq_data *data) | ||
| 271 | { | ||
| 272 | struct msi_desc *msi = irq_get_msi_desc(data->irq); | ||
| 273 | |||
| 274 | zpci_msi_set_mask_bits(msi, 1, 0); | ||
| 275 | } | ||
| 276 | |||
| 277 | static void zpci_disable_irq(struct irq_data *data) | ||
| 278 | { | ||
| 279 | struct msi_desc *msi = irq_get_msi_desc(data->irq); | ||
| 280 | |||
| 281 | zpci_msi_set_mask_bits(msi, 1, 1); | ||
| 282 | } | ||
| 283 | |||
| 284 | void pcibios_fixup_bus(struct pci_bus *bus) | 244 | void pcibios_fixup_bus(struct pci_bus *bus) |
| 285 | { | 245 | { |
| 286 | } | 246 | } |
| @@ -487,7 +447,10 @@ void arch_teardown_msi_irqs(struct pci_dev *pdev) | |||
| 487 | 447 | ||
| 488 | /* Release MSI interrupts */ | 448 | /* Release MSI interrupts */ |
| 489 | list_for_each_entry(msi, &pdev->msi_list, list) { | 449 | list_for_each_entry(msi, &pdev->msi_list, list) { |
| 490 | zpci_msi_set_mask_bits(msi, 1, 1); | 450 | if (msi->msi_attrib.is_msix) |
| 451 | default_msix_mask_irq(msi, 1); | ||
| 452 | else | ||
| 453 | default_msi_mask_irq(msi, 1, 1); | ||
| 491 | irq_set_msi_desc(msi->irq, NULL); | 454 | irq_set_msi_desc(msi->irq, NULL); |
| 492 | irq_free_desc(msi->irq); | 455 | irq_free_desc(msi->irq); |
| 493 | msi->msg.address_lo = 0; | 456 | msi->msg.address_lo = 0; |
