3 files changed, 5 insertions, 1 deletions

diff --git a/arch/m68k/include/asm/m5441xsim.h b/arch/m68k/include/asm/m5441xsim.h
index 4279c0df0844..64f60be47066 100644
--- a/arch/m68k/include/asm/m5441xsim.h
+++ b/arch/m68k/include/asm/m5441xsim.h
@@ -12,6 +12,8 @@
 #define MCF_BUSCLK              (MCF_CLK / 2)
 #define MACHINE                 MACH_M5441X
 #define FPUTYPE                 0
+#define IOMEMBASE               0xe0000000
+#define IOMEMSIZE               0x20000000
 
 #include <asm/m54xxacr.h>
 
diff --git a/arch/m68k/include/asm/m54xxacr.h b/arch/m68k/include/asm/m54xxacr.h
index 59e171063c2f..c6ac05cda282 100644
--- a/arch/m68k/include/asm/m54xxacr.h
+++ b/arch/m68k/include/asm/m54xxacr.h
@@ -94,7 +94,7 @@
  *      register region as non-cacheable. And then we map all our RAM as
  *      cacheable and supervisor access only.
  */
-#define ACR0_MODE       (ACR_BA(CONFIG_MBAR)+ACR_ADMSK(0x1000000)+ \
+#define ACR0_MODE       (ACR_BA(IOMEMBASE)+ACR_ADMSK(IOMEMSIZE)+ \
                          ACR_ENABLE+ACR_SUPER+ACR_CM_OFF_PRE+ACR_SP)
 #if defined(CONFIG_CACHE_COPYBACK)
 #define ACR1_MODE       (ACR_BA(CONFIG_RAMBASE)+ACR_ADMSK(CONFIG_RAMSIZE)+ \
diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h
index 7dd6cc4bcd72..73d937ff36eb 100644
--- a/arch/m68k/include/asm/m54xxsim.h
+++ b/arch/m68k/include/asm/m54xxsim.h
@@ -10,6 +10,8 @@
 #define MCF_BUSCLK              (MCF_CLK / 2)
 #define MACHINE                 MACH_M54XX
 #define FPUTYPE                 FPU_COLDFIRE
+#define IOMEMBASE               MCF_MBAR
+#define IOMEMSIZE               0x01000000
 
 #include <asm/m54xxacr.h>