12 files changed, 115 insertions, 16 deletions

diff --git a/MAINTAINERS b/MAINTAINERS
index 5f467845ef72..3647db1d1852 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3591,6 +3591,13 @@ F:	drivers/gpu/drm/i915/
 F:      include/drm/i915*
 F:      include/uapi/drm/i915*
 
+DRM DRIVERS FOR ATMEL HLCDC
+M:      Boris Brezillon <boris.brezillon@free-electrons.com>
+L:      dri-devel@lists.freedesktop.org
+S:      Supported
+F:      drivers/gpu/drm/atmel-hlcdc/
+F:      Documentation/devicetree/bindings/drm/atmel/
+
 DRM DRIVERS FOR EXYNOS
 M:      Inki Dae <inki.dae@samsung.com>
 M:      Joonyoung Shim <jy0922.shim@samsung.com>
@@ -3619,6 +3626,14 @@ S:	Maintained
 F:      drivers/gpu/drm/imx/
 F:      Documentation/devicetree/bindings/drm/imx/
 
+DRM DRIVERS FOR GMA500 (Poulsbo, Moorestown and derivative chipsets)
+M:      Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
+L:      dri-devel@lists.freedesktop.org
+T:      git git://github.com/patjak/drm-gma500
+S:      Maintained
+F:      drivers/gpu/drm/gma500
+F:      include/drm/gma500*
+
 DRM DRIVERS FOR NVIDIA TEGRA
 M:      Thierry Reding <thierry.reding@gmail.com>
 M:      Terje Bergström <tbergstrom@nvidia.com>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
index 77f1d7c6ea3a..9416e0f5c1db 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
@@ -672,8 +672,12 @@ int amdgpu_atombios_get_clock_info(struct amdgpu_device *adev)
                 /* disp clock */
                 adev->clock.default_dispclk =
                         le32_to_cpu(firmware_info->info_21.ulDefaultDispEngineClkFreq);
-                if (adev->clock.default_dispclk == 0)
-                        adev->clock.default_dispclk = 54000; /* 540 Mhz */
+                /* set a reasonable default for DP */
+                if (adev->clock.default_dispclk < 53900) {
+                        DRM_INFO("Changing default dispclk from %dMhz to 600Mhz\n",
+                                 adev->clock.default_dispclk / 100);
+                        adev->clock.default_dispclk = 60000;
+                }
                 adev->clock.dp_extclk =
                         le16_to_cpu(firmware_info->info_21.usUniphyDPModeExtClkFreq);
                 adev->clock.current_dispclk = adev->clock.default_dispclk;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index e3d70772b531..dc29ed8145c2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -85,8 +85,6 @@ static void amdgpu_flip_work_func(struct work_struct *__work)
         /* We borrow the event spin lock for protecting flip_status */
         spin_lock_irqsave(&crtc->dev->event_lock, flags);
 
-        /* set the proper interrupt */
-        amdgpu_irq_get(adev, &adev->pageflip_irq, work->crtc_id);
         /* do the flip (mmio) */
         adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base);
         /* set the flip status */
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index e4d101b1252a..d4c82b625727 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -255,6 +255,24 @@ static u32 dce_v10_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)
                 return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);
 }
 
+static void dce_v10_0_pageflip_interrupt_init(struct amdgpu_device *adev)
+{
+        unsigned i;
+
+        /* Enable pflip interrupts */
+        for (i = 0; i < adev->mode_info.num_crtc; i++)
+                amdgpu_irq_get(adev, &adev->pageflip_irq, i);
+}
+
+static void dce_v10_0_pageflip_interrupt_fini(struct amdgpu_device *adev)
+{
+        unsigned i;
+
+        /* Disable pflip interrupts */
+        for (i = 0; i < adev->mode_info.num_crtc; i++)
+                amdgpu_irq_put(adev, &adev->pageflip_irq, i);
+}
+
 /**
  * dce_v10_0_page_flip - pageflip callback.
  *
@@ -2663,9 +2681,10 @@ static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, int mode)
                 dce_v10_0_vga_enable(crtc, true);
                 amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);
                 dce_v10_0_vga_enable(crtc, false);
-                /* Make sure VBLANK interrupt is still enabled */
+                /* Make sure VBLANK and PFLIP interrupts are still enabled */
                 type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id);
                 amdgpu_irq_update(adev, &adev->crtc_irq, type);
+                amdgpu_irq_update(adev, &adev->pageflip_irq, type);
                 drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id);
                 dce_v10_0_crtc_load_lut(crtc);
                 break;
@@ -3025,6 +3044,8 @@ static int dce_v10_0_hw_init(void *handle)
                 dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
         }
 
+        dce_v10_0_pageflip_interrupt_init(adev);
+
         return 0;
 }
 
@@ -3039,6 +3060,8 @@ static int dce_v10_0_hw_fini(void *handle)
                 dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
         }
 
+        dce_v10_0_pageflip_interrupt_fini(adev);
+
         return 0;
 }
 
@@ -3050,6 +3073,8 @@ static int dce_v10_0_suspend(void *handle)
 
         dce_v10_0_hpd_fini(adev);
 
+        dce_v10_0_pageflip_interrupt_fini(adev);
+
         return 0;
 }
 
@@ -3075,6 +3100,8 @@ static int dce_v10_0_resume(void *handle)
         /* initialize hpd */
         dce_v10_0_hpd_init(adev);
 
+        dce_v10_0_pageflip_interrupt_init(adev);
+
         return 0;
 }
 
@@ -3369,7 +3396,6 @@ static int dce_v10_0_pageflip_irq(struct amdgpu_device *adev,
         spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
 
         drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id);
-        amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id);
         queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work);
 
         return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index fcd2ed558902..7e1cf5e4eebf 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -233,6 +233,24 @@ static u32 dce_v11_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)
                 return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);
 }
 
+static void dce_v11_0_pageflip_interrupt_init(struct amdgpu_device *adev)
+{
+        unsigned i;
+
+        /* Enable pflip interrupts */
+        for (i = 0; i < adev->mode_info.num_crtc; i++)
+                amdgpu_irq_get(adev, &adev->pageflip_irq, i);
+}
+
+static void dce_v11_0_pageflip_interrupt_fini(struct amdgpu_device *adev)
+{
+        unsigned i;
+
+        /* Disable pflip interrupts */
+        for (i = 0; i < adev->mode_info.num_crtc; i++)
+                amdgpu_irq_put(adev, &adev->pageflip_irq, i);
+}
+
 /**
  * dce_v11_0_page_flip - pageflip callback.
  *
@@ -2640,9 +2658,10 @@ static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode)
                 dce_v11_0_vga_enable(crtc, true);
                 amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);
                 dce_v11_0_vga_enable(crtc, false);
-                /* Make sure VBLANK interrupt is still enabled */
+                /* Make sure VBLANK and PFLIP interrupts are still enabled */
                 type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id);
                 amdgpu_irq_update(adev, &adev->crtc_irq, type);
+                amdgpu_irq_update(adev, &adev->pageflip_irq, type);
                 drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id);
                 dce_v11_0_crtc_load_lut(crtc);
                 break;
@@ -3000,6 +3019,8 @@ static int dce_v11_0_hw_init(void *handle)
                 dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
         }
 
+        dce_v11_0_pageflip_interrupt_init(adev);
+
         return 0;
 }
 
@@ -3014,6 +3035,8 @@ static int dce_v11_0_hw_fini(void *handle)
                 dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
         }
 
+        dce_v11_0_pageflip_interrupt_fini(adev);
+
         return 0;
 }
 
@@ -3025,6 +3048,8 @@ static int dce_v11_0_suspend(void *handle)
 
         dce_v11_0_hpd_fini(adev);
 
+        dce_v11_0_pageflip_interrupt_fini(adev);
+
         return 0;
 }
 
@@ -3051,6 +3076,8 @@ static int dce_v11_0_resume(void *handle)
         /* initialize hpd */
         dce_v11_0_hpd_init(adev);
 
+        dce_v11_0_pageflip_interrupt_init(adev);
+
         return 0;
 }
 
@@ -3345,7 +3372,6 @@ static int dce_v11_0_pageflip_irq(struct amdgpu_device *adev,
         spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
 
         drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id);
-        amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id);
         queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work);
 
         return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index c86911c2ea2a..34b9c2a9d8d4 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -204,6 +204,24 @@ static u32 dce_v8_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)
                 return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);
 }
 
+static void dce_v8_0_pageflip_interrupt_init(struct amdgpu_device *adev)
+{
+        unsigned i;
+
+        /* Enable pflip interrupts */
+        for (i = 0; i < adev->mode_info.num_crtc; i++)
+                amdgpu_irq_get(adev, &adev->pageflip_irq, i);
+}
+
+static void dce_v8_0_pageflip_interrupt_fini(struct amdgpu_device *adev)
+{
+        unsigned i;
+
+        /* Disable pflip interrupts */
+        for (i = 0; i < adev->mode_info.num_crtc; i++)
+                amdgpu_irq_put(adev, &adev->pageflip_irq, i);
+}
+
 /**
  * dce_v8_0_page_flip - pageflip callback.
  *
@@ -2575,9 +2593,10 @@ static void dce_v8_0_crtc_dpms(struct drm_crtc *crtc, int mode)
                 dce_v8_0_vga_enable(crtc, true);
                 amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);
                 dce_v8_0_vga_enable(crtc, false);
-                /* Make sure VBLANK interrupt is still enabled */
+                /* Make sure VBLANK and PFLIP interrupts are still enabled */
                 type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id);
                 amdgpu_irq_update(adev, &adev->crtc_irq, type);
+                amdgpu_irq_update(adev, &adev->pageflip_irq, type);
                 drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id);
                 dce_v8_0_crtc_load_lut(crtc);
                 break;
@@ -2933,6 +2952,8 @@ static int dce_v8_0_hw_init(void *handle)
                 dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
         }
 
+        dce_v8_0_pageflip_interrupt_init(adev);
+
         return 0;
 }
 
@@ -2947,6 +2968,8 @@ static int dce_v8_0_hw_fini(void *handle)
                 dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);
         }
 
+        dce_v8_0_pageflip_interrupt_fini(adev);
+
         return 0;
 }
 
@@ -2958,6 +2981,8 @@ static int dce_v8_0_suspend(void *handle)
 
         dce_v8_0_hpd_fini(adev);
 
+        dce_v8_0_pageflip_interrupt_fini(adev);
+
         return 0;
 }
 
@@ -2981,6 +3006,8 @@ static int dce_v8_0_resume(void *handle)
         /* initialize hpd */
         dce_v8_0_hpd_init(adev);
 
+        dce_v8_0_pageflip_interrupt_init(adev);
+
         return 0;
 }
 
@@ -3376,7 +3403,6 @@ static int dce_v8_0_pageflip_irq(struct amdgpu_device *adev,
         spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
 
         drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id);
-        amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id);
         queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work);
 
         return 0;
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
index bf27a07dbce3..5bca390d9ae2 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -2801,12 +2801,13 @@ static int drm_dp_mst_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs
         if (msgs[num - 1].flags & I2C_M_RD)
                 reading = true;
 
-        if (!reading) {
+        if (!reading || (num - 1 > DP_REMOTE_I2C_READ_MAX_TRANSACTIONS)) {
                 DRM_DEBUG_KMS("Unsupported I2C transaction for MST device\n");
                 ret = -EIO;
                 goto out;
         }
 
+        memset(&msg, 0, sizeof(msg));
         msg.req_type = DP_REMOTE_I2C_READ;
         msg.u.i2c_read.num_transactions = num - 1;
         msg.u.i2c_read.port_number = port->port_num;
diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c
index 6cddae44fa6e..744f5c49c664 100644
--- a/drivers/gpu/drm/radeon/radeon_dp_mst.c
+++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c
@@ -283,6 +283,7 @@ static struct drm_connector *radeon_dp_add_mst_connector(struct drm_dp_mst_topol
         radeon_connector->mst_encoder = radeon_dp_create_fake_mst_encoder(master);
 
         drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
+        drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
         drm_mode_connector_set_path_property(connector, pathprop);
 
         return connector;
diff --git a/drivers/gpu/drm/virtio/virtgpu_debugfs.c b/drivers/gpu/drm/virtio/virtgpu_debugfs.c
index db8b49101a8b..512263919282 100644
--- a/drivers/gpu/drm/virtio/virtgpu_debugfs.c
+++ b/drivers/gpu/drm/virtio/virtgpu_debugfs.c
@@ -34,8 +34,8 @@ virtio_gpu_debugfs_irq_info(struct seq_file *m, void *data)
         struct drm_info_node *node = (struct drm_info_node *) m->private;
         struct virtio_gpu_device *vgdev = node->minor->dev->dev_private;
 
-        seq_printf(m, "fence %ld %lld\n",
-                   atomic64_read(&vgdev->fence_drv.last_seq),
+        seq_printf(m, "fence %llu %lld\n",
+                   (u64)atomic64_read(&vgdev->fence_drv.last_seq),
                    vgdev->fence_drv.sync_seq);
         return 0;
 }
diff --git a/drivers/gpu/drm/virtio/virtgpu_fence.c b/drivers/gpu/drm/virtio/virtgpu_fence.c
index 1da632631dac..67097c9ce9c1 100644
--- a/drivers/gpu/drm/virtio/virtgpu_fence.c
+++ b/drivers/gpu/drm/virtio/virtgpu_fence.c
@@ -61,7 +61,7 @@ static void virtio_timeline_value_str(struct fence *f, char *str, int size)
 {
         struct virtio_gpu_fence *fence = to_virtio_fence(f);
 
-        snprintf(str, size, "%lu", atomic64_read(&fence->drv->last_seq));
+        snprintf(str, size, "%llu", (u64)atomic64_read(&fence->drv->last_seq));
 }
 
 static const struct fence_ops virtio_fence_ops = {
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
index 64b50409fa07..03f63c749c02 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
@@ -657,7 +657,8 @@ static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
         struct vmw_resource *res = &user_srf->srf.res;
 
         *p_base = NULL;
-        ttm_base_object_unref(&user_srf->backup_base);
+        if (user_srf->backup_base)
+                ttm_base_object_unref(&user_srf->backup_base);
         vmw_resource_unreference(&res);
 }
 
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index 0f408b002d98..5340099741ae 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -253,6 +253,7 @@ struct drm_dp_remote_dpcd_write {
         u8 *bytes;
 };
 
+#define DP_REMOTE_I2C_READ_MAX_TRANSACTIONS 4
 struct drm_dp_remote_i2c_read {
         u8 num_transactions;
         u8 port_number;
@@ -262,7 +263,7 @@ struct drm_dp_remote_i2c_read {
                 u8 *bytes;
                 u8 no_stop_bit;
                 u8 i2c_transaction_delay;
-        } transactions[4];
+        } transactions[DP_REMOTE_I2C_READ_MAX_TRANSACTIONS];
         u8 read_i2c_device_id;
         u8 num_bytes_read;
 };