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-rw-r--r--drivers/gpu/drm/drm_modes.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 173b7d335834..f64ac86deb84 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -165,6 +165,7 @@ struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
165 unsigned int vfieldrate, hperiod; 165 unsigned int vfieldrate, hperiod;
166 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; 166 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
167 int interlace; 167 int interlace;
168 u64 tmp;
168 169
169 /* allocate the drm_display_mode structure. If failure, we will 170 /* allocate the drm_display_mode structure. If failure, we will
170 * return directly 171 * return directly
@@ -322,8 +323,11 @@ struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
322 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 323 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
323 } 324 }
324 /* 15/13. Find pixel clock frequency (kHz for xf86) */ 325 /* 15/13. Find pixel clock frequency (kHz for xf86) */
325 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; 326 tmp = drm_mode->htotal; /* perform intermediate calcs in u64 */
326 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; 327 tmp *= HV_FACTOR * 1000;
328 do_div(tmp, hperiod);
329 tmp -= drm_mode->clock % CVT_CLOCK_STEP;
330 drm_mode->clock = tmp;
327 /* 18/16. Find actual vertical frame frequency */ 331 /* 18/16. Find actual vertical frame frequency */
328 /* ignore - just set the mode flag for interlaced */ 332 /* ignore - just set the mode flag for interlaced */
329 if (interlaced) { 333 if (interlaced) {