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-rw-r--r--drivers/net/ethernet/xilinx/xilinx_axienet.h5
-rw-r--r--drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c16
2 files changed, 11 insertions, 10 deletions
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet.h b/drivers/net/ethernet/xilinx/xilinx_axienet.h
index c337400485da..011adae32b89 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet.h
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet.h
@@ -484,6 +484,11 @@ static inline u32 axienet_ior(struct axienet_local *lp, off_t offset)
484 return in_be32(lp->regs + offset); 484 return in_be32(lp->regs + offset);
485} 485}
486 486
487static inline u32 axinet_ior_read_mcr(struct axienet_local *lp)
488{
489 return axienet_ior(lp, XAE_MDIO_MCR_OFFSET);
490}
491
487/** 492/**
488 * axienet_iow - Memory mapped Axi Ethernet register write 493 * axienet_iow - Memory mapped Axi Ethernet register write
489 * @lp: Pointer to axienet local structure 494 * @lp: Pointer to axienet local structure
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c b/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
index 757a3b37ae8a..704babdbc8a2 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
@@ -11,6 +11,7 @@
11#include <linux/of_address.h> 11#include <linux/of_address.h>
12#include <linux/of_mdio.h> 12#include <linux/of_mdio.h>
13#include <linux/jiffies.h> 13#include <linux/jiffies.h>
14#include <linux/iopoll.h>
14 15
15#include "xilinx_axienet.h" 16#include "xilinx_axienet.h"
16 17
@@ -20,16 +21,11 @@
20/* Wait till MDIO interface is ready to accept a new transaction.*/ 21/* Wait till MDIO interface is ready to accept a new transaction.*/
21int axienet_mdio_wait_until_ready(struct axienet_local *lp) 22int axienet_mdio_wait_until_ready(struct axienet_local *lp)
22{ 23{
23 unsigned long end = jiffies + 2; 24 u32 val;
24 while (!(axienet_ior(lp, XAE_MDIO_MCR_OFFSET) & 25
25 XAE_MDIO_MCR_READY_MASK)) { 26 return readx_poll_timeout(axinet_ior_read_mcr, lp,
26 if (time_before_eq(end, jiffies)) { 27 val, val & XAE_MDIO_MCR_READY_MASK,
27 WARN_ON(1); 28 1, 20000);
28 return -ETIMEDOUT;
29 }
30 udelay(1);
31 }
32 return 0;
33} 29}
34 30
35/** 31/**