diff options
| -rw-r--r-- | drivers/ntb/hw/intel/ntb_hw_intel.c | 2 | ||||
| -rw-r--r-- | drivers/ntb/ntb_transport.c | 58 | ||||
| -rw-r--r-- | drivers/ntb/test/ntb_perf.c | 4 | ||||
| -rwxr-xr-x | tools/testing/selftests/ntb/ntb_test.sh | 2 |
4 files changed, 15 insertions, 51 deletions
diff --git a/drivers/ntb/hw/intel/ntb_hw_intel.c b/drivers/ntb/hw/intel/ntb_hw_intel.c index c00238491673..7b3b6fd63d7d 100644 --- a/drivers/ntb/hw/intel/ntb_hw_intel.c +++ b/drivers/ntb/hw/intel/ntb_hw_intel.c | |||
| @@ -2878,7 +2878,7 @@ static const struct intel_ntb_reg skx_reg = { | |||
| 2878 | .link_is_up = xeon_link_is_up, | 2878 | .link_is_up = xeon_link_is_up, |
| 2879 | .db_ioread = skx_db_ioread, | 2879 | .db_ioread = skx_db_ioread, |
| 2880 | .db_iowrite = skx_db_iowrite, | 2880 | .db_iowrite = skx_db_iowrite, |
| 2881 | .db_size = sizeof(u64), | 2881 | .db_size = sizeof(u32), |
| 2882 | .ntb_ctl = SKX_NTBCNTL_OFFSET, | 2882 | .ntb_ctl = SKX_NTBCNTL_OFFSET, |
| 2883 | .mw_bar = {2, 4}, | 2883 | .mw_bar = {2, 4}, |
| 2884 | }; | 2884 | }; |
diff --git a/drivers/ntb/ntb_transport.c b/drivers/ntb/ntb_transport.c index 02ca45fdd892..10e5bf460139 100644 --- a/drivers/ntb/ntb_transport.c +++ b/drivers/ntb/ntb_transport.c | |||
| @@ -177,14 +177,12 @@ struct ntb_transport_qp { | |||
| 177 | u64 rx_err_ver; | 177 | u64 rx_err_ver; |
| 178 | u64 rx_memcpy; | 178 | u64 rx_memcpy; |
| 179 | u64 rx_async; | 179 | u64 rx_async; |
| 180 | u64 dma_rx_prep_err; | ||
| 181 | u64 tx_bytes; | 180 | u64 tx_bytes; |
| 182 | u64 tx_pkts; | 181 | u64 tx_pkts; |
| 183 | u64 tx_ring_full; | 182 | u64 tx_ring_full; |
| 184 | u64 tx_err_no_buf; | 183 | u64 tx_err_no_buf; |
| 185 | u64 tx_memcpy; | 184 | u64 tx_memcpy; |
| 186 | u64 tx_async; | 185 | u64 tx_async; |
| 187 | u64 dma_tx_prep_err; | ||
| 188 | }; | 186 | }; |
| 189 | 187 | ||
| 190 | struct ntb_transport_mw { | 188 | struct ntb_transport_mw { |
| @@ -254,8 +252,6 @@ enum { | |||
| 254 | #define QP_TO_MW(nt, qp) ((qp) % nt->mw_count) | 252 | #define QP_TO_MW(nt, qp) ((qp) % nt->mw_count) |
| 255 | #define NTB_QP_DEF_NUM_ENTRIES 100 | 253 | #define NTB_QP_DEF_NUM_ENTRIES 100 |
| 256 | #define NTB_LINK_DOWN_TIMEOUT 10 | 254 | #define NTB_LINK_DOWN_TIMEOUT 10 |
| 257 | #define DMA_RETRIES 20 | ||
| 258 | #define DMA_OUT_RESOURCE_TO msecs_to_jiffies(50) | ||
| 259 | 255 | ||
| 260 | static void ntb_transport_rxc_db(unsigned long data); | 256 | static void ntb_transport_rxc_db(unsigned long data); |
| 261 | static const struct ntb_ctx_ops ntb_transport_ops; | 257 | static const struct ntb_ctx_ops ntb_transport_ops; |
| @@ -516,12 +512,6 @@ static ssize_t debugfs_read(struct file *filp, char __user *ubuf, size_t count, | |||
| 516 | out_offset += snprintf(buf + out_offset, out_count - out_offset, | 512 | out_offset += snprintf(buf + out_offset, out_count - out_offset, |
| 517 | "free tx - \t%u\n", | 513 | "free tx - \t%u\n", |
| 518 | ntb_transport_tx_free_entry(qp)); | 514 | ntb_transport_tx_free_entry(qp)); |
| 519 | out_offset += snprintf(buf + out_offset, out_count - out_offset, | ||
| 520 | "DMA tx prep err - \t%llu\n", | ||
| 521 | qp->dma_tx_prep_err); | ||
| 522 | out_offset += snprintf(buf + out_offset, out_count - out_offset, | ||
| 523 | "DMA rx prep err - \t%llu\n", | ||
| 524 | qp->dma_rx_prep_err); | ||
| 525 | 515 | ||
| 526 | out_offset += snprintf(buf + out_offset, out_count - out_offset, | 516 | out_offset += snprintf(buf + out_offset, out_count - out_offset, |
| 527 | "\n"); | 517 | "\n"); |
| @@ -623,7 +613,7 @@ static int ntb_transport_setup_qp_mw(struct ntb_transport_ctx *nt, | |||
| 623 | if (!mw->virt_addr) | 613 | if (!mw->virt_addr) |
| 624 | return -ENOMEM; | 614 | return -ENOMEM; |
| 625 | 615 | ||
| 626 | if (qp_count % mw_count && mw_num + 1 < qp_count / mw_count) | 616 | if (mw_num < qp_count % mw_count) |
| 627 | num_qps_mw = qp_count / mw_count + 1; | 617 | num_qps_mw = qp_count / mw_count + 1; |
| 628 | else | 618 | else |
| 629 | num_qps_mw = qp_count / mw_count; | 619 | num_qps_mw = qp_count / mw_count; |
| @@ -768,8 +758,6 @@ static void ntb_qp_link_down_reset(struct ntb_transport_qp *qp) | |||
| 768 | qp->tx_err_no_buf = 0; | 758 | qp->tx_err_no_buf = 0; |
| 769 | qp->tx_memcpy = 0; | 759 | qp->tx_memcpy = 0; |
| 770 | qp->tx_async = 0; | 760 | qp->tx_async = 0; |
| 771 | qp->dma_tx_prep_err = 0; | ||
| 772 | qp->dma_rx_prep_err = 0; | ||
| 773 | } | 761 | } |
| 774 | 762 | ||
| 775 | static void ntb_qp_link_cleanup(struct ntb_transport_qp *qp) | 763 | static void ntb_qp_link_cleanup(struct ntb_transport_qp *qp) |
| @@ -1000,7 +988,7 @@ static int ntb_transport_init_queue(struct ntb_transport_ctx *nt, | |||
| 1000 | qp->event_handler = NULL; | 988 | qp->event_handler = NULL; |
| 1001 | ntb_qp_link_down_reset(qp); | 989 | ntb_qp_link_down_reset(qp); |
| 1002 | 990 | ||
| 1003 | if (qp_count % mw_count && mw_num + 1 < qp_count / mw_count) | 991 | if (mw_num < qp_count % mw_count) |
| 1004 | num_qps_mw = qp_count / mw_count + 1; | 992 | num_qps_mw = qp_count / mw_count + 1; |
| 1005 | else | 993 | else |
| 1006 | num_qps_mw = qp_count / mw_count; | 994 | num_qps_mw = qp_count / mw_count; |
| @@ -1128,8 +1116,8 @@ static int ntb_transport_probe(struct ntb_client *self, struct ntb_dev *ndev) | |||
| 1128 | qp_count = ilog2(qp_bitmap); | 1116 | qp_count = ilog2(qp_bitmap); |
| 1129 | if (max_num_clients && max_num_clients < qp_count) | 1117 | if (max_num_clients && max_num_clients < qp_count) |
| 1130 | qp_count = max_num_clients; | 1118 | qp_count = max_num_clients; |
| 1131 | else if (mw_count < qp_count) | 1119 | else if (nt->mw_count < qp_count) |
| 1132 | qp_count = mw_count; | 1120 | qp_count = nt->mw_count; |
| 1133 | 1121 | ||
| 1134 | qp_bitmap &= BIT_ULL(qp_count) - 1; | 1122 | qp_bitmap &= BIT_ULL(qp_count) - 1; |
| 1135 | 1123 | ||
| @@ -1317,7 +1305,6 @@ static int ntb_async_rx_submit(struct ntb_queue_entry *entry, void *offset) | |||
| 1317 | struct dmaengine_unmap_data *unmap; | 1305 | struct dmaengine_unmap_data *unmap; |
| 1318 | dma_cookie_t cookie; | 1306 | dma_cookie_t cookie; |
| 1319 | void *buf = entry->buf; | 1307 | void *buf = entry->buf; |
| 1320 | int retries = 0; | ||
| 1321 | 1308 | ||
| 1322 | len = entry->len; | 1309 | len = entry->len; |
| 1323 | device = chan->device; | 1310 | device = chan->device; |
| @@ -1346,22 +1333,11 @@ static int ntb_async_rx_submit(struct ntb_queue_entry *entry, void *offset) | |||
| 1346 | 1333 | ||
| 1347 | unmap->from_cnt = 1; | 1334 | unmap->from_cnt = 1; |
| 1348 | 1335 | ||
| 1349 | for (retries = 0; retries < DMA_RETRIES; retries++) { | 1336 | txd = device->device_prep_dma_memcpy(chan, unmap->addr[1], |
| 1350 | txd = device->device_prep_dma_memcpy(chan, | 1337 | unmap->addr[0], len, |
| 1351 | unmap->addr[1], | 1338 | DMA_PREP_INTERRUPT); |
| 1352 | unmap->addr[0], len, | 1339 | if (!txd) |
| 1353 | DMA_PREP_INTERRUPT); | ||
| 1354 | if (txd) | ||
| 1355 | break; | ||
| 1356 | |||
| 1357 | set_current_state(TASK_INTERRUPTIBLE); | ||
| 1358 | schedule_timeout(DMA_OUT_RESOURCE_TO); | ||
| 1359 | } | ||
| 1360 | |||
| 1361 | if (!txd) { | ||
| 1362 | qp->dma_rx_prep_err++; | ||
| 1363 | goto err_get_unmap; | 1340 | goto err_get_unmap; |
| 1364 | } | ||
| 1365 | 1341 | ||
| 1366 | txd->callback_result = ntb_rx_copy_callback; | 1342 | txd->callback_result = ntb_rx_copy_callback; |
| 1367 | txd->callback_param = entry; | 1343 | txd->callback_param = entry; |
| @@ -1606,7 +1582,6 @@ static int ntb_async_tx_submit(struct ntb_transport_qp *qp, | |||
| 1606 | struct dmaengine_unmap_data *unmap; | 1582 | struct dmaengine_unmap_data *unmap; |
| 1607 | dma_addr_t dest; | 1583 | dma_addr_t dest; |
| 1608 | dma_cookie_t cookie; | 1584 | dma_cookie_t cookie; |
| 1609 | int retries = 0; | ||
| 1610 | 1585 | ||
| 1611 | device = chan->device; | 1586 | device = chan->device; |
| 1612 | dest = qp->tx_mw_phys + qp->tx_max_frame * entry->tx_index; | 1587 | dest = qp->tx_mw_phys + qp->tx_max_frame * entry->tx_index; |
| @@ -1628,21 +1603,10 @@ static int ntb_async_tx_submit(struct ntb_transport_qp *qp, | |||
| 1628 | 1603 | ||
| 1629 | unmap->to_cnt = 1; | 1604 | unmap->to_cnt = 1; |
| 1630 | 1605 | ||
| 1631 | for (retries = 0; retries < DMA_RETRIES; retries++) { | 1606 | txd = device->device_prep_dma_memcpy(chan, dest, unmap->addr[0], len, |
| 1632 | txd = device->device_prep_dma_memcpy(chan, dest, | 1607 | DMA_PREP_INTERRUPT); |
| 1633 | unmap->addr[0], len, | 1608 | if (!txd) |
| 1634 | DMA_PREP_INTERRUPT); | ||
| 1635 | if (txd) | ||
| 1636 | break; | ||
| 1637 | |||
| 1638 | set_current_state(TASK_INTERRUPTIBLE); | ||
| 1639 | schedule_timeout(DMA_OUT_RESOURCE_TO); | ||
| 1640 | } | ||
| 1641 | |||
| 1642 | if (!txd) { | ||
| 1643 | qp->dma_tx_prep_err++; | ||
| 1644 | goto err_get_unmap; | 1609 | goto err_get_unmap; |
| 1645 | } | ||
| 1646 | 1610 | ||
| 1647 | txd->callback_result = ntb_tx_copy_callback; | 1611 | txd->callback_result = ntb_tx_copy_callback; |
| 1648 | txd->callback_param = entry; | 1612 | txd->callback_param = entry; |
diff --git a/drivers/ntb/test/ntb_perf.c b/drivers/ntb/test/ntb_perf.c index 434e1d474f33..5cab2831ce99 100644 --- a/drivers/ntb/test/ntb_perf.c +++ b/drivers/ntb/test/ntb_perf.c | |||
| @@ -90,11 +90,11 @@ MODULE_PARM_DESC(max_mw_size, "Limit size of large memory windows"); | |||
| 90 | 90 | ||
| 91 | static unsigned int seg_order = 19; /* 512K */ | 91 | static unsigned int seg_order = 19; /* 512K */ |
| 92 | module_param(seg_order, uint, 0644); | 92 | module_param(seg_order, uint, 0644); |
| 93 | MODULE_PARM_DESC(seg_order, "size order [n^2] of buffer segment for testing"); | 93 | MODULE_PARM_DESC(seg_order, "size order [2^n] of buffer segment for testing"); |
| 94 | 94 | ||
| 95 | static unsigned int run_order = 32; /* 4G */ | 95 | static unsigned int run_order = 32; /* 4G */ |
| 96 | module_param(run_order, uint, 0644); | 96 | module_param(run_order, uint, 0644); |
| 97 | MODULE_PARM_DESC(run_order, "size order [n^2] of total data to transfer"); | 97 | MODULE_PARM_DESC(run_order, "size order [2^n] of total data to transfer"); |
