diff options
| -rw-r--r-- | drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 4557f335a8a5..6254e985aff5 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c | |||
| @@ -169,6 +169,7 @@ struct vop_win_phy { | |||
| 169 | 169 | ||
| 170 | struct vop_reg enable; | 170 | struct vop_reg enable; |
| 171 | struct vop_reg format; | 171 | struct vop_reg format; |
| 172 | struct vop_reg rb_swap; | ||
| 172 | struct vop_reg act_info; | 173 | struct vop_reg act_info; |
| 173 | struct vop_reg dsp_info; | 174 | struct vop_reg dsp_info; |
| 174 | struct vop_reg dsp_st; | 175 | struct vop_reg dsp_st; |
| @@ -198,8 +199,12 @@ struct vop_data { | |||
| 198 | static const uint32_t formats_01[] = { | 199 | static const uint32_t formats_01[] = { |
| 199 | DRM_FORMAT_XRGB8888, | 200 | DRM_FORMAT_XRGB8888, |
| 200 | DRM_FORMAT_ARGB8888, | 201 | DRM_FORMAT_ARGB8888, |
| 202 | DRM_FORMAT_XBGR8888, | ||
| 203 | DRM_FORMAT_ABGR8888, | ||
| 201 | DRM_FORMAT_RGB888, | 204 | DRM_FORMAT_RGB888, |
| 205 | DRM_FORMAT_BGR888, | ||
| 202 | DRM_FORMAT_RGB565, | 206 | DRM_FORMAT_RGB565, |
| 207 | DRM_FORMAT_BGR565, | ||
| 203 | DRM_FORMAT_NV12, | 208 | DRM_FORMAT_NV12, |
| 204 | DRM_FORMAT_NV16, | 209 | DRM_FORMAT_NV16, |
| 205 | DRM_FORMAT_NV24, | 210 | DRM_FORMAT_NV24, |
| @@ -208,8 +213,12 @@ static const uint32_t formats_01[] = { | |||
| 208 | static const uint32_t formats_234[] = { | 213 | static const uint32_t formats_234[] = { |
| 209 | DRM_FORMAT_XRGB8888, | 214 | DRM_FORMAT_XRGB8888, |
| 210 | DRM_FORMAT_ARGB8888, | 215 | DRM_FORMAT_ARGB8888, |
| 216 | DRM_FORMAT_XBGR8888, | ||
| 217 | DRM_FORMAT_ABGR8888, | ||
| 211 | DRM_FORMAT_RGB888, | 218 | DRM_FORMAT_RGB888, |
| 219 | DRM_FORMAT_BGR888, | ||
| 212 | DRM_FORMAT_RGB565, | 220 | DRM_FORMAT_RGB565, |
| 221 | DRM_FORMAT_BGR565, | ||
| 213 | }; | 222 | }; |
| 214 | 223 | ||
| 215 | static const struct vop_win_phy win01_data = { | 224 | static const struct vop_win_phy win01_data = { |
| @@ -217,6 +226,7 @@ static const struct vop_win_phy win01_data = { | |||
| 217 | .nformats = ARRAY_SIZE(formats_01), | 226 | .nformats = ARRAY_SIZE(formats_01), |
| 218 | .enable = VOP_REG(WIN0_CTRL0, 0x1, 0), | 227 | .enable = VOP_REG(WIN0_CTRL0, 0x1, 0), |
| 219 | .format = VOP_REG(WIN0_CTRL0, 0x7, 1), | 228 | .format = VOP_REG(WIN0_CTRL0, 0x7, 1), |
| 229 | .rb_swap = VOP_REG(WIN0_CTRL0, 0x1, 12), | ||
| 220 | .act_info = VOP_REG(WIN0_ACT_INFO, 0x1fff1fff, 0), | 230 | .act_info = VOP_REG(WIN0_ACT_INFO, 0x1fff1fff, 0), |
| 221 | .dsp_info = VOP_REG(WIN0_DSP_INFO, 0x0fff0fff, 0), | 231 | .dsp_info = VOP_REG(WIN0_DSP_INFO, 0x0fff0fff, 0), |
| 222 | .dsp_st = VOP_REG(WIN0_DSP_ST, 0x1fff1fff, 0), | 232 | .dsp_st = VOP_REG(WIN0_DSP_ST, 0x1fff1fff, 0), |
| @@ -233,6 +243,7 @@ static const struct vop_win_phy win23_data = { | |||
| 233 | .nformats = ARRAY_SIZE(formats_234), | 243 | .nformats = ARRAY_SIZE(formats_234), |
| 234 | .enable = VOP_REG(WIN2_CTRL0, 0x1, 0), | 244 | .enable = VOP_REG(WIN2_CTRL0, 0x1, 0), |
| 235 | .format = VOP_REG(WIN2_CTRL0, 0x7, 1), | 245 | .format = VOP_REG(WIN2_CTRL0, 0x7, 1), |
| 246 | .rb_swap = VOP_REG(WIN2_CTRL0, 0x1, 12), | ||
| 236 | .dsp_info = VOP_REG(WIN2_DSP_INFO0, 0x0fff0fff, 0), | 247 | .dsp_info = VOP_REG(WIN2_DSP_INFO0, 0x0fff0fff, 0), |
| 237 | .dsp_st = VOP_REG(WIN2_DSP_ST0, 0x1fff1fff, 0), | 248 | .dsp_st = VOP_REG(WIN2_DSP_ST0, 0x1fff1fff, 0), |
| 238 | .yrgb_mst = VOP_REG(WIN2_MST0, 0xffffffff, 0), | 249 | .yrgb_mst = VOP_REG(WIN2_MST0, 0xffffffff, 0), |
| @@ -246,6 +257,7 @@ static const struct vop_win_phy cursor_data = { | |||
| 246 | .nformats = ARRAY_SIZE(formats_234), | 257 | .nformats = ARRAY_SIZE(formats_234), |
| 247 | .enable = VOP_REG(HWC_CTRL0, 0x1, 0), | 258 | .enable = VOP_REG(HWC_CTRL0, 0x1, 0), |
| 248 | .format = VOP_REG(HWC_CTRL0, 0x7, 1), | 259 | .format = VOP_REG(HWC_CTRL0, 0x7, 1), |
| 260 | .rb_swap = VOP_REG(HWC_CTRL0, 0x1, 12), | ||
| 249 | .dsp_st = VOP_REG(HWC_DSP_ST, 0x1fff1fff, 0), | 261 | .dsp_st = VOP_REG(HWC_DSP_ST, 0x1fff1fff, 0), |
| 250 | .yrgb_mst = VOP_REG(HWC_MST, 0xffffffff, 0), | 262 | .yrgb_mst = VOP_REG(HWC_MST, 0xffffffff, 0), |
| 251 | }; | 263 | }; |
| @@ -351,15 +363,32 @@ static inline void vop_mask_write_relaxed(struct vop *vop, uint32_t offset, | |||
| 351 | } | 363 | } |
| 352 | } | 364 | } |
| 353 | 365 | ||
| 366 | static bool has_rb_swapped(uint32_t format) | ||
| 367 | { | ||
| 368 | switch (format) { | ||
| 369 | case DRM_FORMAT_XBGR8888: | ||
| 370 | case DRM_FORMAT_ABGR8888: | ||
| 371 | case DRM_FORMAT_BGR888: | ||
| 372 | case DRM_FORMAT_BGR565: | ||
| 373 | return true; | ||
| 374 | default: | ||
| 375 | return false; | ||
| 376 | } | ||
| 377 | } | ||
| 378 | |||
| 354 | static enum vop_data_format vop_convert_format(uint32_t format) | 379 | static enum vop_data_format vop_convert_format(uint32_t format) |
| 355 | { | 380 | { |
| 356 | switch (format) { | 381 | switch (format) { |
| 357 | case DRM_FORMAT_XRGB8888: | 382 | case DRM_FORMAT_XRGB8888: |
| 358 | case DRM_FORMAT_ARGB8888: | 383 | case DRM_FORMAT_ARGB8888: |
| 384 | case DRM_FORMAT_XBGR8888: | ||
| 385 | case DRM_FORMAT_ABGR8888: | ||
| 359 | return VOP_FMT_ARGB8888; | 386 | return VOP_FMT_ARGB8888; |
| 360 | case DRM_FORMAT_RGB888: | 387 | case DRM_FORMAT_RGB888: |
| 388 | case DRM_FORMAT_BGR888: | ||
| 361 | return VOP_FMT_RGB888; | 389 | return VOP_FMT_RGB888; |
| 362 | case DRM_FORMAT_RGB565: | 390 | case DRM_FORMAT_RGB565: |
| 391 | case DRM_FORMAT_BGR565: | ||
| 363 | return VOP_FMT_RGB565; | 392 | return VOP_FMT_RGB565; |
| 364 | case DRM_FORMAT_NV12: | 393 | case DRM_FORMAT_NV12: |
| 365 | return VOP_FMT_YUV420SP; | 394 | return VOP_FMT_YUV420SP; |
| @@ -377,6 +406,7 @@ static bool is_alpha_support(uint32_t format) | |||
| 377 | { | 406 | { |
| 378 | switch (format) { | 407 | switch (format) { |
| 379 | case DRM_FORMAT_ARGB8888: | 408 | case DRM_FORMAT_ARGB8888: |
| 409 | case DRM_FORMAT_ABGR8888: | ||
| 380 | return true; | 410 | return true; |
| 381 | default: | 411 | default: |
| 382 | return false; | 412 | return false; |
| @@ -587,6 +617,7 @@ static int vop_update_plane_event(struct drm_plane *plane, | |||
| 587 | enum vop_data_format format; | 617 | enum vop_data_format format; |
| 588 | uint32_t val; | 618 | uint32_t val; |
| 589 | bool is_alpha; | 619 | bool is_alpha; |
| 620 | bool rb_swap; | ||
| 590 | bool visible; | 621 | bool visible; |
| 591 | int ret; | 622 | int ret; |
| 592 | struct drm_rect dest = { | 623 | struct drm_rect dest = { |
| @@ -620,6 +651,7 @@ static int vop_update_plane_event(struct drm_plane *plane, | |||
| 620 | return 0; | 651 | return 0; |
| 621 | 652 | ||
| 622 | is_alpha = is_alpha_support(fb->pixel_format); | 653 | is_alpha = is_alpha_support(fb->pixel_format); |
| 654 | rb_swap = has_rb_swapped(fb->pixel_format); | ||
| 623 | format = vop_convert_format(fb->pixel_format); | 655 | format = vop_convert_format(fb->pixel_format); |
| 624 | if (format < 0) | 656 | if (format < 0) |
| 625 | return format; | 657 | return format; |
| @@ -688,6 +720,7 @@ static int vop_update_plane_event(struct drm_plane *plane, | |||
| 688 | val = (dsp_sty - 1) << 16; | 720 | val = (dsp_sty - 1) << 16; |
| 689 | val |= (dsp_stx - 1) & 0xffff; | 721 | val |= (dsp_stx - 1) & 0xffff; |
| 690 | VOP_WIN_SET(vop, win, dsp_st, val); | 722 | VOP_WIN_SET(vop, win, dsp_st, val); |
| 723 | VOP_WIN_SET(vop, win, rb_swap, rb_swap); | ||
| 691 | 724 | ||
| 692 | if (is_alpha) { | 725 | if (is_alpha) { |
| 693 | VOP_WIN_SET(vop, win, dst_alpha_ctl, | 726 | VOP_WIN_SET(vop, win, dst_alpha_ctl, |
